2 * (C) Copyright 2008-2010
3 * GraÅžvydas Ignotas <notasas@gmail.com>
5 * Configuration settings for the OMAP3 Pandora.
7 * SPDX-License-Identifier: GPL-2.0+
14 * High Level Configuration Options
16 #define CONFIG_OMAP 1 /* in a TI OMAP core */
17 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
18 #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
19 #define CONFIG_OMAP_GPIO
21 #define CONFIG_SDRC /* The chip has SDRC controller */
23 #include <asm/arch/cpu.h> /* get chip and board defs */
24 #include <asm/arch/omap3.h>
27 * Display CPU and Board information
29 #define CONFIG_DISPLAY_CPUINFO 1
30 #define CONFIG_DISPLAY_BOARDINFO 1
33 #define V_OSCK 26000000 /* Clock output from T2 */
34 #define V_SCLK (V_OSCK >> 1)
36 #define CONFIG_MISC_INIT_R
38 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
39 #define CONFIG_SETUP_MEMORY_TAGS 1
40 #define CONFIG_INITRD_TAG 1
41 #define CONFIG_REVISION_TAG 1
43 #define CONFIG_OF_LIBFDT 1
46 * Size of malloc() pool
48 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
49 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
55 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
56 #define CONFIG_SYS_DEVICE_NULLDEV 1
59 #define CONFIG_MUSB_UDC 1
60 #define CONFIG_USB_OMAP3 1
61 #define CONFIG_TWL4030_USB 1
63 /* USB device configuration */
64 #define CONFIG_USB_DEVICE 1
65 #define CONFIG_USB_TTY 1
68 * NS16550 Configuration
70 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
72 #define CONFIG_SYS_NS16550
73 #define CONFIG_SYS_NS16550_SERIAL
74 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
75 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
78 * select serial console configuration
80 #define CONFIG_CONS_INDEX 3
81 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
82 #define CONFIG_SERIAL3 3
84 /* allow to overwrite serial and ethaddr */
85 #define CONFIG_ENV_OVERWRITE
86 #define CONFIG_BAUDRATE 115200
87 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
89 #define CONFIG_GENERIC_MMC 1
91 #define CONFIG_OMAP_HSMMC 1
92 #define CONFIG_DOS_PARTITION 1
94 /* commands to include */
95 #include <config_cmd_default.h>
97 #define CONFIG_CMD_EXT2 /* EXT2 Support */
98 #define CONFIG_CMD_FAT /* FAT support */
100 #define CONFIG_CMD_I2C /* I2C serial bus support */
101 #define CONFIG_CMD_MMC /* MMC support */
102 #define CONFIG_CMD_NAND /* NAND support */
103 #define CONFIG_CMD_CACHE /* Cache control */
105 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
106 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
107 #undef CONFIG_CMD_IMI /* iminfo */
108 #undef CONFIG_CMD_IMLS /* List all found images */
109 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
110 #undef CONFIG_CMD_NFS /* NFS support */
112 #define CONFIG_SYS_NO_FLASH
113 #define CONFIG_HARD_I2C 1
114 #define CONFIG_SYS_I2C_SPEED 100000
115 #define CONFIG_SYS_I2C_SLAVE 1
116 #define CONFIG_DRIVER_OMAP34XX_I2C 1
121 #define CONFIG_TWL4030_POWER 1
122 #define CONFIG_TWL4030_LED 1
127 #define CONFIG_NAND_OMAP_GPMC
128 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
130 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
133 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
135 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
138 #ifdef CONFIG_CMD_NAND
139 #define CONFIG_CMD_MTDPARTS
140 #define CONFIG_MTD_PARTITIONS
141 #define CONFIG_MTD_DEVICE
142 #define CONFIG_CMD_UBI
143 #define CONFIG_CMD_UBIFS
144 #define CONFIG_RBTREE
147 #define MTDIDS_DEFAULT "nand0=nand"
148 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\
149 "1920k(uboot),128k(uboot-env),"\
150 "10m(boot),-(rootfs)"
152 #define MTDPARTS_DEFAULT
155 /* Environment information */
156 #define CONFIG_BOOTDELAY 1
158 #define CONFIG_EXTRA_ENV_SETTINGS \
160 "loadaddr=0x82000000\0" \
161 "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
162 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
163 "mtdparts=" MTDPARTS_DEFAULT "\0" \
165 #define CONFIG_BOOTCOMMAND \
166 "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \
167 "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
168 "source ${loadaddr}; " \
170 "ubi part boot && ubifsmount ubi:boot && " \
171 "ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
173 #define CONFIG_AUTO_COMPLETE 1
175 * Miscellaneous configurable options
177 #define CONFIG_SYS_LONGHELP /* undef to save memory */
178 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
179 #define CONFIG_SYS_PROMPT "Pandora # "
180 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
181 /* Print Buffer Size */
182 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
183 sizeof(CONFIG_SYS_PROMPT) + 16)
184 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
186 /* Boot Argument Buffer Size */
187 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
188 /* memtest works on */
189 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
190 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
191 0x01F00000) /* 31MB */
193 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
197 * OMAP3 has 12 GP timers, they can be driven by the system clock
198 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
199 * This rate is divided by a local divisor.
201 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
202 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
203 #define CONFIG_SYS_HZ 1000
205 /*-----------------------------------------------------------------------
206 * Physical Memory Map
208 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
209 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
210 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
212 #define CONFIG_SYS_TEXT_BASE 0x80008000
213 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
214 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
215 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
216 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
217 CONFIG_SYS_INIT_RAM_SIZE - \
218 GENERATED_GBL_DATA_SIZE)
220 /*-----------------------------------------------------------------------
221 * FLASH and environment organization
224 /* **** PISMO SUPPORT *** */
226 /* Configure the PISMO */
227 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
228 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
230 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
232 #if defined(CONFIG_CMD_NAND)
233 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
236 /* Monitor at start of flash */
237 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
239 #define CONFIG_ENV_IS_IN_NAND 1
240 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
242 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
243 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
244 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
246 #define CONFIG_SYS_CACHELINE_SIZE 64
248 #endif /* __CONFIG_H */