3 * Grazvydas Ignotas <notasas@gmail.com>
5 * Configuration settings for the OMAP3 Pandora.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/sizes.h>
28 * High Level Configuration Options
30 #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
31 #define CONFIG_OMAP 1 /* in a TI OMAP core */
32 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
33 #define CONFIG_OMAP3430 1 /* which is in a 3430 */
34 #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
36 #include <asm/arch/cpu.h> /* get chip and board defs */
37 #include <asm/arch/omap3.h>
40 * Display CPU and Board information
42 #define CONFIG_DISPLAY_CPUINFO 1
43 #define CONFIG_DISPLAY_BOARDINFO 1
46 #define V_OSCK 26000000 /* Clock output from T2 */
47 #define V_SCLK (V_OSCK >> 1)
49 #undef CONFIG_USE_IRQ /* no support for IRQs */
50 #define CONFIG_MISC_INIT_R
52 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
53 #define CONFIG_SETUP_MEMORY_TAGS 1
54 #define CONFIG_INITRD_TAG 1
55 #define CONFIG_REVISION_TAG 1
58 * Size of malloc() pool
60 #define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */
62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K)
63 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
71 * NS16550 Configuration
73 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
75 #define CONFIG_SYS_NS16550
76 #define CONFIG_SYS_NS16550_SERIAL
77 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
78 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
81 * select serial console configuration
83 #define CONFIG_CONS_INDEX 3
84 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
85 #define CONFIG_SERIAL3 3
87 /* allow to overwrite serial and ethaddr */
88 #define CONFIG_ENV_OVERWRITE
89 #define CONFIG_BAUDRATE 115200
90 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
93 #define CONFIG_OMAP3_MMC 1
94 #define CONFIG_DOS_PARTITION 1
96 /* commands to include */
97 #include <config_cmd_default.h>
99 #define CONFIG_CMD_EXT2 /* EXT2 Support */
100 #define CONFIG_CMD_FAT /* FAT support */
101 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
103 #define CONFIG_CMD_I2C /* I2C serial bus support */
104 #define CONFIG_CMD_MMC /* MMC support */
105 #define CONFIG_CMD_NAND /* NAND support */
107 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
108 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
109 #undef CONFIG_CMD_IMI /* iminfo */
110 #undef CONFIG_CMD_IMLS /* List all found images */
111 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
112 #undef CONFIG_CMD_NFS /* NFS support */
114 #define CONFIG_SYS_NO_FLASH
115 #define CONFIG_HARD_I2C 1
116 #define CONFIG_SYS_I2C_SPEED 100000
117 #define CONFIG_SYS_I2C_SLAVE 1
118 #define CONFIG_SYS_I2C_BUS 0
119 #define CONFIG_SYS_I2C_BUS_SELECT 1
120 #define CONFIG_DRIVER_OMAP34XX_I2C 1
125 #define CONFIG_TWL4030_POWER 1
126 #define CONFIG_TWL4030_LED 1
131 #define CONFIG_NAND_OMAP_GPMC
132 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
134 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
137 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
139 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
142 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
144 #define CONFIG_JFFS2_NAND
145 /* nand device jffs2 lives on */
146 #define CONFIG_JFFS2_DEV "nand0"
147 /* start of jffs2 partition */
148 #define CONFIG_JFFS2_PART_OFFSET 0x680000
149 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
152 /* Environment information */
153 #define CONFIG_BOOTDELAY 1
155 #define CONFIG_EXTRA_ENV_SETTINGS \
156 "loadaddr=0x82000000\0" \
157 "console=ttyS0,115200n8\0" \
158 "videospec=omapfb:vram:2M,vram:4M\0" \
159 "mmcargs=setenv bootargs console=${console} " \
160 "video=${videospec} " \
161 "root=/dev/mmcblk0p2 rw " \
162 "rootfstype=ext3 rootwait\0" \
163 "nandargs=setenv bootargs console=${console} " \
164 "video=${videospec} " \
165 "root=/dev/mtdblock4 rw " \
166 "rootfstype=jffs2\0" \
167 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
168 "bootscript=echo Running bootscript from mmc ...; " \
169 "source ${loadaddr}\0" \
170 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
171 "mmcboot=echo Booting from mmc ...; " \
173 "bootm ${loadaddr}\0" \
174 "nandboot=echo Booting from nand ...; " \
176 "nand read ${loadaddr} 280000 400000; " \
177 "bootm ${loadaddr}\0" \
179 #define CONFIG_BOOTCOMMAND \
180 "if mmc init; then " \
181 "if run loadbootscript; then " \
184 "if run loaduimage; then " \
186 "else run nandboot; " \
189 "else run nandboot; fi"
191 #define CONFIG_AUTO_COMPLETE 1
193 * Miscellaneous configurable options
195 #define V_PROMPT "Pandora # "
197 #define CONFIG_SYS_LONGHELP /* undef to save memory */
198 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
199 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
200 #define CONFIG_SYS_PROMPT V_PROMPT
201 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
202 /* Print Buffer Size */
203 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
204 sizeof(CONFIG_SYS_PROMPT) + 16)
205 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
207 /* Boot Argument Buffer Size */
208 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
209 /* memtest works on */
210 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
211 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
212 0x01F00000) /* 31MB */
214 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
218 * OMAP3 has 12 GP timers, they can be driven by the system clock
219 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
220 * This rate is divided by a local divisor.
222 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
223 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
224 #define CONFIG_SYS_HZ 1000
226 /*-----------------------------------------------------------------------
229 * The stack sizes are set up in start.S using the settings below
231 #define CONFIG_STACKSIZE SZ_128K /* regular stack */
232 #ifdef CONFIG_USE_IRQ
233 #define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
234 #define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
237 /*-----------------------------------------------------------------------
238 * Physical Memory Map
240 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
241 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
242 #define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
243 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
245 /* SDRAM Bank Allocation method */
248 /*-----------------------------------------------------------------------
249 * FLASH and environment organization
252 /* **** PISMO SUPPORT *** */
254 /* Configure the PISMO */
255 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
256 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
258 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */
260 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
261 #define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
263 #define CONFIG_SYS_FLASH_BASE boot_flash_base
265 /* Monitor at start of flash */
266 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
267 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
269 #define CONFIG_ENV_IS_IN_NAND 1
270 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
271 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
273 #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec
274 #define CONFIG_ENV_OFFSET boot_flash_off
275 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
277 /*-----------------------------------------------------------------------
278 * CFI FLASH driver setup
280 /* timeout values are in ticks */
281 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
282 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
284 /* Flash banks JFFS2 should use */
285 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
286 CONFIG_SYS_MAX_NAND_DEVICE)
287 #define CONFIG_SYS_JFFS2_MEM_NAND
288 /* use flash_info[2] */
289 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
290 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
293 extern struct gpmc *gpmc_cfg;
294 extern unsigned int boot_flash_base;
295 extern volatile unsigned int boot_flash_env_addr;
296 extern unsigned int boot_flash_off;
297 extern unsigned int boot_flash_sec;
298 extern unsigned int boot_flash_type;
301 #endif /* __CONFIG_H */