3 * Texas Instruments Incorporated.
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
7 * TI OMAP4 common configuration settings
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #ifndef __CONFIG_OMAP4_COMMON_H
29 #define __CONFIG_OMAP4_COMMON_H
32 * High Level Configuration Options
34 #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
35 #define CONFIG_OMAP 1 /* in a TI OMAP core */
36 #define CONFIG_OMAP44XX 1 /* which is a 44XX */
37 #define CONFIG_OMAP4430 1 /* which is in a 4430 */
38 #define CONFIG_ARCH_CPU_INIT
41 #include <asm/arch/cpu.h>
42 #include <asm/arch/omap4.h>
44 /* Display CPU and Board Info */
45 #define CONFIG_DISPLAY_CPUINFO 1
46 #define CONFIG_DISPLAY_BOARDINFO 1
49 #define V_OSCK 38400000 /* Clock output from T2 */
52 #undef CONFIG_USE_IRQ /* no support for IRQs */
53 #define CONFIG_MISC_INIT_R
55 #define CONFIG_OF_LIBFDT 1
57 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
58 #define CONFIG_SETUP_MEMORY_TAGS 1
59 #define CONFIG_INITRD_TAG 1
60 #define CONFIG_REVISION_TAG 1
63 * Size of malloc() pool
64 * Total Size Environment - 128k
67 #define CONFIG_ENV_SIZE (128 << 10)
68 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
70 #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
77 * serial port - NS16550 compatible
79 #define V_NS16550_CLK 48000000
81 #define CONFIG_SYS_NS16550
82 #define CONFIG_SYS_NS16550_SERIAL
83 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
84 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
85 #define CONFIG_CONS_INDEX 3
86 #define CONFIG_SYS_NS16550_COM3 UART3_BASE
88 #define CONFIG_BAUDRATE 115200
89 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
92 #define CONFIG_HARD_I2C 1
93 #define CONFIG_SYS_I2C_SPEED 100000
94 #define CONFIG_SYS_I2C_SLAVE 1
95 #define CONFIG_SYS_I2C_BUS 0
96 #define CONFIG_SYS_I2C_BUS_SELECT 1
97 #define CONFIG_DRIVER_OMAP34XX_I2C 1
98 #define CONFIG_I2C_MULTI_BUS 1
101 #define CONFIG_TWL6030_POWER 1
104 #define CONFIG_GENERIC_MMC 1
106 #define CONFIG_OMAP_HSMMC 1
107 #define CONFIG_SYS_MMC_SET_DEV 1
108 #define CONFIG_DOS_PARTITION 1
112 #define CONFIG_MUSB_UDC 1
113 #define CONFIG_USB_OMAP3 1
115 /* USB device configuration */
116 #define CONFIG_USB_DEVICE 1
117 #define CONFIG_USB_TTY 1
118 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
121 #define CONFIG_SYS_NO_FLASH 1
123 /* commands to include */
124 #include <config_cmd_default.h>
126 /* Enabled commands */
127 #define CONFIG_CMD_EXT2 /* EXT2 Support */
128 #define CONFIG_CMD_FAT /* FAT support */
129 #define CONFIG_CMD_I2C /* I2C serial bus support */
130 #define CONFIG_CMD_MMC /* MMC support */
132 /* Disabled commands */
133 #undef CONFIG_CMD_NET
134 #undef CONFIG_CMD_NFS
135 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
136 #undef CONFIG_CMD_IMLS /* List all found images */
142 #define CONFIG_BOOTDELAY 3
144 #define CONFIG_ENV_OVERWRITE
146 #define CONFIG_EXTRA_ENV_SETTINGS \
147 "loadaddr=0x82000000\0" \
148 "console=ttyS2,115200n8\0" \
152 "mmcroot=/dev/mmcblk0p2 rw\0" \
153 "mmcrootfstype=ext3 rootwait\0" \
154 "mmcargs=setenv bootargs console=${console} " \
157 "rootfstype=${mmcrootfstype}\0" \
158 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
159 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
160 "source ${loadaddr}\0" \
161 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
162 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
164 "bootm ${loadaddr}\0" \
166 #define CONFIG_BOOTCOMMAND \
167 "if mmc rescan ${mmcdev}; then " \
168 "if run loadbootscript; then " \
171 "if run loaduimage; then " \
177 #define CONFIG_AUTO_COMPLETE 1
180 * Miscellaneous configurable options
183 #define CONFIG_SYS_LONGHELP /* undef to save memory */
184 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
185 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
186 #define CONFIG_SYS_CBSIZE 512
187 /* Print Buffer Size */
188 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
189 sizeof(CONFIG_SYS_PROMPT) + 16)
190 #define CONFIG_SYS_MAXARGS 16
191 /* Boot Argument Buffer Size */
192 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
197 #define CONFIG_SYS_MEMTEST_START 0x80000000
198 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
200 /* Default load address */
201 #define CONFIG_SYS_LOAD_ADDR 0x80000000
203 /* Use General purpose timer 1 */
204 #define CONFIG_SYS_TIMERBASE GPT2_BASE
205 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
206 #define CONFIG_SYS_HZ 1000
211 * The stack sizes are set up in start.S using the settings below
213 #define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
214 #ifdef CONFIG_USE_IRQ
215 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
216 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
221 * Even though we use two CS all the memory
222 * is mapped to one contiguous block
224 #define CONFIG_NR_DRAM_BANKS 1
226 #define CONFIG_SYS_SDRAM_BASE 0x80000000
227 #define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
228 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
229 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
230 CONFIG_SYS_INIT_RAM_SIZE - \
231 GENERATED_GBL_DATA_SIZE)
233 #ifndef CONFIG_SYS_L2CACHE_OFF
234 #define CONFIG_SYS_L2_PL310 1
235 #define CONFIG_SYS_PL310_BASE 0x48242000
238 /* Defines for SDRAM init */
239 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
240 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
241 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
244 /* Defines for SPL */
246 #define CONFIG_SPL_TEXT_BASE 0x40304350
247 #define CONFIG_SPL_MAX_SIZE (38 * 1024)
248 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
250 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
251 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
253 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
254 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
255 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
256 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
258 #define CONFIG_SPL_LIBCOMMON_SUPPORT
259 #define CONFIG_SPL_LIBDISK_SUPPORT
260 #define CONFIG_SPL_I2C_SUPPORT
261 #define CONFIG_SPL_MMC_SUPPORT
262 #define CONFIG_SPL_FAT_SUPPORT
263 #define CONFIG_SPL_LIBGENERIC_SUPPORT
264 #define CONFIG_SPL_SERIAL_SUPPORT
265 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds"
268 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
269 * 64 bytes before this address should be set aside for u-boot.img's
270 * header. That is 0x800FFFC0--0x80100000 should not be used for any
273 #define CONFIG_SYS_TEXT_BASE 0x80100000
275 #endif /* __CONFIG_OMAP4_COMMON_H */