4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * High Level Configuration Options
33 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
34 #define CONFIG_OMAP 1 /* in a TI OMAP core */
35 #define CONFIG_OMAP1610 1 /* 5912 is same as 1610 */
36 #define CONFIG_OSK_OMAP5912 1 /* a OSK Board */
38 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
39 #define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
41 /* input clock of PLL */
42 /* the OMAP5912 OSK has 12MHz input clock */
43 #define CONFIG_SYS_CLK_FREQ 12000000
45 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
47 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS 1
49 #define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */
52 * Size of malloc() pool
54 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
61 #define CONFIG_LAN91C96
62 #define CONFIG_LAN91C96_BASE 0x04800300
63 #define CONFIG_LAN91C96_EXT_PHY
66 * NS16550 Configuration
68 #define CONFIG_SYS_NS16550
69 #define CONFIG_SYS_NS16550_SERIAL
70 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
71 #define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
72 #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
76 * select serial console configuration
78 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP5912 OSK */
80 /* allow to overwrite serial and ethaddr */
81 #define CONFIG_ENV_OVERWRITE
82 #define CONFIG_CONS_INDEX 1
83 #define CONFIG_BAUDRATE 115200
84 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
88 * Command line configuration.
90 #include <config_cmd_default.h>
92 #define CONFIG_CMD_DHCP
98 #define CONFIG_BOOTP_SUBNETMASK
99 #define CONFIG_BOOTP_GATEWAY
100 #define CONFIG_BOOTP_HOSTNAME
101 #define CONFIG_BOOTP_BOOTPATH
104 #include <configs/omap1510.h>
106 #define CONFIG_BOOTDELAY 3
107 #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
108 root=/dev/nfs rw nfsroot=157.87.82.48:\
109 /home/mwd/myfs/target ip=dhcp"
110 #define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
111 #define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
112 #define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
113 #define CONFIG_BOOTFILE "uImage" /* file to load */
115 #if defined(CONFIG_CMD_KGDB)
116 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
117 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
121 * Miscellaneous configurable options
123 #define CONFIG_SYS_LONGHELP /* undef to save memory */
124 #define CONFIG_SYS_PROMPT "OMAP5912 OSK # " /* Monitor Command Prompt */
125 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
126 /* Print Buffer Size */
127 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
128 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
129 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
131 #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
132 #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
134 #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
136 /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
137 * DPLL1. This time is further subdivided by a local divisor.
139 #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
140 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
141 #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
143 /*-----------------------------------------------------------------------
146 * The stack sizes are set up in start.S using the settings below
148 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
149 #ifdef CONFIG_USE_IRQ
150 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
151 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
154 /*-----------------------------------------------------------------------
155 * Physical Memory Map
157 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
158 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
159 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
161 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
162 #define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */
164 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
166 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
168 #define PHYS_SRAM 0x20000000
170 /*-----------------------------------------------------------------------
173 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
174 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
176 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
178 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
179 #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
180 #define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
182 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
183 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
185 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
187 /* timeout values are in ticks */
188 #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
189 #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
191 /*-----------------------------------------------------------------------
192 * FLASH and environment organization
194 #define CONFIG_ENV_IS_IN_FLASH 1
195 /* addr of environment */
196 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
198 #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
199 #define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
201 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
202 #define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
204 #endif /* __CONFIG_H */