3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
9 * TI OMAP5 AND DRA7XX common configuration settings
11 * SPDX-License-Identifier: GPL-2.0+
14 #ifndef __CONFIG_OMAP5_COMMON_H
15 #define __CONFIG_OMAP5_COMMON_H
18 * High Level Configuration Options
20 #define CONFIG_OMAP /* in a TI OMAP core */
21 #define CONFIG_OMAP54XX /* which is a 54XX */
22 #define CONFIG_OMAP_GPIO
23 #define CONFIG_OMAP_COMMON
26 #include <asm/arch/cpu.h>
27 #include <asm/arch/omap.h>
29 /* Display CPU and Board Info */
30 #define CONFIG_DISPLAY_CPUINFO
31 #define CONFIG_DISPLAY_BOARDINFO
33 #define CONFIG_MISC_INIT_R
35 #define CONFIG_OF_LIBFDT
36 #define CONFIG_CMD_BOOTZ
38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG
43 * Size of malloc() pool
44 * Total Size Environment - 128k
47 #define CONFIG_ENV_SIZE (128 << 10)
48 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
50 #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
57 * serial port - NS16550 compatible
59 #define V_NS16550_CLK 48000000
61 #define CONFIG_SYS_NS16550
62 #define CONFIG_SYS_NS16550_SERIAL
63 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
64 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
67 #define CONFIG_ARCH_CPU_INIT
70 #define CONFIG_HARD_I2C
71 #define CONFIG_SYS_I2C_SPEED 100000
72 #define CONFIG_SYS_I2C_SLAVE 1
73 #define CONFIG_DRIVER_OMAP34XX_I2C
74 #define CONFIG_I2C_MULTI_BUS
77 #define CONFIG_GENERIC_MMC
79 #define CONFIG_OMAP_HSMMC
80 #define CONFIG_DOS_PARTITION
82 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
85 #define CONFIG_SYS_NO_FLASH
88 #define CONFIG_SYS_CACHELINE_SIZE 64
89 #define CONFIG_SYS_CACHELINE_SHIFT 6
91 /* commands to include */
92 #include <config_cmd_default.h>
94 /* Enabled commands */
95 #define CONFIG_CMD_EXT2 /* EXT2 Support */
96 #define CONFIG_CMD_FAT /* FAT support */
97 #define CONFIG_CMD_I2C /* I2C serial bus support */
98 #define CONFIG_CMD_MMC /* MMC support */
100 /* Disabled commands */
101 #undef CONFIG_CMD_NET
102 #undef CONFIG_CMD_NFS
103 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
104 #undef CONFIG_CMD_IMLS /* List all found images */
110 #define CONFIG_BOOTDELAY 3
111 #define CONFIG_ENV_VARS_UBOOT_CONFIG
112 #define CONFIG_CMD_FS_GENERIC
113 #define CONFIG_CMD_EXT2
114 #define CONFIG_CMD_EXT4
116 #define CONFIG_ENV_OVERWRITE
118 #ifndef PARTS_DEFAULT
119 #define PARTS_DEFAULT
122 #define CONFIG_EXTRA_ENV_SETTINGS \
123 "loadaddr=0x82000000\0" \
124 "console=" CONSOLEDEV ",115200n8\0" \
125 "fdt_high=0xffffffff\0" \
126 "fdtaddr=0x80f80000\0" \
127 "fdtfile=undefined\0" \
130 "bootfile=zImage\0" \
133 "partitions=" PARTS_DEFAULT "\0" \
136 "mmcroot=/dev/mmcblk0p2 rw\0" \
137 "mmcrootfstype=ext4 rootwait\0" \
138 "mmcargs=setenv bootargs console=${console} " \
142 "rootfstype=${mmcrootfstype}\0" \
143 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
144 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
145 "source ${loadaddr}\0" \
146 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
147 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
148 "env import -t ${loadaddr} ${filesize}\0" \
149 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
150 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
152 "bootz ${loadaddr} - ${fdtaddr}\0" \
154 "if test $board_name = omap5_uevm; then " \
155 "setenv fdtfile omap5-uevm.dtb; fi; " \
156 "if test $board_name = dra7xx; then " \
157 "setenv fdtfile dra7-evm.dtb; fi;" \
158 "if test $fdtfile = undefined; then " \
159 "echo WARNING: Could not determine device tree to use; fi; \0" \
160 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
162 #define CONFIG_BOOTCOMMAND \
164 "mmc dev ${mmcdev}; if mmc rescan; then " \
165 "if run loadbootscript; then " \
168 "if run loadbootenv; then " \
169 "run importbootenv; " \
171 "if test -n ${uenvcmd}; then " \
172 "echo Running uenvcmd ...;" \
176 "if run loadimage; then " \
182 #define CONFIG_AUTO_COMPLETE 1
185 * Miscellaneous configurable options
188 #define CONFIG_SYS_LONGHELP /* undef to save memory */
189 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
190 #define CONFIG_SYS_CBSIZE 256
191 /* Print Buffer Size */
192 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
193 sizeof(CONFIG_SYS_PROMPT) + 16)
194 #define CONFIG_SYS_MAXARGS 16
195 /* Boot Argument Buffer Size */
196 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
201 #define CONFIG_SYS_MEMTEST_START 0x80000000
202 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
204 /* Default load address */
205 #define CONFIG_SYS_LOAD_ADDR 0x80000000
207 /* Use General purpose timer 1 */
208 #define CONFIG_SYS_TIMERBASE GPT2_BASE
209 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
210 #define CONFIG_SYS_HZ 1000
214 * Even though we use two CS all the memory
215 * is mapped to one contiguous block
217 #define CONFIG_NR_DRAM_BANKS 1
219 #define CONFIG_SYS_SDRAM_BASE 0x80000000
220 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
221 GENERATED_GBL_DATA_SIZE)
223 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
225 /* Defines for SDRAM init */
226 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
227 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
228 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
231 #ifndef CONFIG_SPL_BUILD
232 #define CONFIG_PALMAS_POWER
235 /* Defines for SPL */
237 #define CONFIG_SPL_FRAMEWORK
238 #define CONFIG_SPL_TEXT_BASE 0x40300350
239 #define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */
240 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
241 #define CONFIG_SPL_DISPLAY_PRINT
243 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
244 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
245 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
246 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
248 #define CONFIG_SPL_LIBCOMMON_SUPPORT
249 #define CONFIG_SPL_LIBDISK_SUPPORT
250 #define CONFIG_SPL_I2C_SUPPORT
251 #define CONFIG_SPL_MMC_SUPPORT
252 #define CONFIG_SPL_FAT_SUPPORT
253 #define CONFIG_SPL_LIBGENERIC_SUPPORT
254 #define CONFIG_SPL_SERIAL_SUPPORT
255 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
258 * 64 bytes before this address should be set aside for u-boot.img's
259 * header. That is 80E7FFC0--0x80E80000 should not be used for any
262 #define CONFIG_SYS_TEXT_BASE 0x80E80000
265 * BSS and malloc area 64MB into memory to allow enough
266 * space for the kernel at the beginning of memory
268 #define CONFIG_SPL_BSS_START_ADDR 0x84000000
269 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
270 #define CONFIG_SYS_SPL_MALLOC_START 0x84100000
271 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
272 #define CONFIG_SPL_GPIO_SUPPORT
274 #endif /* __CONFIG_OMAP5_COMMON_H */