2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
5 * SPDX-License-Identifier: GPL-2.0+
11 #include "mx6_common.h"
13 #define CONFIG_DISPLAY_CPUINFO
14 #define CONFIG_DISPLAY_BOARDINFO
16 #include <asm/arch/imx-regs.h>
17 #include <asm/imx-common/gpio.h>
19 #define CONFIG_CMDLINE_TAG
20 #define CONFIG_SETUP_MEMORY_TAGS
21 #define CONFIG_INITRD_TAG
22 #define CONFIG_REVISION_TAG
23 #define CONFIG_SYS_GENERIC_BOARD
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28 #define CONFIG_BOARD_EARLY_INIT_F
29 #define CONFIG_MISC_INIT_R
30 #define CONFIG_MXC_GPIO
33 #define CONFIG_CMD_FUSE
34 #define CONFIG_MXC_OCOTP
37 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_UART_BASE UART1_BASE
43 #define CONFIG_SPI_FLASH
44 #define CONFIG_SPI_FLASH_STMICRO
45 #define CONFIG_SPI_FLASH_WINBOND
46 #define CONFIG_SPI_FLASH_MACRONIX
47 #define CONFIG_SPI_FLASH_SST
48 #define CONFIG_MXC_SPI
49 #define CONFIG_SF_DEFAULT_BUS 2
50 #define CONFIG_SF_DEFAULT_CS 0
51 #define CONFIG_SF_DEFAULT_SPEED 25000000
52 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
55 #define CONFIG_PCA953X
56 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
57 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
58 #define CONFIG_CMD_PCA953X
59 #define CONFIG_CMD_PCA953X_INFO
62 #define CONFIG_CMD_I2C
63 #define CONFIG_SYS_I2C
64 #define CONFIG_SYS_I2C_MXC
65 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
66 #define CONFIG_SYS_I2C_SPEED 100000
69 #define CONFIG_CMD_IMXOTP
70 #define CONFIG_IMX_OTP
71 #define IMX_OTP_BASE OCOTP_BASE_ADDR
72 #define IMX_OTP_ADDR_MAX 0x7F
73 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
74 #define IMX_OTPWRITE_ENABLED
77 #define CONFIG_FSL_ESDHC
78 #define CONFIG_FSL_USDHC
79 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
80 #define CONFIG_SYS_FSL_USDHC_NUM 2
83 #define CONFIG_CMD_MMC
84 #define CONFIG_GENERIC_MMC
85 #define CONFIG_BOUNCE_BUFFER
88 #define CONFIG_CMD_USB
89 #define CONFIG_USB_STORAGE
90 #define CONFIG_USB_EHCI
91 #define CONFIG_USB_EHCI_MX6
92 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
93 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
96 #define CONFIG_CMD_SATA
102 #ifdef CONFIG_CMD_SATA
103 #define CONFIG_DWC_AHSATA
104 #define CONFIG_SYS_SATA_MAX_DEVICE 1
105 #define CONFIG_DWC_AHSATA_PORT_ID 0
106 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
108 #define CONFIG_LIBATA
114 #include "imx6_spl.h"
115 #define CONFIG_SPL_SPI_SUPPORT
116 #define CONFIG_SPL_LIBCOMMON_SUPPORT
117 #define CONFIG_SPL_SPI_FLASH_SUPPORT
118 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
119 #define CONFIG_SPL_SPI_LOAD
122 #define CONFIG_CMD_PING
123 #define CONFIG_CMD_DHCP
124 #define CONFIG_CMD_MII
125 #define CONFIG_CMD_NET
126 #define CONFIG_FEC_MXC
128 #define IMX_FEC_BASE ENET_BASE_ADDR
129 #define CONFIG_FEC_XCV_TYPE MII100
130 #define CONFIG_ETHPRIME "FEC"
131 #define CONFIG_FEC_MXC_PHYADDR 0x5
132 #define CONFIG_PHYLIB
133 #define CONFIG_PHY_SMSC
136 #define CONFIG_CMD_EEPROM
137 #define CONFIG_ENV_EEPROM_IS_ON_I2C
138 #define CONFIG_SYS_I2C_EEPROM_BUS 1
139 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
140 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
141 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
142 #define CONFIG_SYS_I2C_MULTI_EEPROMS
145 /* Miscellaneous commands */
146 #define CONFIG_CMD_BMODE
147 #define CONFIG_CMD_SETEXPR
149 /* allow to overwrite serial and ethaddr */
150 #define CONFIG_ENV_OVERWRITE
151 #define CONFIG_CONS_INDEX 1
152 #define CONFIG_BAUDRATE 115200
154 /* Command definition */
155 #include <config_cmd_default.h>
157 #undef CONFIG_CMD_IMLS
159 #define CONFIG_BOOTDELAY 2
161 #define CONFIG_PREBOOT ""
163 #define CONFIG_LOADADDR 0x12000000
164 #define CONFIG_SYS_TEXT_BASE 0x17800000
166 /* Miscellaneous configurable options */
167 #define CONFIG_SYS_LONGHELP
168 #define CONFIG_SYS_HUSH_PARSER
169 #define CONFIG_SYS_CBSIZE 1024
171 /* Print Buffer Size */
172 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
173 #define CONFIG_SYS_MAXARGS 16
174 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
176 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
178 #define CONFIG_CMDLINE_EDITING
180 /* Physical Memory Map */
181 #define CONFIG_NR_DRAM_BANKS 1
182 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
184 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
185 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
186 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
188 #define CONFIG_SYS_INIT_SP_OFFSET \
189 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
190 #define CONFIG_SYS_INIT_SP_ADDR \
191 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
193 /* FLASH and environment organization */
194 #define CONFIG_SYS_NO_FLASH
196 #define CONFIG_ENV_IS_IN_SPI_FLASH
197 #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
198 #define CONFIG_ENV_OFFSET (1024 * 1024)
199 /* M25P16 has an erase size of 64 KiB */
200 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
201 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
202 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
203 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
204 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
206 #define CONFIG_OF_LIBFDT
207 #define CONFIG_CMD_BOOTZ
209 #ifndef CONFIG_SYS_DCACHE_OFF
210 #define CONFIG_CMD_CACHE
213 #define CONFIG_CMD_BOOTZ
214 #define CONFIG_SUPPORT_RAW_INITRD
217 #define CONFIG_CMD_EXT3
218 #define CONFIG_CMD_EXT4
219 #define CONFIG_DOS_PARTITION
220 #define CONFIG_CMD_FS_GENERIC
221 #define CONFIG_LIB_UUID
222 #define CONFIG_CMD_FS_UUID
224 #define CONFIG_BOOTP_SERVERIP
225 #define CONFIG_BOOTP_BOOTFILE
227 #endif /* __CONFIG_H */