4 * Phytec phyCORE-AM335x (pcm051) boards information header
6 * Copyright (C) 2013 Lemonage Software GmbH
7 * Author Lars Poeschel <poeschel@lemonage.de>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #ifndef __CONFIG_PCM051_H
20 #define __CONFIG_PCM051_H
25 #include <asm/arch/omap.h>
27 #define CONFIG_DMA_COHERENT
28 #define CONFIG_DMA_COHERENT_SIZE (1 << 20)
30 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
31 #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
32 #define CONFIG_SYS_LONGHELP /* undef to save memory */
33 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
34 #define CONFIG_SYS_PROMPT "U-Boot# "
35 #define CONFIG_SYS_NO_FLASH
36 #define MACH_TYPE_PCM051 4144 /* Until the next sync */
37 #define CONFIG_MACH_TYPE MACH_TYPE_PCM051
39 #define CONFIG_OF_LIBFDT
40 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
41 #define CONFIG_SETUP_MEMORY_TAGS
42 #define CONFIG_INITRD_TAG
44 /* commands to include */
45 #include <config_cmd_default.h>
47 #define CONFIG_CMD_ASKENV
48 #define CONFIG_VERSION_VARIABLE
50 /* set to negative value for no autoboot */
51 #define CONFIG_BOOTDELAY 1
52 #define CONFIG_ENV_VARS_UBOOT_CONFIG
53 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
54 #define CONFIG_EXTRA_ENV_SETTINGS \
55 "loadaddr=0x80007fc0\0" \
56 "fdtaddr=0x80000000\0" \
57 "rdaddr=0x81000000\0" \
59 "fdtfile=pcm051.dtb\0" \
60 "console=ttyO0,115200n8\0" \
63 "mmcroot=/dev/mmcblk0p2 ro\0" \
64 "mmcrootfstype=ext4 rootwait\0" \
65 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
66 "ramrootfstype=ext2\0" \
67 "mmcargs=setenv bootargs console=${console} " \
70 "rootfstype=${mmcrootfstype}\0" \
71 "bootenv=uEnv.txt\0" \
72 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
73 "importbootenv=echo Importing environment from mmc ...; " \
74 "env import -t $loadaddr $filesize\0" \
75 "ramargs=setenv bootargs console=${console} " \
78 "rootfstype=${ramrootfstype}\0" \
79 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
80 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
81 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
82 "mmcboot=echo Booting from mmc ...; " \
84 "bootm ${loadaddr}\0" \
85 "ramboot=echo Booting from ramdisk ...; " \
87 "bootm ${loadaddr}\0" \
89 #define CONFIG_BOOTCOMMAND \
90 "mmc dev ${mmcdev}; if mmc rescan; then " \
91 "echo SD/MMC found on device ${mmcdev};" \
92 "if run loadbootenv; then " \
93 "echo Loaded environment from ${bootenv};" \
94 "run importbootenv;" \
96 "if test -n $uenvcmd; then " \
97 "echo Running uenvcmd ...;" \
100 "if run loaduimage; then " \
106 #define V_OSCK 25000000 /* Clock output from T2 */
107 #define V_SCLK (V_OSCK)
109 #define CONFIG_CMD_ECHO
111 /* max number of command args */
112 #define CONFIG_SYS_MAXARGS 16
114 /* Console I/O Buffer Size */
115 #define CONFIG_SYS_CBSIZE 512
117 /* Print Buffer Size */
118 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
119 + sizeof(CONFIG_SYS_PROMPT) + 16)
121 /* Boot Argument Buffer Size */
122 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
125 * memtest works on 8 MB in DRAM after skipping 32MB from
126 * start addr of ram disk
128 #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
129 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
132 #define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */
135 #define CONFIG_GENERIC_MMC
136 #define CONFIG_OMAP_HSMMC
137 #define CONFIG_CMD_MMC
138 #define CONFIG_DOS_PARTITION
139 #define CONFIG_CMD_FAT
140 #define CONFIG_CMD_EXT2
143 #define CONFIG_OMAP3_SPI
144 #define CONFIG_MTD_DEVICE
145 #define CONFIG_SPI_FLASH
146 #define CONFIG_SPI_FLASH_WINBOND
147 #define CONFIG_CMD_SF
148 #define CONFIG_SF_DEFAULT_SPEED 24000000
150 /* Physical Memory Map */
151 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
152 #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
153 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */
155 #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
156 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
157 GENERATED_GBL_DATA_SIZE)
158 /* Platform/Board specific defs */
159 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
160 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
161 #define CONFIG_SYS_HZ 1000 /* 1ms clock */
163 #define CONFIG_CONS_INDEX 1
164 /* NS16550 Configuration */
165 #define CONFIG_SYS_NS16550
166 #define CONFIG_SYS_NS16550_SERIAL
167 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
168 #define CONFIG_SYS_NS16550_CLK (48000000)
169 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
170 #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
171 #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
172 #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
173 #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
174 #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
176 /* I2C Configuration */
178 #define CONFIG_CMD_I2C
179 #define CONFIG_HARD_I2C
180 #define CONFIG_SYS_I2C_SPEED 100000
181 #define CONFIG_SYS_I2C_SLAVE 1
182 #define CONFIG_I2C_MULTI_BUS
183 #define CONFIG_DRIVER_OMAP24XX_I2C
184 #define CONFIG_CMD_EEPROM
185 #define CONFIG_ENV_EEPROM_IS_ON_I2C
186 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
187 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
188 #define CONFIG_SYS_I2C_MULTI_EEPROMS
190 #define CONFIG_OMAP_GPIO
192 #define CONFIG_BAUDRATE 115200
193 #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
194 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
197 #define CONFIG_ARCH_CPU_INIT
199 #define CONFIG_ENV_OVERWRITE
200 #define CONFIG_SYS_CONSOLE_INFO_QUIET
202 #define CONFIG_ENV_IS_NOWHERE
204 /* Defines for SPL */
206 #define CONFIG_SPL_FRAMEWORK
208 * Place the image at the start of the ROM defined image space.
209 * We limit our size to the ROM-defined downloaded image area, and use the
210 * rest of the space for stack.
212 #define CONFIG_SPL_TEXT_BASE 0x402F0400
213 #define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
214 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
216 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
217 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
219 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
220 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
221 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
222 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
223 #define CONFIG_SPL_MMC_SUPPORT
224 #define CONFIG_SPL_FAT_SUPPORT
225 #define CONFIG_SPL_I2C_SUPPORT
227 #define CONFIG_SPL_LIBCOMMON_SUPPORT
228 #define CONFIG_SPL_LIBDISK_SUPPORT
229 #define CONFIG_SPL_LIBGENERIC_SUPPORT
230 #define CONFIG_SPL_SERIAL_SUPPORT
231 #define CONFIG_SPL_GPIO_SUPPORT
232 #define CONFIG_SPL_YMODEM_SUPPORT
233 #define CONFIG_SPL_NET_SUPPORT
234 #define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL"
235 #define CONFIG_SPL_ETH_SUPPORT
236 #define CONFIG_SPL_SPI_SUPPORT
237 #define CONFIG_SPL_SPI_FLASH_SUPPORT
238 #define CONFIG_SPL_SPI_LOAD
239 #define CONFIG_SPL_SPI_BUS 0
240 #define CONFIG_SPL_SPI_CS 0
241 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
242 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
243 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
246 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
247 * 64 bytes before this address should be set aside for u-boot.img's
248 * header. That is 0x800FFFC0--0x80100000 should not be used for any
251 #define CONFIG_SYS_TEXT_BASE 0x80800000
252 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
253 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
255 /* Since SPL did pll and ddr initialization for us,
256 * we don't need to do it twice.
258 #ifndef CONFIG_SPL_BUILD
259 #define CONFIG_SKIP_LOWLEVEL_INIT
265 #define CONFIG_USB_MUSB_DSPS
266 #define CONFIG_ARCH_MISC_INIT
267 #define CONFIG_MUSB_GADGET
268 #define CONFIG_MUSB_PIO_ONLY
269 #define CONFIG_USB_GADGET_DUALSPEED
270 #define CONFIG_MUSB_HOST
271 #define CONFIG_AM335X_USB0
272 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
273 #define CONFIG_AM335X_USB1
274 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
276 #ifdef CONFIG_MUSB_HOST
277 #define CONFIG_CMD_USB
278 #define CONFIG_USB_STORAGE
281 #ifdef CONFIG_MUSB_GADGET
282 #define CONFIG_USB_ETHER
283 #define CONFIG_USB_ETH_RNDIS
284 #endif /* CONFIG_MUSB_GADGET */
286 /* Unsupported features */
287 #undef CONFIG_USE_IRQ
289 #define CONFIG_CMD_NET
290 #define CONFIG_CMD_DHCP
291 #define CONFIG_CMD_PING
292 #define CONFIG_DRIVER_TI_CPSW
294 #define CONFIG_BOOTP_DEFAULT
295 #define CONFIG_BOOTP_DNS
296 #define CONFIG_BOOTP_DNS2
297 #define CONFIG_BOOTP_SEND_HOSTNAME
298 #define CONFIG_BOOTP_GATEWAY
299 #define CONFIG_BOOTP_SUBNETMASK
300 #define CONFIG_NET_RETRY_COUNT 10
301 #define CONFIG_NET_MULTI
302 #define CONFIG_PHY_GIGE
303 #define CONFIG_PHYLIB
304 #define CONFIG_PHY_ADDR 0
305 #define CONFIG_PHY_SMSC
307 #endif /* ! __CONFIG_PCM051_H */