2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the phytec PCM-052 SoM.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
14 #define CONFIG_SKIP_LOWLEVEL_INIT
16 /* Enable passing of ATAGs */
17 #define CONFIG_CMDLINE_TAG
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
22 /* Allow to overwrite serial and ethaddr */
23 #define CONFIG_ENV_OVERWRITE
26 #define CONFIG_SYS_NAND_ONFI_DETECTION
28 #ifdef CONFIG_CMD_NAND
29 #define CONFIG_SYS_MAX_NAND_DEVICE 1
30 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
32 #define CONFIG_JFFS2_NAND
34 /* Dynamic MTD partition support */
35 #define CONFIG_MTD_PARTITIONS
36 #define CONFIG_MTD_DEVICE
40 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
41 #define CONFIG_SYS_FSL_ESDHC_NUM 1
43 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
45 #define CONFIG_FEC_MXC
47 #define IMX_FEC_BASE ENET_BASE_ADDR
48 #define CONFIG_FEC_XCV_TYPE RMII
49 #define CONFIG_FEC_MXC_PHYADDR 0
53 #ifdef CONFIG_FSL_QSPI
54 #define FSL_QSPI_FLASH_SIZE (1 << 24)
55 #define FSL_QSPI_FLASH_NUM 2
56 #define CONFIG_SYS_FSL_QSPI_LE
60 #define CONFIG_SYS_I2C
61 #define CONFIG_SYS_I2C_MXC_I2C3
62 #define CONFIG_SYS_I2C_MXC
64 /* RTC (actually an RV-4162 but M41T62-compatible) */
65 #define CONFIG_RTC_M41T62
66 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
67 #define CONFIG_SYS_RTC_BUS_NUM 2
69 /* EEPROM (24FC256) */
70 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
71 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
72 #define CONFIG_SYS_I2C_EEPROM_BUS 2
75 #define CONFIG_LOADADDR 0x82000000
77 /* We boot from the gfxRAM area of the OCRAM. */
78 #define CONFIG_BOARD_SIZE_LIMIT 520192
80 /* if no target-specific extra environment settings were defined by the
81 target, define an empty one */
82 #ifndef PCM052_EXTRA_ENV_SETTINGS
83 #define PCM052_EXTRA_ENV_SETTINGS
86 /* if no target-specific boot command was defined by the target,
87 define an empty one */
88 #ifndef PCM052_BOOTCOMMAND
89 #define PCM052_BOOTCOMMAND
92 /* if no target-specific extra environment settings were defined by the
93 target, define an empty one */
94 #ifndef PCM052_NET_INIT
95 #define PCM052_NET_INIT
98 /* boot command, including the target-defined one if any */
99 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
101 /* Extra env settings (including the target-defined ones if any) */
102 #define CONFIG_EXTRA_ENV_SETTINGS \
103 PCM052_EXTRA_ENV_SETTINGS \
105 "fdt_high=0xffffffff\0" \
106 "initrd_high=0xffffffff\0" \
107 "blimg_file=u-boot.vyb\0" \
108 "blimg_addr=0x81000000\0" \
109 "kernel_file=zImage\0" \
110 "kernel_addr=0x82000000\0" \
111 "fdt_file=zImage.dtb\0" \
112 "fdt_addr=0x81000000\0" \
113 "ram_file=uRamdisk\0" \
114 "ram_addr=0x83000000\0" \
115 "filesys=rootfs.ubifs\0" \
116 "sys_addr=0x81000000\0" \
117 "tftploc=/path/to/tftp/directory/\0" \
118 "nfs_root=/path/to/nfs/root\0" \
119 "tftptimeout=1000\0" \
120 "tftptimeoutcountmax=1000000\0" \
121 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
122 "bootargs_base=setenv bootargs rw " \
123 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
124 "console=ttyLP1,115200n8\0" \
125 "bootargs_sd=setenv bootargs ${bootargs} " \
126 "root=/dev/mmcblk0p2 rootwait\0" \
127 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
128 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
129 "bootargs_nand=setenv bootargs ${bootargs} " \
130 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
131 "bootargs_ram=setenv bootargs ${bootargs} " \
132 "root=/dev/ram rw initrd=${ram_addr}\0" \
133 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
134 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
135 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
136 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
137 "bootz ${kernel_addr} - ${fdt_addr}\0" \
138 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
139 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
140 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
141 "bootz ${kernel_addr} - ${fdt_addr}\0" \
142 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
143 "nand read ${fdt_addr} dtb; " \
144 "nand read ${kernel_addr} kernel; " \
145 "bootz ${kernel_addr} - ${fdt_addr}\0" \
146 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
147 "nand read ${fdt_addr} dtb; " \
148 "nand read ${kernel_addr} kernel; " \
149 "nand read ${ram_addr} root; " \
150 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
151 "update_bootloader_from_tftp=" PCM052_NET_INIT \
152 "if tftp ${blimg_addr} "\
153 "${tftpdir}${blimg_file}; then " \
154 "mtdparts default; " \
155 "nand erase.part bootloader; " \
156 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
157 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
159 "then mtdparts default; " \
160 "nand erase.part kernel; " \
161 "nand write ${kernel_addr} kernel ${filesize}; " \
162 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
163 "nand erase.part dtb; " \
164 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
165 "update_kernel_from_tftp=" PCM052_NET_INIT \
166 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
167 "then setenv fdtsize ${filesize}; " \
168 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
169 "mtdparts default; " \
170 "nand erase.part dtb; " \
171 "nand write ${fdt_addr} dtb ${fdtsize}; " \
172 "nand erase.part kernel; " \
173 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
174 "update_rootfs_from_tftp=" PCM052_NET_INIT \
175 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
176 "then mtdparts default; " \
177 "nand erase.part root; " \
179 "ubi create rootfs; " \
180 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
181 "update_ramdisk_from_tftp=" PCM052_NET_INIT \
182 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
183 "then mtdparts default; " \
184 "nand erase.part root; " \
185 "nand write ${ram_addr} root ${filesize}; fi\0"
187 /* Miscellaneous configurable options */
189 #define CONFIG_SYS_MEMTEST_START 0x80010000
190 #define CONFIG_SYS_MEMTEST_END 0x87C00000
192 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
194 /* Physical memory map */
195 #define CONFIG_NR_DRAM_BANKS 1
196 #define PHYS_SDRAM (0x80000000)
197 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
199 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
200 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
201 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
203 #define CONFIG_SYS_INIT_SP_OFFSET \
204 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
205 #define CONFIG_SYS_INIT_SP_ADDR \
206 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
208 /* environment organization */
209 #ifdef CONFIG_ENV_IS_IN_MMC
210 #define CONFIG_ENV_SIZE (8 * 1024)
212 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
213 #define CONFIG_SYS_MMC_ENV_DEV 0
216 #ifdef CONFIG_ENV_IS_IN_NAND
217 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
218 #define CONFIG_ENV_SIZE (8 * 1024)
219 #define CONFIG_ENV_OFFSET 0xA0000
220 #define CONFIG_ENV_SIZE_REDUND (8 * 1024)
221 #define CONFIG_ENV_OFFSET_REDUND 0xC0000