2 * Copyright (C) Stefano Babic <sbabic@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __PCM058_CONFIG_H
9 #define __PCM058_CONFIG_H
11 #include <config_distro_defaults.h>
14 #define CONFIG_SPL_YMODEM_SUPPORT
15 #define CONFIG_SPL_SPI_LOAD
16 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
20 #include "mx6_common.h"
23 #define CONFIG_IMX_THERMAL
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART2_BASE
28 #define CONFIG_CONSOLE_DEV "ttymxc1"
30 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
33 #define CONFIG_BOARD_EARLY_INIT_F
34 #define CONFIG_BOARD_LATE_INIT
35 #define CONFIG_DISPLAY_BOARDINFO_LATE
38 /* Size of malloc() pool */
39 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
42 #define CONFIG_FEC_MXC
44 #define IMX_FEC_BASE ENET_BASE_ADDR
45 #define CONFIG_FEC_XCV_TYPE RGMII
46 #define CONFIG_ETHPRIME "FEC"
47 #define CONFIG_FEC_MXC_PHYADDR 3
50 #define CONFIG_PHY_MICREL
51 #define CONFIG_PHY_KSZ9031
54 #define CONFIG_MXC_SPI
55 #define CONFIG_SF_DEFAULT_BUS 0
56 #define CONFIG_SF_DEFAULT_CS 0
57 #define CONFIG_SF_DEFAULT_SPEED 20000000
58 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
61 #define CONFIG_SYS_I2C
62 #define CONFIG_SYS_I2C_MXC
63 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
64 #define CONFIG_SYS_I2C_SPEED 100000
66 #ifndef CONFIG_SPL_BUILD
67 #define CONFIG_CMD_NAND
68 /* Enable NAND support */
69 #define CONFIG_CMD_NAND_TRIMFFS
70 #define CONFIG_NAND_MXS
71 #define CONFIG_SYS_MAX_NAND_DEVICE 1
72 #define CONFIG_SYS_NAND_BASE 0x40000000
73 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
74 #define CONFIG_SYS_NAND_ONFI_DETECTION
77 /* DMA stuff, needed for GPMI/MXS NAND support */
78 #define CONFIG_APBH_DMA
79 #define CONFIG_APBH_DMA_BURST
80 #define CONFIG_APBH_DMA_BURST8
82 /* Filesystem support */
84 #define CONFIG_CMD_UBIFS
85 #define CONFIG_CMD_MTDPARTS
86 #define CONFIG_MTD_PARTITIONS
87 #define CONFIG_MTD_DEVICE
88 #define MTDIDS_DEFAULT "nand0=nand"
89 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
91 /* Various command support */
92 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
93 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
94 #define CONFIG_CMD_GSC
95 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
96 #define CONFIG_CMD_UBI
99 /* Physical Memory Map */
100 #define CONFIG_NR_DRAM_BANKS 1
101 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
103 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
104 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
105 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
107 #define CONFIG_SYS_INIT_SP_OFFSET \
108 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
109 #define CONFIG_SYS_INIT_SP_ADDR \
110 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
113 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
114 #define CONFIG_SYS_FSL_USDHC_NUM 1
116 /* Environment organization */
117 #define CONFIG_ENV_IS_IN_SPI_FLASH
118 #define CONFIG_ENV_SIZE (16 * 1024)
119 #define CONFIG_ENV_OFFSET (1024 * SZ_1K)
120 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
121 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
122 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
123 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
124 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
125 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
126 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
127 CONFIG_ENV_SECT_SIZE)
128 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
130 #ifdef CONFIG_ENV_IS_IN_NAND
131 #define CONFIG_ENV_OFFSET (0x1E0000)
132 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)