2 * Configuation settings for the Renesas Solutions r0p7734 board
4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 * SPDX-License-Identifier: GPL-2.0+
12 #define CONFIG_CPU_SH7734 1
13 #define CONFIG_R0P7734 1
14 #define CONFIG_400MHZ_MODE 1
15 /* #define CONFIG_533MHZ_MODE 1 */
17 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
19 #define CONFIG_BOOTARGS "console=ttySC3,115200"
21 #define CONFIG_DISPLAY_BOARDINFO
22 #undef CONFIG_SHOW_BOOT_PROGRESS
25 #define CONFIG_SH_ETHER 1
26 #define CONFIG_SH_ETHER_USE_PORT (0)
27 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
28 #define CONFIG_PHY_SMSC 1
29 #define CONFIG_BITBANGMII
30 #define CONFIG_BITBANGMII_MULTI
31 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
32 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
33 #ifndef CONFIG_SH_ETHER
34 # define CONFIG_SMC911X
35 # define CONFIG_SMC911X_16_BIT
36 # define CONFIG_SMC911X_BASE (0x84000000)
39 /* undef to save memory */
40 #define CONFIG_SYS_LONGHELP
41 /* Monitor Command Prompt */
42 /* Buffer size for input from the Console */
43 #define CONFIG_SYS_CBSIZE 256
44 /* Buffer size for Console output */
45 #define CONFIG_SYS_PBSIZE 256
46 /* max args accepted for monitor commands */
47 #define CONFIG_SYS_MAXARGS 16
48 /* Buffer size for Boot Arguments passed to kernel */
49 #define CONFIG_SYS_BARGSIZE 512
50 /* List of legal baudrate settings for this board */
51 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
55 #define CONFIG_CONS_SCIF3 1
57 /* Suppress display of console information at boot */
60 #define CONFIG_SYS_SDRAM_BASE (0x88000000)
61 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
62 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
64 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
65 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
66 /* Enable alternate, more extensive, memory test */
67 #undef CONFIG_SYS_ALT_MEMTEST
68 /* Scratch address used by the alternate memory test */
69 #undef CONFIG_SYS_MEMTEST_SCRATCH
71 /* Enable temporary baudrate change while serial download */
72 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
75 #define CONFIG_FLASH_CFI_DRIVER 1
76 #define CONFIG_SYS_FLASH_CFI
77 #undef CONFIG_SYS_FLASH_QUIET_TEST
78 #define CONFIG_SYS_FLASH_EMPTY_INFO
79 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
80 #define CONFIG_SYS_MAX_FLASH_SECT 512
82 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
83 #define CONFIG_SYS_MAX_FLASH_BANKS 1
84 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
86 /* Timeout for Flash erase operations (in ms) */
87 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
88 /* Timeout for Flash write operations (in ms) */
89 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
90 /* Timeout for Flash set sector lock bit operations (in ms) */
91 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
92 /* Timeout for Flash clear lock bit operations (in ms) */
93 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
96 * Use hardware flash sectors protection instead
97 * of U-Boot software protection
99 #undef CONFIG_SYS_FLASH_PROTECTION
100 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
102 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
103 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
105 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
106 /* Size of DRAM reserved for malloc() use */
107 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
108 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
111 #define CONFIG_ENV_OVERWRITE 1
112 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
113 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
114 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
115 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
116 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
117 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
120 #if defined(CONFIG_400MHZ_MODE)
121 #define CONFIG_SYS_CLK_FREQ 50000000
123 #define CONFIG_SYS_CLK_FREQ 44444444
125 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
126 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
127 #define CONFIG_SYS_TMU_CLK_DIV 4
129 #endif /* __R0P7734_H */