2 * Configuation settings for the Renesas Solutions r0p7734 board
4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 * SPDX-License-Identifier: GPL-2.0+
12 #define CONFIG_CPU_SH7734 1
13 #define CONFIG_400MHZ_MODE 1
15 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
17 #define CONFIG_DISPLAY_BOARDINFO
18 #undef CONFIG_SHOW_BOOT_PROGRESS
21 #define CONFIG_SH_ETHER 1
22 #define CONFIG_SH_ETHER_USE_PORT (0)
23 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
24 #define CONFIG_PHY_SMSC 1
25 #define CONFIG_BITBANGMII
26 #define CONFIG_BITBANGMII_MULTI
27 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
28 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
30 /* undef to save memory */
31 #define CONFIG_SYS_LONGHELP
32 /* List of legal baudrate settings for this board */
33 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
37 #define CONFIG_CONS_SCIF3 1
39 /* Suppress display of console information at boot */
42 #define CONFIG_SYS_SDRAM_BASE (0x88000000)
43 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
44 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
46 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
47 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
48 /* Enable alternate, more extensive, memory test */
49 #undef CONFIG_SYS_ALT_MEMTEST
50 /* Scratch address used by the alternate memory test */
51 #undef CONFIG_SYS_MEMTEST_SCRATCH
53 /* Enable temporary baudrate change while serial download */
54 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
57 #define CONFIG_FLASH_CFI_DRIVER 1
58 #define CONFIG_SYS_FLASH_CFI
59 #undef CONFIG_SYS_FLASH_QUIET_TEST
60 #define CONFIG_SYS_FLASH_EMPTY_INFO
61 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
62 #define CONFIG_SYS_MAX_FLASH_SECT 512
64 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
65 #define CONFIG_SYS_MAX_FLASH_BANKS 1
66 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
68 /* Timeout for Flash erase operations (in ms) */
69 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
70 /* Timeout for Flash write operations (in ms) */
71 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
72 /* Timeout for Flash set sector lock bit operations (in ms) */
73 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
74 /* Timeout for Flash clear lock bit operations (in ms) */
75 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
78 * Use hardware flash sectors protection instead
79 * of U-Boot software protection
81 #undef CONFIG_SYS_FLASH_PROTECTION
82 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
84 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
85 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
87 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
88 /* Size of DRAM reserved for malloc() use */
89 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
90 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
93 #define CONFIG_ENV_OVERWRITE 1
94 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
95 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
96 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
97 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
98 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
99 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
102 #if defined(CONFIG_400MHZ_MODE)
103 #define CONFIG_SYS_CLK_FREQ 50000000
105 #define CONFIG_SYS_CLK_FREQ 44444444
107 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
108 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
109 #define CONFIG_SYS_TMU_CLK_DIV 4
111 #endif /* __R0P7734_H */