2 * Configuation settings for the Renesas R7780MP board
4 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
7 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_CPU_SH7780 1
15 #define CONFIG_R7780MP 1
16 #define CONFIG_SYS_R7780MP_OLD_FLASH 1
17 #define __LITTLE_ENDIAN__ 1
20 * Command line configuration.
22 #define CONFIG_CMD_SDRAM
23 #define CONFIG_CMD_PCI
24 #define CONFIG_CMD_IDE
25 #define CONFIG_DOS_PARTITION
27 #define CONFIG_SCIF_CONSOLE 1
28 #define CONFIG_BAUDRATE 115200
29 #define CONFIG_CONS_SCIF0 1
31 #define CONFIG_BOOTARGS "console=ttySC0,115200"
32 #define CONFIG_ENV_OVERWRITE 1
34 /* check for keypress on bootdelay==0 */
35 /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
37 #define CONFIG_SYS_TEXT_BASE 0x0FFC0000
38 #define CONFIG_SYS_SDRAM_BASE (0x08000000)
39 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
41 #define CONFIG_SYS_LONGHELP
42 #define CONFIG_SYS_CBSIZE 256
43 #define CONFIG_SYS_PBSIZE 256
44 #define CONFIG_SYS_MAXARGS 16
45 #define CONFIG_SYS_BARGSIZE 512
47 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
48 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
50 /* Flash board support */
51 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
52 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH
53 /* NOR Flash (S29PL127J60TFI130) */
54 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
55 # define CONFIG_SYS_MAX_FLASH_BANKS (2)
56 # define CONFIG_SYS_MAX_FLASH_SECT 270
57 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\
58 CONFIG_SYS_FLASH_BASE + 0x100000,\
59 CONFIG_SYS_FLASH_BASE + 0x400000,\
60 CONFIG_SYS_FLASH_BASE + 0x700000, }
61 #else /* CONFIG_SYS_R7780MP_OLD_FLASH */
62 /* NOR Flash (Spantion S29GL256P) */
63 # define CONFIG_SYS_MAX_FLASH_BANKS (1)
64 # define CONFIG_SYS_MAX_FLASH_SECT 256
65 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
66 #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */
68 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
69 /* Address of u-boot image in Flash */
70 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
71 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
72 /* Size of DRAM reserved for malloc() use */
73 #define CONFIG_SYS_MALLOC_LEN (1204 * 1024)
75 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
76 #define CONFIG_SYS_RX_ETH_BUFFER (8)
78 #define CONFIG_SYS_FLASH_CFI
79 #define CONFIG_FLASH_CFI_DRIVER
80 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
81 #undef CONFIG_SYS_FLASH_QUIET_TEST
82 /* print 'E' for empty sector on flinfo */
83 #define CONFIG_SYS_FLASH_EMPTY_INFO
85 #define CONFIG_ENV_IS_IN_FLASH
86 #define CONFIG_ENV_SECT_SIZE (256 * 1024)
87 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
88 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
89 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000
90 #define CONFIG_SYS_FLASH_WRITE_TOUT 500
93 #define CONFIG_SYS_CLK_FREQ 33333333
94 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
95 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
96 #define CONFIG_SYS_TMU_CLK_DIV 4
99 #if defined(CONFIG_CMD_PCI)
101 #define CONFIG_SH4_PCI
102 #define CONFIG_SH7780_PCI
103 #define CONFIG_SH7780_PCI_LSR 0x07f00001
104 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
105 #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
106 #define CONFIG_PCI_PNP
107 #define CONFIG_PCI_SCAN_SHOW 1
111 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
112 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
113 #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
115 #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */
116 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
117 #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
118 #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
119 #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
120 #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
121 #endif /* CONFIG_CMD_PCI */
123 #if defined(CONFIG_CMD_NET)
124 /* AX88796L Support(NE2000 base chip) */
125 #define CONFIG_DRIVER_AX88796L
126 #define CONFIG_DRIVER_NE2000_BASE 0xA4100000
129 /* Compact flash Support */
130 #if defined(CONFIG_CMD_IDE)
131 #define CONFIG_IDE_RESET 1
132 #define CONFIG_SYS_PIO_MODE 1
133 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
134 #define CONFIG_SYS_IDE_MAXDEVICE 1
135 #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
136 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
137 #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
138 #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
139 #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
140 #define CONFIG_IDE_SWAP_IO
141 #endif /* CONFIG_CMD_IDE */
143 #endif /* __R7780RP_H */