2 * Configuation settings for the Renesas Technology RSK 7203
4 * Copyright (C) 2008 Nobuhiro Iwamatsu
5 * Copyright (C) 2008 Renesas Solutions Corp.
7 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_CPU_SH7203 1
15 #define CONFIG_RSK7203 1
17 #define CONFIG_CMD_SDRAM
19 #define CONFIG_BAUDRATE 115200
20 #define CONFIG_BOOTARGS "console=ttySC0,115200"
21 #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */
23 #define CONFIG_VERSION_VARIABLE
24 #undef CONFIG_SHOW_BOOT_PROGRESS
27 #define RSK7203_SDRAM_BASE 0x0C000000
28 #define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */
29 #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024)
31 #define CONFIG_SYS_TEXT_BASE 0x0C7C0000
32 #define CONFIG_SYS_LONGHELP /* undef to save memory */
33 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
34 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
35 #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
36 /* Buffer size for Boot Arguments passed to kernel */
37 #define CONFIG_SYS_BARGSIZE 512
38 /* List of legal baudrate settings for this board */
39 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
42 #define CONFIG_SCIF_CONSOLE 1
43 #define CONFIG_CONS_SCIF0 1
45 #define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE
46 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024))
48 #define CONFIG_SYS_SDRAM_BASE RSK7203_SDRAM_BASE
49 #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024)
51 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024)
52 #define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1
53 #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
54 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
55 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
58 #define CONFIG_FLASH_CFI_DRIVER
59 #define CONFIG_SYS_FLASH_CFI
60 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
61 #undef CONFIG_SYS_FLASH_QUIET_TEST
62 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
63 #define CONFIG_SYS_FLASH_BASE RSK7203_FLASH_BASE_1
64 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
65 #define CONFIG_SYS_MAX_FLASH_SECT 64
66 #define CONFIG_SYS_MAX_FLASH_BANKS 1
68 #define CONFIG_ENV_IS_IN_FLASH
69 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
70 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
71 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
72 #define CONFIG_SYS_FLASH_ERASE_TOUT 12000
73 #define CONFIG_SYS_FLASH_WRITE_TOUT 500
76 #define CONFIG_SYS_CLK_FREQ 33333333
77 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
78 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
79 #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
80 #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
82 /* Network interface */
83 #define CONFIG_SMC911X
84 #define CONFIG_SMC911X_16_BIT
85 #define CONFIG_SMC911X_BASE (0x24000000)
87 #endif /* __RSK7203_H */