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1 /*
2  * Configuration settings for the SAMA5D2 PTC Engineering board.
3  *
4  * Copyright (C) 2016 Atmel
5  *                    Wenyou Yang <wenyou.yang@atmel.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #include "at91-sama5_common.h"
14
15 /* serial console */
16 #define CONFIG_ATMEL_USART
17 #define CONFIG_USART_BASE               ATMEL_BASE_UART0
18 #define CONFIG_USART_ID                 ATMEL_ID_UART0
19
20 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
21 #define CONFIG_SYS_SDRAM_SIZE           0x20000000
22
23 #ifdef CONFIG_SPL_BUILD
24 #define CONFIG_SYS_INIT_SP_ADDR         0x210000
25 #else
26 #define CONFIG_SYS_INIT_SP_ADDR \
27         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
28 #endif
29
30 #define CONFIG_SYS_LOAD_ADDR            0x22000000 /* load address */
31
32 #undef CONFIG_AT91_GPIO
33 #define CONFIG_ATMEL_PIO4
34
35 /* SDRAM */
36 #define CONFIG_NR_DRAM_BANKS            1
37
38 /* SerialFlash */
39 #ifdef CONFIG_CMD_SF
40 #define CONFIG_ATMEL_SPI
41 #define CONFIG_SPI_FLASH_ATMEL
42 #define CONFIG_SF_DEFAULT_BUS           0
43 #define CONFIG_SF_DEFAULT_CS            0
44 #define CONFIG_SF_DEFAULT_SPEED         30000000
45 #endif
46
47 /* NAND flash */
48 #ifdef CONFIG_CMD_NAND
49 #define CONFIG_NAND_ATMEL
50 #define CONFIG_SYS_MAX_NAND_DEVICE      1
51 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
52 /* our ALE is AD21 */
53 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
54 /* our CLE is AD22 */
55 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
56 #define CONFIG_SYS_NAND_ONFI_DETECTION
57 /* PMECC & PMERRLOC */
58 #define CONFIG_ATMEL_NAND_HWECC
59 #define CONFIG_ATMEL_NAND_HW_PMECC
60 #endif
61
62 /* USB device */
63 #define CONFIG_USB_ETHER
64 #define CONFIG_USB_ETH_RNDIS
65 #define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D2_PTC"
66
67 /* Ethernet Hardware */
68 #define CONFIG_MACB
69 #define CONFIG_RMII
70 #define CONFIG_NET_RETRY_COUNT          20
71 #define CONFIG_MACB_SEARCH_PHY
72
73 #ifdef CONFIG_SYS_USE_NANDFLASH
74 #undef CONFIG_ENV_OFFSET
75 #undef CONFIG_ENV_OFFSET_REDUND
76 #undef CONFIG_BOOTCOMMAND
77 /* u-boot env in nand flash */
78 #define CONFIG_ENV_OFFSET               0x200000
79 #define CONFIG_ENV_OFFSET_REDUND        0x400000
80 #define CONFIG_BOOTCOMMAND              "nand read 0x21000000 0xb80000 0x80000;"        \
81                                         "nand read 0x22000000 0x600000 0x600000;"       \
82                                         "bootz 0x22000000 - 0x21000000"
83 #endif
84
85 /* SPL */
86 #define CONFIG_SPL_FRAMEWORK
87 #define CONFIG_SPL_TEXT_BASE            0x200000
88 #define CONFIG_SPL_MAX_SIZE             0x10000
89 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
90 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
91 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
92 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
93
94 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
95
96 #ifdef CONFIG_SYS_USE_SERIALFLASH
97 #define CONFIG_SPL_SPI_LOAD
98 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x8000
99
100 #elif CONFIG_SYS_USE_NANDFLASH
101 #define CONFIG_SPL_NAND_DRIVERS
102 #define CONFIG_SPL_NAND_BASE
103 #define CONFIG_PMECC_CAP                8
104 #define CONFIG_PMECC_SECTOR_SIZE        512
105 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
106 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
107 #define CONFIG_SYS_NAND_PAGE_SIZE       0x1000
108 #define CONFIG_SYS_NAND_PAGE_COUNT      64
109 #define CONFIG_SYS_NAND_OOBSIZE         224
110 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x40000
111 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
112 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
113 #endif
114
115 #endif