3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * board/config.h - configuration options, board specific
32 * High Level Configuration Options
36 #define CONFIG_X86 1 /* This is a X86 CPU */
37 #define CONFIG_SC520 1 /* Include support for AMD SC520 */
39 #define CFG_SDRAM_PRECHARGE_DELAY 6 /* 6T */
40 #define CFG_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
41 #define CFG_SDRAM_RAS_CAS_DELAY 3 /* 3T */
43 /* define at most one of these */
44 #undef CFG_SDRAM_CAS_LATENCY_2T
45 #define CFG_SDRAM_CAS_LATENCY_3T
47 #define CFG_SC520_HIGH_SPEED 0 /* 100 or 133MHz */
48 #define CFG_RESET_GENERIC 1 /* use tripple-fault to reset cpu */
49 #undef CFG_RESET_SC520 /* use SC520 MMCR's to reset cpu */
50 #undef CFG_TIMER_SC520 /* use SC520 swtimers */
51 #define CFG_TIMER_GENERIC 1 /* use the i8254 PIT timers */
52 #undef CFG_TIMER_TSC /* use the Pentium TSC timers */
54 #define CFG_STACK_SIZE 0x8000 /* Size of bootloader stack */
56 #define CONFIG_SHOW_BOOT_PROGRESS 1
57 #define CONFIG_LAST_STAGE_INIT 1
60 * Size of malloc() pool
62 #define CONFIG_MALLOC_SIZE (CFG_ENV_SIZE + 128*1024)
65 #define CONFIG_BAUDRATE 9600
69 * Command line configuration.
71 #include <config_cmd_default.h>
73 #define CONFIG_CMD_PCI
74 #define CONFIG_CMD_JFFS2
75 #define CONFIG_CMD_IDE
76 #define CONFIG_CMD_NET
77 #define CONFIG_CMD_PCMCIA
78 #define CONFIG_CMD_EEPROM
81 #define CONFIG_BOOTDELAY 15
82 #define CONFIG_BOOTARGS "root=/dev/mtdblock1 console=ttyS0,9600 mtdparts=phys:7936k(root),256k(uboot) "
83 #define CONFIG_BOOTCOMMAND "setenv bootargs root=/dev/nfs ip=autoconf console=ttyS0,9600 mtdparts=phys:7808k(root),128k(env),256k(uboot); bootp; bootm"
85 #if defined(CONFIG_CMD_KGDB)
86 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
87 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
92 * Miscellaneous configurable options
94 #define CFG_LONGHELP /* undef to save memory */
95 #define CFG_PROMPT "boot > " /* Monitor Command Prompt */
96 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
97 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
98 #define CFG_MAXARGS 16 /* max number of command args */
99 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
101 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
102 #define CFG_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
104 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
106 #define CFG_LOAD_ADDR 0x100000 /* default load address */
108 #define CFG_HZ 1024 /* incrementer freq: 1kHz */
110 /* valid baudrates */
111 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
114 /*-----------------------------------------------------------------------
115 * Physical Memory Map
117 #define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of DRAM */
119 /*-----------------------------------------------------------------------
120 * FLASH and environment organization
124 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
125 #define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
127 /* timeout values are in ticks */
128 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
129 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
132 #define CONFIG_SPI_EEPROM /* SPI EEPROMs such as AT25010 or AT25640 */
133 #define CONFIG_MW_EEPROM /* MicroWire EEPROMS such as AT93LC46 */
134 #define CONFIG_DS1722 /* Dallas DS1722 SPI Temperature probe */
137 /* allow to overwrite serial and ethaddr */
138 #define CONFIG_ENV_OVERWRITE
142 /* Environment in flash */
143 #define CFG_ENV_IS_IN_FLASH 1
144 # define CFG_ENV_ADDR (0x387a0000) /* Addr of Environment Sector */
145 # define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector (or 0x10000) */
146 # define CFG_ENV_OFFSET 0
149 /* Environment in EEPROM */
151 # define CFG_ENV_IS_IN_EEPROM 1
153 # define CONFIG_SPI_X 1
154 # define CFG_ENV_SIZE 0x2000 /* Total Size of Environment EEPROM */
155 # define CFG_ENV_OFFSET 0x1c00
163 /* No command line, one static partition, whole device */
164 #undef CONFIG_JFFS2_CMDLINE
165 #define CONFIG_JFFS2_DEV "nor0"
166 #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
167 #define CONFIG_JFFS2_PART_OFFSET 0x00000000
169 /* mtdparts command line support */
170 /* Note: fake mtd_id used, no linux mtd map file */
172 #define CONFIG_JFFS2_CMDLINE
173 #define MTDIDS_DEFAULT "nor0=sc520_spunk-0"
174 #define MTDPARTS_DEFAULT "mtdparts=sc520_spunk-0:-(jffs2)"
177 /*-----------------------------------------------------------------------
180 #define CONFIG_NET_MULTI /* Multi ethernet cards support */
181 #define CONFIG_EEPRO100
182 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
184 /************************************************************
186 ************************************************************/
187 #define CFG_IDE_MAXBUS 2 /* max. 2 IDE busses */
188 #define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
189 #define CFG_ATA_BASE_ADDR 0
190 #define CFG_ATA_IDE0_OFFSET 0x01f0 /* ide0 offset */
191 #define CFG_ATA_IDE1_OFFSET 0xe000 /* ide1 offset */
192 #define CFG_ATA_DATA_OFFSET 0 /* data reg offset */
193 #define CFG_ATA_REG_OFFSET 0 /* reg offset */
194 #define CFG_ATA_ALT_OFFSET 0x200 /* alternate register offset */
196 #define CFG_FIRST_PCMCIA_BUS 1
198 #undef CONFIG_IDE_LED /* no led for ide supported */
199 #undef CONFIG_IDE_RESET /* reset for ide unsupported... */
200 #undef CONFIG_IDE_RESET_ROUTINE /* no special reset function */
202 #define CONFIG_IDE_TI_CARDBUS
203 #define CFG_PCMCIA_CIS_WIN 0x27f00000
204 #define CFG_PCMCIA_CIS_WIN_SIZE 0x00100000
205 #define CFG_PCMCIA_IO_WIN 0xe000
206 #define CFG_PCMCIA_IO_WIN_SIZE 16
208 /************************************************************
209 * DISK Partition support
210 ************************************************************/
211 #define CONFIG_DOS_PARTITION
212 #define CONFIG_MAC_PARTITION
213 #define CONFIG_ISO_PARTITION /* Experimental */
216 /************************************************************
218 ***********************************************************/
219 #define CONFIG_RTC_MC146818
220 #undef CONFIG_WATCHDOG /* watchdog disabled */
225 #define CONFIG_PCI /* include pci support */
226 #define CONFIG_PCI_PNP /* pci plug-and-play */
227 #define CONFIG_PCI_SCAN_SHOW
229 #define CFG_FIRST_PCI_IRQ 9
230 #define CFG_SECOND_PCI_IRQ 10
231 #define CFG_THIRD_PCI_IRQ 11
232 #define CFG_FORTH_PCI_IRQ 12
234 #endif /* __CONFIG_H */