3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Alex Zuepke <azu@sysgo.de>
6 * Configuation settings for the Shannon/TuxScreen/IS2630 WebPhone Board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * Since we use the Inferno-Loader to bring us to live,
32 * we skip the lowlevel init stuff.
33 * But U-Boot still relocates itself into RAM
35 #define CONFIG_INFERNO /* we are using the inferno bootldr */
36 #define CONFIG_SKIP_LOWLEVEL_INIT 1
37 #undef CONFIG_SKIP_RELOCATE_UBOOT
40 * High Level Configuration Options
43 #define CONFIG_SA1100 1 /* This is an SA1100 CPU */
44 #define CONFIG_SHANNON 1 /* on an SHANNON/TuxScreen Board */
46 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
49 * Size of malloc() pool
51 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
52 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
57 #define CONFIG_DRIVER_3C589 1
60 * select serial console configuration
62 #define CONFIG_SERIAL3 1 /* we use SERIAL 3 */
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_BAUDRATE 115200
71 * Command line configuration.
73 #include <config_cmd_default.h>
76 #define CONFIG_BOOTDELAY 3
77 #define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
78 #define CONFIG_NETMASK 255.255.0.0
79 #define CONFIG_BOOTCOMMAND "help"
81 #if defined(CONFIG_CMD_KGDB)
82 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
83 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
87 * Miscellaneous configurable options
89 #define CFG_LONGHELP /* undef to save memory */
90 #define CFG_PROMPT "TuxScreen # " /* Monitor Command Prompt */
91 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
92 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
93 #define CFG_MAXARGS 16 /* max number of command args */
94 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
96 #define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
97 #define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
99 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
101 #define CFG_LOAD_ADDR 0xd0000000 /* default load address */
103 #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
104 #define CFG_CPUSPEED 0x09 /* 190 MHz for Shannon */
106 /* valid baudrates */
107 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
109 #define CONFIG_DOS_PARTITION 1 /* DOS partitiion support */
111 /*-----------------------------------------------------------------------
114 * The stack sizes are set up in start.S using the settings below
116 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
117 #ifdef CONFIG_USE_IRQ
118 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
119 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
122 /*-----------------------------------------------------------------------
123 * Physical Memory Map
126 #define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of EDORAM */
127 #define PHYS_SDRAM_1 0xc0000000 /* RAM Bank #1 */
128 #define PHYS_SDRAM_1_SIZE 0x00400000 /* 4 MB */
129 #define PHYS_SDRAM_2 0xc8000000 /* RAM Bank #2 */
130 #define PHYS_SDRAM_2_SIZE 0x00400000 /* 4 MB */
131 #define PHYS_SDRAM_3 0xd0000000 /* RAM Bank #3 */
132 #define PHYS_SDRAM_3_SIZE 0x00400000 /* 4 MB */
133 #define PHYS_SDRAM_4 0xd8000000 /* RAM Bank #4 */
134 #define PHYS_SDRAM_4_SIZE 0x00400000 /* 4 MB */
137 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
138 #define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */
140 #define CFG_FLASH_BASE PHYS_FLASH_1
142 /*-----------------------------------------------------------------------
143 * FLASH and environment organization
145 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
146 #define CFG_MAX_FLASH_SECT (31+4) /* max number of sectors on one chip */
148 /* timeout values are in ticks */
149 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
150 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
152 #define CFG_ENV_IS_IN_FLASH 1
153 #ifdef CONFIG_INFERNO
154 /* we take the last sector, 128 KB in size, but we only use 4 KB of it for stack reasons */
155 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x003E0000) /* Addr of Environment Sector */
156 #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
158 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
159 #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
162 /*-----------------------------------------------------------------------
164 *-----------------------------------------------------------------------
168 /* we pick the upper one */
170 #define CONFIG_PCMCIA_SLOT_A
172 #define CFG_PCMCIA_IO_ADDR (0x20000000)
173 #define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
174 #define CFG_PCMCIA_DMA_ADDR (0x24000000)
175 #define CFG_PCMCIA_DMA_SIZE ( 64 << 20 )
176 #define CFG_PCMCIA_ATTRB_ADDR (0x2C000000)
177 #define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
178 #define CFG_PCMCIA_MEM_ADDR (0x28000000)
179 #define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
181 /* in fact, MEM and ATTRB are swapped - has to be corrected soon in cmd_pcmcia or so */
183 /*-----------------------------------------------------------------------
184 * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
185 *-----------------------------------------------------------------------
188 #define CONFIG_IDE_PCCARD 1 /* Use IDE with PC Card Adapter */
190 #undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */
191 #undef CONFIG_IDE_LED /* LED for ide not supported */
192 #undef CONFIG_IDE_RESET /* reset for ide not supported */
194 #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
195 #define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
197 #define CFG_ATA_IDE0_OFFSET 0x0000
199 /* it's simple, all regs are in I/O space */
200 #define CFG_ATA_BASE_ADDR CFG_PCMCIA_ATTRB_ADDR
202 /* Offset for data I/O */
203 #define CFG_ATA_DATA_OFFSET 0
205 /* Offset for normal register accesses */
206 #define CFG_ATA_REG_OFFSET 0
208 /* Offset for alternate registers */
209 #define CFG_ATA_ALT_OFFSET 0
211 /*-----------------------------------------------------------------------
214 #endif /* __CONFIG_H */