3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
8 * Configuation settings for the SAMSUNG SMDK2410 board.
10 * SPDX-License-Identifier: GPL-2.0+
17 * High Level Configuration Options
20 #define CONFIG_ARM920T /* This is an ARM920T Core */
21 #define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
22 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
23 #define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
25 #define CONFIG_SYS_TEXT_BASE 0x0
27 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
29 /* input clock of PLL (the SMDK2410 has 12MHz input clock) */
30 #define CONFIG_SYS_CLK_FREQ 12000000
32 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
33 #define CONFIG_SETUP_MEMORY_TAGS
34 #define CONFIG_INITRD_TAG
39 #define CONFIG_CS8900 /* we have a CS8900 on-board */
40 #define CONFIG_CS8900_BASE 0x19000300
41 #define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
44 * select serial console configuration
46 #define CONFIG_S3C24X0_SERIAL
47 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
49 /************************************************************
50 * USB support (currently only works with D-cache off)
51 ************************************************************/
52 #define CONFIG_USB_OHCI
53 #define CONFIG_USB_OHCI_S3C24XX
54 #define CONFIG_USB_KEYBOARD
55 #define CONFIG_USB_STORAGE
56 #define CONFIG_DOS_PARTITION
58 /************************************************************
60 ************************************************************/
61 #define CONFIG_RTC_S3C24X0
64 #define CONFIG_BAUDRATE 115200
69 #define CONFIG_BOOTP_BOOTFILESIZE
70 #define CONFIG_BOOTP_BOOTPATH
71 #define CONFIG_BOOTP_GATEWAY
72 #define CONFIG_BOOTP_HOSTNAME
75 * Command line configuration.
77 #include <config_cmd_default.h>
79 #define CONFIG_CMD_BSP
80 #define CONFIG_CMD_CACHE
81 #define CONFIG_CMD_DATE
82 #define CONFIG_CMD_DHCP
83 #define CONFIG_CMD_ELF
84 #define CONFIG_CMD_NAND
85 #define CONFIG_CMD_PING
86 #define CONFIG_CMD_REGINFO
87 #define CONFIG_CMD_USB
89 #define CONFIG_SYS_HUSH_PARSER
90 #define CONFIG_CMDLINE_EDITING
93 #define CONFIG_BOOTDELAY 5
94 #define CONFIG_BOOT_RETRY_TIME -1
95 #define CONFIG_RESET_TO_RETRY
96 #define CONFIG_ZERO_BOOTDELAY_CHECK
98 #define CONFIG_NETMASK 255.255.255.0
99 #define CONFIG_IPADDR 10.0.0.110
100 #define CONFIG_SERVERIP 10.0.0.1
102 #if defined(CONFIG_CMD_KGDB)
103 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
104 /* what's this ? it's not used anywhere */
105 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
109 * Miscellaneous configurable options
111 #define CONFIG_SYS_LONGHELP /* undef to save memory */
112 #define CONFIG_SYS_PROMPT "SMDK2410 # "
113 #define CONFIG_SYS_CBSIZE 256
114 /* Print Buffer Size */
115 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
116 sizeof(CONFIG_SYS_PROMPT)+16)
117 #define CONFIG_SYS_MAXARGS 16
118 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
120 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
122 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
123 #define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
125 #define CONFIG_SYS_LOAD_ADDR 0x30800000
127 /* support additional compression methods */
132 /*-----------------------------------------------------------------------
133 * Physical Memory Map
135 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
136 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
137 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
139 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
141 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
143 /*-----------------------------------------------------------------------
144 * FLASH and environment organization
147 #define CONFIG_SYS_FLASH_CFI
148 #define CONFIG_FLASH_CFI_DRIVER
149 #define CONFIG_FLASH_CFI_LEGACY
150 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
151 #define CONFIG_FLASH_SHOW_PROGRESS 45
153 #define CONFIG_SYS_MAX_FLASH_BANKS 1
154 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
155 #define CONFIG_SYS_MAX_FLASH_SECT (19)
157 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
158 #define CONFIG_ENV_IS_IN_FLASH
159 #define CONFIG_ENV_SIZE 0x10000
160 /* allow to overwrite serial and ethaddr */
161 #define CONFIG_ENV_OVERWRITE
164 * Size of malloc() pool
165 * BZIP2 / LZO / LZMA need a lot of RAM
167 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
169 #define CONFIG_SYS_MONITOR_LEN (448 * 1024)
170 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
175 #ifdef CONFIG_CMD_NAND
176 #define CONFIG_NAND_S3C2410
177 #define CONFIG_SYS_S3C2410_NAND_HWECC
178 #define CONFIG_SYS_MAX_NAND_DEVICE 1
179 #define CONFIG_SYS_NAND_BASE 0x4E000000
185 #define CONFIG_CMD_FAT
186 #define CONFIG_CMD_EXT2
187 #define CONFIG_CMD_UBI
188 #define CONFIG_CMD_UBIFS
189 #define CONFIG_CMD_MTDPARTS
190 #define CONFIG_MTD_DEVICE
191 #define CONFIG_MTD_PARTITIONS
192 #define CONFIG_YAFFS2
193 #define CONFIG_RBTREE
195 /* additions for new relocation code, must be added to all boards */
196 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
197 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
198 GENERATED_GBL_DATA_SIZE)
200 #define CONFIG_BOARD_EARLY_INIT_F
202 #endif /* __CONFIG_H */