3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
9 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
11 * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board.
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36 * High Level Configuration Options
39 #define CONFIG_S3C6400 1 /* in a SAMSUNG S3C6400 SoC */
40 #define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
41 #define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */
43 #define CONFIG_SKIP_RELOCATE_UBOOT
45 #define CONFIG_PERIPORT_REMAP
46 #define CONFIG_PERIPORT_BASE 0x70000000
47 #define CONFIG_PERIPORT_SIZE 0x13
49 #define CONFIG_SYS_SDRAM_BASE 0x50000000
51 /* input clock of PLL: SMDK6400 has 12MHz input clock */
52 #define CONFIG_SYS_CLK_FREQ 12000000
54 #if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
55 #define CONFIG_ENABLE_MMU
58 #define CONFIG_SETUP_MEMORY_TAGS
59 #define CONFIG_CMDLINE_TAG
60 #define CONFIG_INITRD_TAG
63 * Architecture magic and machine type
65 #define MACH_TYPE 1270
67 #define CONFIG_DISPLAY_CPUINFO
68 #define CONFIG_DISPLAY_BOARDINFO
71 * Size of malloc() pool
73 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
78 #define CONFIG_NET_MULTI
79 #define CONFIG_CS8900 /* we have a CS8900 on-board */
80 #define CONFIG_CS8900_BASE 0x18800300
81 #define CONFIG_CS8900_BUS16 /* follow the Linux driver */
84 * select serial console configuration
86 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK6400 */
88 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
89 #ifdef CONFIG_SYS_HUSH_PARSER
90 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
93 #define CONFIG_CMDLINE_EDITING
95 /* allow to overwrite serial and ethaddr */
96 #define CONFIG_ENV_OVERWRITE
98 #define CONFIG_BAUDRATE 115200
100 /***********************************************************
102 ***********************************************************/
103 #include <config_cmd_default.h>
105 #define CONFIG_CMD_CACHE
106 #define CONFIG_CMD_REGINFO
107 #define CONFIG_CMD_LOADS
108 #define CONFIG_CMD_LOADB
109 #define CONFIG_CMD_SAVEENV
110 #define CONFIG_CMD_NAND
111 #if defined(CONFIG_BOOT_ONENAND)
112 #define CONFIG_CMD_ONENAND
114 #define CONFIG_CMD_PING
115 #define CONFIG_CMD_ELF
116 #define CONFIG_CMD_FAT
117 #define CONFIG_CMD_EXT2
119 #define CONFIG_BOOTDELAY 3
121 #define CONFIG_ZERO_BOOTDELAY_CHECK
123 #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
124 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
125 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
129 * Miscellaneous configurable options
131 #define CONFIG_SYS_LONGHELP /* undef to save memory */
132 #define CONFIG_SYS_PROMPT "SMDK6400 # " /* Monitor Command Prompt */
133 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
134 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
135 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
136 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
138 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */
139 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
141 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */
143 #define CONFIG_SYS_HZ 1000
145 /* valid baudrates */
146 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
148 /*-----------------------------------------------------------------------
151 * The stack sizes are set up in start.S using the settings below
153 #define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */
155 /**********************************
156 Support Clock Settings
157 **********************************
159 ----------------------------------
164 **********************************/
166 /*#define CONFIG_CLK_667_133_66*/
167 #define CONFIG_CLK_533_133_66
169 #define CONFIG_CLK_400_100_50
170 #define CONFIG_CLK_400_133_66
171 #define CONFIG_SYNC_MODE
174 /* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */
175 #define CONFIG_NR_DRAM_BANKS 1
176 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
177 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */
179 #define CONFIG_SYS_FLASH_BASE 0x10000000
180 #define CONFIG_SYS_MONITOR_BASE 0x00000000
182 /*-----------------------------------------------------------------------
183 * FLASH and environment organization
185 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
186 /* AM29LV160B has 35 sectors, AM29LV800B - 19 */
187 #define CONFIG_SYS_MAX_FLASH_SECT 40
189 #define CONFIG_AMD_LV800
190 #define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */
191 /* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */
192 #define CONFIG_FLASH_CFI_DRIVER 1
193 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
194 #define CONFIG_FLASH_CFI_LEGACY
195 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
197 /* timeout values are in ticks */
198 #define CONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
199 #define CONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
201 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
204 * SMDK6400 board specific data
207 #define CONFIG_IDENT_STRING " for SMDK6400"
209 /* base address for uboot */
210 #define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x07e00000)
211 /* total memory available to uboot */
212 #define CONFIG_SYS_UBOOT_SIZE (1024 * 1024)
214 /* Put environment copies after the end of U-Boot owned RAM */
215 #define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
217 #ifdef CONFIG_ENABLE_MMU
218 #define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000
219 #define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;" \
222 #define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE
223 #define CONFIG_BOOTCOMMAND "nand read 0x50018000 0x60000 0x1c0000;" \
227 /* NAND U-Boot load and start address */
228 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000)
230 #define CONFIG_ENV_OFFSET 0x0040000
232 /* NAND configuration */
233 #define CONFIG_SYS_MAX_NAND_DEVICE 1
234 #define CONFIG_SYS_NAND_BASE 0x70200010
235 #define CONFIG_SYS_S3C_NAND_HWECC
237 #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
238 #define CONFIG_SYS_NAND_WP 1
239 #define CONFIG_SYS_NAND_YAFFS_WRITE 1 /* support yaffs write */
240 #define CONFIG_SYS_NAND_BBT_2NDPAGE 1 /* bad-block markers in 1st and 2nd pages */
242 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE /* NUB load-addr */
243 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* NUB start-addr */
245 #define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) /* Offset to RAM U-Boot image */
246 #define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) /* Size of RAM U-Boot image */
248 /* NAND chip page size */
249 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
250 /* NAND chip block size */
251 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
252 /* NAND chip page per block count */
253 #define CONFIG_SYS_NAND_PAGE_COUNT 64
254 /* Location of the bad-block label */
255 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
256 /* Extra address cycle for > 128MiB */
257 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
259 /* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
260 #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
261 /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
262 #define CONFIG_SYS_NAND_ECCBYTES 4
263 /* Number of ECC-blocks per NAND page */
264 #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
265 /* Size of a single OOB region */
266 #define CONFIG_SYS_NAND_OOBSIZE 64
267 /* Number of ECC bytes per page */
268 #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
269 /* ECC byte positions */
270 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
271 48, 49, 50, 51, 52, 53, 54, 55, \
272 56, 57, 58, 59, 60, 61, 62, 63}
274 /* Boot configuration (define only one of next 3) */
275 #define CONFIG_BOOT_NAND
276 /* None of these are currently implemented. Left from the original Samsung
277 * version for reference
278 #define CONFIG_BOOT_NOR
279 #define CONFIG_BOOT_MOVINAND
280 #define CONFIG_BOOT_ONENAND
284 #define CONFIG_NAND_S3C64XX
285 /* Unimplemented or unsupported. See comment above.
286 #define CONFIG_ONENAND
287 #define CONFIG_MOVINAND
290 /* Settings as above boot configuration */
291 #define CONFIG_ENV_IS_IN_NAND
292 #define CONFIG_BOOTARGS "console=ttySAC,115200"
294 #if !defined(CONFIG_ENABLE_MMU)
295 #define CONFIG_CMD_USB 1
296 #define CONFIG_USB_S3C64XX
297 #define CONFIG_USB_OHCI_NEW 1
298 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000
299 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400"
300 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
301 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
303 #define CONFIG_USB_STORAGE 1
305 #define CONFIG_DOS_PARTITION 1
307 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU)
308 # error "usb_ohci.c is currently broken with MMU enabled."
311 #endif /* __CONFIG_H */