2 * Bluewater Systems Snapper 9260 and 9G20 modules
4 * (C) Copyright 2011 Bluewater Systems
5 * Author: Andre Renaud <andre@bluewatersys.com>
6 * Author: Ryan Mallon <ryan@bluewatersys.com>
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 /* SoC type is defined in boards.cfg */
31 #include <asm/hardware.h>
32 #include <asm/sizes.h>
34 #define CONFIG_SYS_TEXT_BASE 0x20000000
36 /* ARM asynchronous clock */
37 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
38 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
39 #define CONFIG_SYS_HZ 1000
42 #define CONFIG_ARCH_CPU_INIT
44 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
45 #define CONFIG_SETUP_MEMORY_TAGS
46 #define CONFIG_INITRD_TAG
47 #define CONFIG_SKIP_LOWLEVEL_INIT
48 #define CONFIG_SKIP_RELOCATE_UBOOT
49 #define CONFIG_DISPLAY_CPUINFO
53 #define CONFIG_NR_DRAM_BANKS 1
54 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
55 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
56 #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
57 GENERATED_GBL_DATA_SIZE)
59 /* Mem test settings */
60 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
61 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
64 #define CONFIG_NAND_ATMEL
65 #define CONFIG_SYS_NO_FLASH
66 #define CONFIG_SYS_MAX_NAND_DEVICE 1
67 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
68 #define CONFIG_SYS_NAND_DBW_8
69 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
70 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
71 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
72 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
77 #define CONFIG_NET_RETRY_COUNT 20
78 #define CONFIG_RESET_PHY_R
79 #define CONFIG_TFTP_PORT
80 #define CONFIG_TFTP_TSIZE
83 #define CONFIG_USB_ATMEL
84 #define CONFIG_USB_OHCI_NEW
85 #define CONFIG_DOS_PARTITION
86 #define CONFIG_SYS_USB_OHCI_CPU_INIT
87 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
88 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
89 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
90 #define CONFIG_USB_STORAGE
92 /* GPIOs and IO expander */
93 #define CONFIG_AT91_LEGACY
94 #define CONFIG_ATMEL_LEGACY
95 #define CONFIG_AT91_GPIO
96 #define CONFIG_AT91_GPIO_PULLUP 1
97 #define CONFIG_PCA953X
98 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x28
99 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} }
101 /* UARTs/Serial console */
102 #define CONFIG_ATMEL_USART
103 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
104 #define CONFIG_USART_ID ATMEL_ID_SYS
105 #define CONFIG_BAUDRATE 115200
106 #define CONFIG_SYS_PROMPT "Snapper> "
108 /* I2C - Bit-bashed */
109 #define CONFIG_SOFT_I2C
110 #define CONFIG_SYS_I2C_SPEED 100000
111 #define CONFIG_SYS_I2C_SLAVE 0x7F
112 #define CONFIG_SOFT_I2C_READ_REPEATED_START
113 #define CONFIG_I2C_MULTI_BUS
114 #define I2C_INIT do { \
115 at91_set_gpio_output(AT91_PIN_PA23, 1); \
116 at91_set_gpio_output(AT91_PIN_PA24, 1); \
117 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
118 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
120 #define I2C_SOFT_DECLARATIONS
122 #define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1);
123 #define I2C_READ at91_get_gpio_value(AT91_PIN_PA23);
124 #define I2C_SDA(bit) do { \
126 at91_set_gpio_input(AT91_PIN_PA23, 1); \
128 at91_set_gpio_output(AT91_PIN_PA23, 1); \
129 at91_set_gpio_value(AT91_PIN_PA23, bit); \
132 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
133 #define I2C_DELAY udelay(2)
136 #define CONFIG_SYS_LOAD_ADDR 0x23000000
137 #define CONFIG_BOOTDELAY 3
138 #define CONFIG_ZERO_BOOTDELAY_CHECK
140 #define CONFIG_BOOTP_BOOTFILESIZE
141 #define CONFIG_BOOTP_BOOTPATH
142 #define CONFIG_BOOTP_GATEWAY
143 #define CONFIG_BOOTP_HOSTNAME
145 /* Environment settings */
146 #define CONFIG_ENV_IS_IN_NAND
147 #define CONFIG_ENV_OFFSET (512 << 10)
148 #define CONFIG_ENV_SIZE (256 << 10)
149 #define CONFIG_ENV_OVERWRITE
150 #define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any"
152 /* Console settings */
153 #define CONFIG_SYS_CBSIZE 256
154 #define CONFIG_SYS_MAXARGS 16
155 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
156 sizeof(CONFIG_SYS_PROMPT) + 16)
157 #define CONFIG_SYS_LONGHELP
158 #define CONFIG_CMDLINE_EDITING
159 #define CONFIG_AUTO_COMPLETE
160 #define CONFIG_SYS_HUSH_PARSER
162 /* U-Boot memory settings */
163 #define CONFIG_SYS_MALLOC_LEN (1 << 20)
165 /* Command line configuration */
166 #include <config_cmd_default.h>
167 #undef CONFIG_CMD_BDI
168 #undef CONFIG_CMD_FPGA
169 #undef CONFIG_CMD_IMI
170 #undef CONFIG_CMD_IMLS
171 #undef CONFIG_CMD_LOADS
172 #undef CONFIG_CMD_SOURCE
174 #define CONFIG_CMD_PING
175 #define CONFIG_CMD_DHCP
176 #define CONFIG_CMD_FAT
177 #define CONFIG_CMD_I2C
178 #undef CONFIG_CMD_GPIO
179 #define CONFIG_CMD_USB
180 #define CONFIG_CMD_MII
181 #define CONFIG_CMD_NAND
182 #define CONFIG_CMD_PCA953X
183 #define CONFIG_CMD_PCA953X_INFO
185 #endif /* __CONFIG_H */