2 * Copyright (C) ST-Ericsson SA 2009
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #define CONFIG_SKIP_LOWLEVEL_INIT
31 #define CONFIG_SNOWBALL
32 #define CONFIG_SYS_ICACHE_OFF
33 #define CONFIG_SYS_DCACHE_OFF
36 * High Level Configuration Options
42 #define CONFIG_SYS_MEMTEST_START 0x00000000
43 #define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF
44 #define CONFIG_SYS_HZ 1000 /* must be 1000 */
46 /*-----------------------------------------------------------------------
47 * Size of environment and malloc() pool
50 * If you use U-Boot as crash kernel, make sure that it does not overwrite
51 * information saved by kexec during panic. Kexec expects the start
52 * address of the executable 32K above "crashkernel" address.
55 * Size of malloc() pool
57 #define CONFIG_ENV_SIZE (8*1024)
58 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024)
60 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
62 #define CONFIG_ENV_IS_IN_MMC
63 #define CONFIG_CMD_ENV
64 #define CONFIG_CMD_SAVEENV
65 #define CONFIG_ENV_OFFSET 0x0118000
66 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */
71 #define CONFIG_PL011_SERIAL
72 #define CONFIG_PL011_SERIAL_RLCR
73 #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
76 * U8500 UART registers base for 3 serial devices
78 #define CFG_UART0_BASE 0x80120000
79 #define CFG_UART1_BASE 0x80121000
80 #define CFG_UART2_BASE 0x80007000
81 #define CFG_SERIAL0 CFG_UART0_BASE
82 #define CFG_SERIAL1 CFG_UART1_BASE
83 #define CFG_SERIAL2 CFG_UART2_BASE
84 #define CONFIG_PL011_CLOCK 38400000
85 #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
87 #define CONFIG_CONS_INDEX 2
88 #define CONFIG_BAUDRATE 115200
91 * Devices and file systems
94 #define CONFIG_GENERIC_MMC
95 #define CONFIG_DOS_PARTITION
100 #define CONFIG_CMD_MEMORY
101 #define CONFIG_CMD_BOOTD
102 #define CONFIG_CMD_BDI
103 #define CONFIG_CMD_IMI
104 #define CONFIG_CMD_MISC
105 #define CONFIG_CMD_RUN
106 #define CONFIG_CMD_ECHO
107 #define CONFIG_CMD_CONSOLE
108 #define CONFIG_CMD_LOADS
109 #define CONFIG_CMD_LOADB
110 #define CONFIG_CMD_MMC
111 #define CONFIG_CMD_FAT
112 #define CONFIG_CMD_EXT2
113 #define CONFIG_CMD_SOURCE
115 #ifndef CONFIG_BOOTDELAY
116 #define CONFIG_BOOTDELAY 1
118 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
120 #undef CONFIG_BOOTARGS
121 #define CONFIG_BOOTCOMMAND \
123 "if run loadbootscript; " \
124 "then run bootscript; " \
127 "then run mmcboot; " \
130 "if run emmcloadbootscript; " \
131 "then run bootscript; " \
133 "if run emmcload; " \
134 "then run emmcboot; " \
136 "echo No media to boot from; " \
142 #define CONFIG_EXTRA_ENV_SETTINGS \
144 "loadaddr=0x00100000\0" \
145 "console=ttyAMA2,115200n8\0" \
146 "loadbootscript=fatload mmc 1:1 ${loadaddr} boot.scr\0" \
147 "emmcloadbootscript=fatload mmc 0:2 ${loadaddr} boot.scr\0" \
148 "bootscript=echo Running bootscript " \
149 "from mmc ...; source ${loadaddr}\0" \
150 "memargs256=mem=96M@0 mem_modem=32M@96M mem=32M@128M " \
151 "hwmem=22M@160M pmem_hwb=42M@182M mem_mali=32@224M\0" \
152 "memargs512=mem=96M@0 mem_modem=32M@96M hwmem=32M@128M " \
153 "mem=64M@160M mem_mali=32M@224M " \
154 "pmem_hwb=128M@256M mem=128M@384M\0" \
155 "memargs1024=mem=128M@0 mali.mali_mem=32M@128M " \
156 "hwmem=168M@M160M mem=48M@328M " \
157 "mem_issw=1M@383M mem=640M@384M\0" \
158 "memargs=setenv bootargs ${bootargs} ${memargs1024}\0" \
159 "emmcload=fatload mmc 0:2 ${loadaddr} uImage\0" \
160 "mmcload=fatload mmc 1:1 ${loadaddr} uImage\0" \
161 "commonargs=setenv bootargs console=${console} " \
163 "emmcargs=setenv bootargs ${bootargs} " \
164 "root=/dev/mmcblk0p3 " \
166 "addcons=setenv bootargs ${bootargs} " \
167 "console=${console}\0" \
168 "emmcboot=echo Booting from eMMC ...; " \
169 "run commonargs emmcargs memargs; " \
170 "bootm ${loadaddr}\0" \
171 "mmcargs=setenv bootargs ${bootargs} " \
172 "root=/dev/mmcblk1p2 " \
173 "rootwait earlyprintk\0" \
174 "mmcboot=echo Booting from external MMC ...; " \
175 "run commonargs mmcargs memargs; " \
176 "bootm ${loadaddr}\0" \
177 "fdt_high=0x2BC00000\0" \
178 "stdout=serial,usbtty\0" \
179 "stdin=serial,usbtty\0" \
180 "stderr=serial,usbtty\0"
182 /*-----------------------------------------------------------------------
183 * Miscellaneous configurable options
186 #define CONFIG_SYS_LONGHELP /* undef to save memory */
187 #define CONFIG_SYS_PROMPT "U8500 $ " /* Monitor Command Prompt */
188 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
190 /* Print Buffer Size */
191 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
192 + sizeof(CONFIG_SYS_PROMPT) + 16)
193 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
194 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
196 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
197 #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
198 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1
200 #define CONFIG_SYS_HUSH_PARSER 1
201 #define CONFIG_CMDLINE_EDITING
203 #define CONFIG_SETUP_MEMORY_TAGS 2
204 #define CONFIG_INITRD_TAG 1
205 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
208 * Physical Memory Map
210 #define CONFIG_NR_DRAM_BANKS 1
211 #define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */
214 * additions for new relocation code
216 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
217 #define CONFIG_SYS_MAX_RAM_SIZE 0x40000000
218 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
219 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
220 CONFIG_SYS_INIT_RAM_SIZE - \
221 GENERATED_GBL_DATA_SIZE)
222 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
224 /* landing address before relocation */
225 #ifndef CONFIG_SYS_TEXT_BASE
226 #define CONFIG_SYS_TEXT_BASE 0x0
230 * FLASH and environment organization
232 #define CONFIG_SYS_NO_FLASH
235 * base register values for U8500
237 #define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock */
241 * U8500 GPIO register base for 9 banks
243 #define CONFIG_DB8500_GPIO
244 #define CFG_GPIO_0_BASE 0x8012E000
245 #define CFG_GPIO_1_BASE 0x8012E080
246 #define CFG_GPIO_2_BASE 0x8000E000
247 #define CFG_GPIO_3_BASE 0x8000E080
248 #define CFG_GPIO_4_BASE 0x8000E100
249 #define CFG_GPIO_5_BASE 0x8000E180
250 #define CFG_GPIO_6_BASE 0x8011E000
251 #define CFG_GPIO_7_BASE 0x8011E080
252 #define CFG_GPIO_8_BASE 0xA03FE000
254 #define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */
256 #endif /* __CONFIG_H */