2 * Copyright (C) 2015-2017 Altera Corporation <www.altera.com>
4 * SPDX-License-Identifier: GPL-2.0
7 #ifndef __CONFIG_SOCFGPA_ARRIA10_H__
8 #define __CONFIG_SOCFGPA_ARRIA10_H__
10 #include <asm/arch/base_addr_a10.h>
12 #define CONFIG_FAT_WRITE
13 #define CONFIG_HW_WATCHDOG
16 #define CONFIG_LOADADDR 0x01000000
17 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
20 * U-Boot general configurations
23 #define CONFIG_SYS_DCACHE_OFF
25 /* Memory configurations */
26 #define PHYS_SDRAM_1_SIZE 0x40000000
28 /* Ethernet on SoC (EMAC) */
29 #if defined(CONFIG_CMD_NET)
30 #define CONFIG_PHY_MICREL
31 #define CONFIG_PHY_MICREL_KSZ9031
35 * U-Boot environment configurations
37 #define CONFIG_ENV_IS_IN_MMC
40 * arguments passed to the bootz command. The value of
41 * CONFIG_BOOTARGS goes into the environment value "bootargs".
42 * Do note the value will overide also the chosen node in FDT blob.
44 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
47 * Serial / UART configurations
49 #define CONFIG_SYS_NS16550_MEM32
50 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
55 /* reload value when timer count to zero */
56 #define TIMER_LOAD_VAL 0xFFFFFFFF
59 * Flash configurations
61 #define CONFIG_SYS_MAX_FLASH_BANKS 1
63 /* The rest of the configuration is shared */
64 #include <configs/socfpga_common.h>
66 #endif /* __CONFIG_SOCFGPA_ARRIA10_H__ */