2 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
6 #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
7 #define __CONFIG_SOCFPGA_CYCLONE5_H__
9 #include <asm/arch/socfpga_base_addrs.h>
10 #include "../../board/altera/socfpga/qts/pinmux_config.h"
13 #define CONFIG_SYS_NO_FLASH
14 #define CONFIG_DOS_PARTITION
15 #define CONFIG_FAT_WRITE
16 #define CONFIG_HW_WATCHDOG
18 #define CONFIG_CMD_ASKENV
19 #define CONFIG_CMD_BOOTZ
20 #define CONFIG_CMD_CACHE
21 #define CONFIG_CMD_DFU
22 #define CONFIG_CMD_DHCP
23 #define CONFIG_CMD_EXT4
24 #define CONFIG_CMD_EXT4_WRITE
25 #define CONFIG_CMD_FAT
26 #define CONFIG_CMD_FS_GENERIC
27 #define CONFIG_CMD_GREPENV
28 #define CONFIG_CMD_MII
29 #define CONFIG_CMD_MMC
30 #define CONFIG_CMD_PING
31 #define CONFIG_CMD_USB
32 #define CONFIG_CMD_USB_MASS_STORAGE
35 /* Memory configurations */
36 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
39 #define CONFIG_BOOTDELAY 3
40 #define CONFIG_BOOTFILE "zImage"
41 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
42 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
43 #define CONFIG_BOOTCOMMAND "run ramboot"
45 #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
47 #define CONFIG_LOADADDR 0x8000
48 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
50 /* Ethernet on SoC (EMAC) */
51 #if defined(CONFIG_CMD_NET)
52 #define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS
53 #define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
56 #define CONFIG_PHY_MICREL
57 #define CONFIG_PHY_MICREL_KSZ9021
58 #define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
59 #define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0
60 #define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew"
61 #define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
67 #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
69 #define CONFIG_G_DNL_MANUFACTURER "Altera"
71 /* Extra Environment */
72 #define CONFIG_HOSTNAME socfpga_cyclone5
74 #define CONFIG_EXTRA_ENV_SETTINGS \
76 "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
77 "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
78 "bootm ${loadaddr} - ${fdt_addr}\0" \
79 "bootimage=zImage\0" \
81 "fdtimage=socfpga.dtb\0" \
82 "fsloadcmd=ext2load\0" \
83 "bootm ${loadaddr} - ${fdt_addr}\0" \
84 "mmcroot=/dev/mmcblk0p2\0" \
85 "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
86 " root=${mmcroot} rw rootwait;" \
87 "bootz ${loadaddr} - ${fdt_addr}\0" \
88 "mmcload=mmc rescan;" \
89 "load mmc 0:1 ${loadaddr} ${bootimage};" \
90 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
91 "qspiroot=/dev/mtdblock0\0" \
92 "qspirootfstype=jffs2\0" \
93 "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
94 " root=${qspiroot} rw rootfstype=${qspirootfstype};"\
95 "bootm ${loadaddr} - ${fdt_addr}\0"
97 /* The rest of the configuration is shared */
98 #include <configs/socfpga_common.h>
100 #endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */