2 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
6 #ifndef __CONFIG_SAMTEC_VINING_FPGA_H__
7 #define __CONFIG_SAMTEC_VINING_FPGA_H__
9 #include <asm/arch/base_addr_ac5.h>
12 #define CONFIG_FAT_WRITE
13 #define CONFIG_HW_WATCHDOG
15 #define CONFIG_CMD_EEPROM
17 /* Memory configurations */
18 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
21 #define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
22 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
23 #define CONFIG_BOOTCOMMAND "run selboot"
24 #define CONFIG_LOADADDR 0x01000000
25 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
28 #ifdef CONFIG_CMD_EEPROM
29 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
30 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
31 #define CONFIG_SYS_I2C_EEPROM_BUS 0
32 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
33 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
44 /* Ethernet on SoC (EMAC) */
45 #if defined(CONFIG_CMD_NET)
46 #define CONFIG_BOOTP_SEND_HOSTNAME
48 #define CONFIG_PHY_MICREL
49 #define CONFIG_PHY_MICREL_KSZ9021
52 /* Extra Environment */
53 #define CONFIG_HOSTNAME socfpga_vining_fpga
56 * Active LOW GPIO buttons:
57 * A: GPIO 77 ... the button between USB B and ethernet
58 * B: GPIO 78 ... the button between USB A ports
61 * if button B is not pressed, boot normal Linux system immediatelly
62 * if button B is pressed, wait $bootdelay and boot recovery system
64 #define CONFIG_PREBOOT \
65 "setenv hostname vining-${unit_serial} ; " \
66 "setenv PS1 \"${unit_ident} (${unit_serial}) => \" ; " \
67 "if gpio input 78 ; then " \
68 "setenv bootdelay 10 ; " \
69 "setenv boottype rcvr ; " \
71 "setenv bootdelay 5 ; " \
72 "setenv boottype norm ; " \
75 #define CONFIG_EXTRA_ENV_SETTINGS \
79 "bootscript=boot.scr\0" \
82 "ubipart=ubi0:rootfs\0" \
83 "ubisfcs=1\0" /* Default is flash at CS#1 */ \
85 "hostname=vining_fpga\0" \
86 "kernel_addr_r=0x10000000\0" \
87 "mtdparts_0=ff705000.spi.0:" \
93 "-(rcvrfs)\0" /* Recovery */ \
94 "mtdparts_1=ff705000.spi.1:" \
97 "update_filename=u-boot-with-spl-dtb.sfp\0" \
98 "update_qspi_offset=0x0\0" \
99 "update_qspi=" /* Update the QSPI firmware */ \
100 "if sf probe ; then " \
101 "if tftp ${update_filename} ; then " \
102 "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
105 "fpga_filename=output_file.rbf\0" \
106 "load_fpga=" /* Load FPGA bitstream */ \
107 "if tftp ${fpga_filename} ; then " \
108 "fpga load 0 $loadaddr $filesize ; " \
112 "setenv bootargs ${bootargs} " \
113 "console=${consdev},${baudrate}\0" \
115 "setenv bootargs ${bootargs} " \
116 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
117 "${netmask}:${hostname}:${netdev}:off\0" \
119 "setenv bootargs ${bootargs} ${miscargs}\0" \
121 "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
122 "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
123 "addargs=run addcons addmtd addmisc\0" \
125 "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
126 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
128 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
129 "miscargs=nohlt panic=1\0" \
131 "setenv bootargs ubi.mtd=${ubimtdnr} " \
132 "root=${ubipart} rootfstype=ubifs\0" \
134 "setenv bootargs root=/dev/nfs rw " \
135 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
137 "if test \"${boottype}\" = \"rcvr\" ; then " \
138 "setenv ubisfcs 0 ; " \
139 "setenv ubimtd rcvrfs ; " \
140 "setenv ubimtdnr 5 ; " \
141 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
142 "setenv mtdids nor0=ff705000.spi.0 ; " \
143 "setenv ubipart ubi0:rootfs ; " \
145 "setenv ubisfcs 1 ; " \
146 "setenv ubimtd rootfs ; " \
147 "setenv ubimtdnr 6 ; " \
148 "setenv mtdparts mtdparts=${mtdparts_1} ; " \
149 "setenv mtdids nor0=ff705000.spi.1 ; " \
150 "setenv ubipart ubi0:rootfs ; " \
152 "sf probe 0:${ubisfcs}\0" \
154 "run ubi_sfsel ubiload ubiargs addargs ; " \
155 "bootm ${kernel_addr_r}\0" \
157 "run ubiload nfsargs addip addargs ; " \
158 "bootm ${kernel_addr_r}\0" \
160 "run netload ubiargs addargs ; " \
161 "bootm ${kernel_addr_r}\0" \
163 "run netload nfsargs addip addargs ; " \
164 "bootm ${kernel_addr_r}\0" \
165 "selboot=" /* Select from where to boot. */ \
166 "if test \"${bootmode}\" = \"qspi\" ; then " \
168 "if test \"${boottype}\" = \"rcvr\" ; then " \
169 "echo \"Booting recovery system\" ; " \
170 "led 3 on ; " /* Bottom RED */ \
172 "led 1 on ; " /* Top RED */ \
174 "else echo \"Unsupported boot mode: \"${bootmode} ; " \
177 #define CONFIG_CMD_UBIFS
178 #define CONFIG_RBTREE
180 #define MTDPARTS_DEFAULT \
181 "mtdparts=ff705000.spi.0:" \
187 "-(rcvrfs);" /* Recovery */ \
189 #define CONFIG_ENV_IS_IN_SPI_FLASH
190 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
191 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
192 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
193 #define CONFIG_ENV_OFFSET 0x100000
194 #define CONFIG_ENV_OFFSET_REDUND \
195 (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
197 #define CONFIG_MISC_INIT_R
199 /* Support changing the prompt string */
200 #define CONFIG_CMDLINE_PS_SUPPORT
202 /* The rest of the configuration is shared */
203 #include <configs/socfpga_common.h>
205 #endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */