1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
10 /* ram memory-related information */
11 #define CONFIG_NR_DRAM_BANKS 1
12 #define PHYS_SDRAM_1 0x40000000
13 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
14 #define PHYS_SDRAM_1_SIZE 0x3E000000
15 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 /* default load addr */
17 #define CONFIG_SYS_HZ_CLOCK 1000000000 /* 1 GHz */
21 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
23 #define BOOT_TARGET_DEVICES(func) \
27 #include <config_distro_bootcmd.h>
28 #define CONFIG_BOOTFILE "uImage"
29 #define CONFIG_EXTRA_ENV_SETTINGS \
30 "kernel_addr_r=0x40000000\0" \
31 "fdtfile=stih410-b2260.dtb\0" \
32 "fdt_addr_r=0x47000000\0" \
33 "scriptaddr=0x50000000\0" \
34 "fdt_high=0xffffffffffffffff\0" \
35 "initrd_high=0xffffffffffffffff\0" \
36 "ramdisk_addr_r=0x48000000\0" \
40 #define CONFIG_ENV_SIZE 0x4000
43 #define CONFIG_CMD_ASKENV
45 #define CONFIG_SETUP_MEMORY_TAGS
47 /* Size of malloc() pool */
48 #define CONFIG_SYS_MALLOC_LEN 0x1800000
49 #define CONFIG_SYS_GBL_DATA_SIZE 1024 /* Global data structures */
50 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
51 CONFIG_SYS_MALLOC_LEN - \
52 CONFIG_SYS_GBL_DATA_SIZE)
54 /* Monitor Command Prompt */
55 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
57 #define CONFIG_SYS_MAX_FLASH_BANKS 1
59 #define CONFIG_SKIP_LOWLEVEL_INIT
62 #define CONFIG_USB_OHCI_NEW
63 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
65 #define CONFIG_USB_HOST_ETHER
66 #define CONFIG_USB_ETHER_ASIX
67 #define CONFIG_USB_ETHER_MCS7830
68 #define CONFIG_USB_ETHER_SMSC95XX
72 #endif /* __CONFIG_H */