]> git.sur5r.net Git - u-boot/blob - include/configs/stm32f746-disco.h
SPDX: Convert all of our single license tags to Linux Kernel style
[u-boot] / include / configs / stm32f746-disco.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4  * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
5  */
6
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9
10 #define CONFIG_SYS_FLASH_BASE           0x08000000
11 #define CONFIG_SYS_INIT_SP_ADDR         0x20050000
12
13 #ifdef CONFIG_SUPPORT_SPL
14 #define CONFIG_SYS_LOAD_ADDR            0x08008000
15 #else
16 #define CONFIG_SYS_LOAD_ADDR            0xC0400000
17 #define CONFIG_LOADADDR                 0xC0400000
18 #endif
19
20 /*
21  * Configuration of the external SDRAM memory
22  */
23 #define CONFIG_NR_DRAM_BANKS            1
24
25 #define CONFIG_SYS_MAX_FLASH_SECT       8
26 #define CONFIG_SYS_MAX_FLASH_BANKS      1
27
28 #define CONFIG_ENV_SIZE                 (8 << 10)
29
30 #define CONFIG_STM32_FLASH
31
32 #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL  (8)
33 #define CONFIG_DW_ALTDESCRIPTOR
34 #define CONFIG_MII
35 #define CONFIG_PHY_SMSC
36
37 #define CONFIG_SYS_CLK_FREQ             200000000 /* 200 MHz */
38 #define CONFIG_SYS_HZ_CLOCK             1000000 /* Timer is clocked at 1MHz */
39
40 #define CONFIG_CMDLINE_TAG
41 #define CONFIG_SETUP_MEMORY_TAGS
42 #define CONFIG_INITRD_TAG
43 #define CONFIG_REVISION_TAG
44
45 #define CONFIG_SYS_CBSIZE               1024
46
47 #define CONFIG_SYS_MALLOC_LEN           (1 * 1024 * 1024)
48
49 #define CONFIG_BOOTCOMMAND                                              \
50         "run bootcmd_romfs"
51
52 #define CONFIG_EXTRA_ENV_SETTINGS \
53         "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
54         "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
55         "bootm 0x08044000 - 0x08042000\0"
56
57
58 /*
59  * Command line configuration.
60  */
61 #define CONFIG_CMD_CACHE
62 #define CONFIG_BOARD_LATE_INIT
63 #define CONFIG_DISPLAY_BOARDINFO
64
65 /* For SPL */
66 #ifdef CONFIG_SUPPORT_SPL
67 #define CONFIG_SPL_STACK                CONFIG_SYS_INIT_SP_ADDR
68 #define CONFIG_SPL_TEXT_BASE            CONFIG_SYS_FLASH_BASE
69 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
70 #define CONFIG_SYS_SPL_LEN              0x00008000
71 #define CONFIG_SYS_UBOOT_START          0x080083FD
72 #define CONFIG_SYS_UBOOT_BASE           (CONFIG_SYS_FLASH_BASE + \
73                                          CONFIG_SYS_SPL_LEN)
74
75 /* DT blob (fdt) address */
76 #define CONFIG_SYS_FDT_BASE             (CONFIG_SYS_FLASH_BASE + \
77                                         0x1C0000)
78 #endif
79 /* For SPL ends */
80
81 /* For splashcreen */
82 #ifdef CONFIG_DM_VIDEO
83 #define CONFIG_VIDEO_BMP_RLE8
84 #define CONFIG_BMP_16BPP
85 #define CONFIG_BMP_24BPP
86 #define CONFIG_BMP_32BPP
87 #define CONFIG_SPLASH_SCREEN
88 #define CONFIG_SPLASH_SCREEN_ALIGN
89 #endif
90
91 #endif /* __CONFIG_H */