git.sur5r.net Git - u-boot/blob - include/configs/thunderx_88xx.h

   1 /**
   2  * (C) Copyright 2014, Cavium Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5 **/
   6
   7 #ifndef __THUNDERX_88XX_H__
   8 #define __THUNDERX_88XX_H__
   9
  10 #define CONFIG_REMAKE_ELF
  11
  12 #define CONFIG_THUNDERX
  13
  14 #define CONFIG_SYS_64BIT
  15
  16 #define MEM_BASE                        0x00500000
  17
  18 #define CONFIG_SYS_LOWMEM_BASE          MEM_BASE
  19
  20 /* Link Definitions */
  21 #define CONFIG_SYS_TEXT_BASE            0x00500000
  22 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  23
  24 /* SMP Spin Table Definitions */
  25 #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  26
  27 /* Generic Timer Definitions */
  28 #define COUNTER_FREQUENCY               (0x1800000)     /* 24MHz */
  29
  30 #define CONFIG_SYS_MEMTEST_START        MEM_BASE
  31 #define CONFIG_SYS_MEMTEST_END          (MEM_BASE + PHYS_SDRAM_1_SIZE)
  32
  33 /* Size of malloc() pool */
  34 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  35
  36 /* PL011 Serial Configuration */
  37
  38 #define CONFIG_PL01X_SERIAL
  39 #define CONFIG_PL011_CLOCK              24000000
  40 #define CONFIG_CONS_INDEX               1
  41
  42 /* Generic Interrupt Controller Definitions */
  43 #define GICD_BASE                       (0x801000000000)
  44 #define GICR_BASE                       (0x801000002000)
  45 #define CONFIG_SYS_SERIAL0              0x87e024000000
  46 #define CONFIG_SYS_SERIAL1              0x87e025000000
  47
  48 /* BOOTP options */
  49 #define CONFIG_BOOTP_BOOTFILESIZE
  50 #define CONFIG_BOOTP_BOOTPATH
  51 #define CONFIG_BOOTP_GATEWAY
  52 #define CONFIG_BOOTP_HOSTNAME
  53 #define CONFIG_BOOTP_PXE
  54
  55 /* Miscellaneous configurable options */
  56 #define CONFIG_SYS_LOAD_ADDR            (MEM_BASE)
  57
  58 /* Physical Memory Map */
  59 #define CONFIG_NR_DRAM_BANKS            1
  60 #define PHYS_SDRAM_1                    (MEM_BASE)        /* SDRAM Bank #1 */
  61 #define PHYS_SDRAM_1_SIZE               (0x80000000-MEM_BASE)   /* 2048 MB */
  62 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  63
  64 /* Initial environment variables */
  65 #define UBOOT_IMG_HEAD_SIZE             0x40
  66 /* C80000 - 0x40 */
  67 #define CONFIG_EXTRA_ENV_SETTINGS       \
  68                                         "kernel_addr=08007ffc0\0"       \
  69                                         "fdt_addr=0x94C00000\0"         \
  70                                         "fdt_high=0x9fffffff\0"
  71
  72 /* Do not preserve environment */
  73 #define CONFIG_ENV_SIZE                 0x1000
  74
  75 /* Monitor Command Prompt */
  76 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
  77 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
  78                                          sizeof(CONFIG_SYS_PROMPT) + 16)
  79 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  80 #define CONFIG_SYS_LONGHELP
  81 #define CONFIG_CMDLINE_EDITING          1
  82 #define CONFIG_SYS_MAXARGS              64              /* max command args */
  83 #define CONFIG_NO_RELOCATION            1
  84 #define CONFIG_LIB_RAND
  85 #define PLL_REF_CLK                     50000000        /* 50 MHz */
  86 #define NS_PER_REF_CLK_TICK             (1000000000/PLL_REF_CLK)
  87
  88 #endif /* __THUNDERX_88XX_H__ */