2 * (C) Copyright 2002-2003
3 * Gary Jennejohn <gj@denx.de>
5 * Configuation settings for the TRAB board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #ifdef CONFIG_OLD_VERSION /* Old configuration: */
30 #define CONFIG_RAM_16MB /* 16 MB SDRAM */
31 #define CONFIG_FLASH_8MB /* 8 MB Flash */
35 * If we are developing, we might want to start armboot from ram
36 * so we MUST NOT initialize critical regs like mem-timing ...
38 #define CONFIG_INIT_CRITICAL /* undef for developing */
41 * High Level Configuration Options
44 #define CONFIG_ARM920T 1 /* This is an arm920t CPU */
45 #define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
46 #define CONFIG_TRAB 1 /* on a TRAB Board */
47 #undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
48 #define LITTLEENDIAN 1 /* used by usb_ohci.c */
50 /* automatic software updates (see board/trab/auto_update.c) */
51 #define CONFIG_AUTO_UPDATE 1
53 /* input clock of PLL */
54 #define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
56 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
58 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
59 #define CONFIG_SETUP_MEMORY_TAGS 1
60 #define CONFIG_INITRD_TAG 1
63 /***********************************************************
65 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
66 * address 0x54 with 8bit addressing
67 ***********************************************************/
68 #define CONFIG_HARD_I2C /* I2C with hardware support */
69 #define CFG_I2C_SPEED 100000 /* I2C speed */
70 #define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
72 #define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
73 #define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
75 #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
76 #define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
77 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
80 #define CONFIG_USB_OHCI 1
81 #define CONFIG_USB_STORAGE 1
82 #define CONFIG_DOS_PARTITION 1
85 * Size of malloc() pool
87 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
92 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
93 #define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
94 #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
96 #define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
98 #define CONFIG_VFD 1 /* VFD linear frame buffer driver */
99 #define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
102 * select serial console configuration
104 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
106 #define CONFIG_HWFLOW /* include RTS/CTS flow control support */
108 #define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
110 #define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
113 * The following enables modem debugging stuff. The dbg() and
114 * 'char screen[1024]' are used for debug printfs. Unfortunately,
115 * it is usable only from BDI
117 #undef CONFIG_MODEM_SUPPORT_DEBUG
119 /* allow to overwrite serial and ethaddr */
120 #define CONFIG_ENV_OVERWRITE
122 #define CONFIG_BAUDRATE 115200
124 #define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
126 /* Use s3c2400's RTC */
127 #define CONFIG_RTC_S3C24X0 1
130 #define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
132 #define CONFIG_COMMANDS_ADD_HWFLOW 0
136 #define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
138 #define CONFIG_COMMANDS_ADD_VFD 0
141 #ifdef CONFIG_DRIVER_S3C24X0_I2C
142 #define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
143 #define CONFIG_COMMANDS_I2C CFG_CMD_I2C
145 #define CONFIG_COMMANDS_ADD_EEPROM 0
146 #define CONFIG_COMMANDS_I2C 0
150 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
153 CONFIG_COMMANDS_ADD_HWFLOW | \
154 CONFIG_COMMANDS_ADD_VFD | \
155 CONFIG_COMMANDS_ADD_EEPROM | \
158 CONFIG_COMMANDS_I2C )
160 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
163 CONFIG_COMMANDS_ADD_HWFLOW | \
164 CONFIG_COMMANDS_ADD_VFD | \
165 CONFIG_COMMANDS_ADD_EEPROM | \
168 CONFIG_COMMANDS_I2C )
172 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
174 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
175 #include <cmd_confdefs.h>
177 #define CONFIG_BOOTDELAY 5
178 #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
179 #define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
180 #define CONFIG_BOOTARGS "console=ttyS0"
181 #define CONFIG_NETMASK 255.255.0.0
182 #define CONFIG_IPADDR 192.168.3.68
183 #define CONFIG_HOSTNAME trab
184 #define CONFIG_SERVERIP 192.168.3.1
185 #define CONFIG_BOOTCOMMAND "run flash_nfs"
187 #ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
188 #ifdef CFG_HUSH_PARSER
189 #define CONFIG_EXTRA_ENV_SETTINGS \
190 "nfs_args=setenv bootargs root=/dev/nfs rw " \
191 "nfsroot=$serverip:$rootpath\0" \
192 "rootpath=/opt/eldk/arm_920TDI\0" \
193 "ram_args=setenv bootargs root=/dev/ram rw\0" \
194 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
195 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
196 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
197 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
198 "load=tftp C100000 ${u-boot}\0" \
199 "update=protect off 0 5FFFF;era 0 5FFFF;" \
200 "cp.b C100000 0 $filesize\0" \
201 "loadfile=/tftpboot/TRAB/uImage\0" \
202 "loadaddr=c400000\0" \
203 "net_load=tftpboot $loadaddr $loadfile\0" \
204 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
205 "kernel_addr=000C0000\0" \
206 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
208 "mdm_init2=ATS0=1\0" \
209 "mdm_flow_control=rts/cts\0"
210 #else /* !CFG_HUSH_PARSER */
211 #define CONFIG_EXTRA_ENV_SETTINGS \
212 "nfs_args=setenv bootargs root=/dev/nfs rw " \
213 "nfsroot=$(serverip):$(rootpath)\0" \
214 "rootpath=/opt/eldk/arm_920TDI\0" \
215 "ram_args=setenv bootargs root=/dev/ram rw\0" \
216 "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
217 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
218 "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
219 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
220 "load=tftp C100000 $(u-boot)\0" \
221 "update=protect off 0 5FFFF;era 0 5FFFF;" \
222 "cp.b C100000 0 $(filesize)\0" \
223 "loadfile=/tftpboot/TRAB/uImage\0" \
224 "loadaddr=c400000\0" \
225 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
226 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
227 "kernel_addr=000C0000\0" \
228 "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
230 "mdm_init2=ATS0=1\0" \
231 "mdm_flow_control=rts/cts\0"
232 #endif /* CFG_HUSH_PARSER */
233 #else /* CONFIG_FLASH_8MB => 8 MB flash */
234 #ifdef CFG_HUSH_PARSER
235 #define CONFIG_EXTRA_ENV_SETTINGS \
236 "nfs_args=setenv bootargs root=/dev/nfs rw " \
237 "nfsroot=$serverip:$rootpath\0" \
238 "rootpath=/opt/eldk/arm_920TDI\0" \
239 "ram_args=setenv bootargs root=/dev/ram rw\0" \
240 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
241 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
242 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
243 "u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
244 "load=tftp C100000 ${u-boot}\0" \
245 "update=protect off 0 3FFFF;era 0 3FFFF;" \
246 "cp.b C100000 0 $filesize;" \
247 "setenv filesize;saveenv\0" \
248 "loadfile=/tftpboot/TRAB/uImage\0" \
249 "loadaddr=C400000\0" \
250 "net_load=tftpboot $loadaddr $loadfile\0" \
251 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
252 "kernel_addr=000C0000\0" \
253 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
255 "mdm_init2=ATS0=1\0" \
256 "mdm_flow_control=rts/cts\0"
257 #else /* !CFG_HUSH_PARSER */
258 #define CONFIG_EXTRA_ENV_SETTINGS \
259 "nfs_args=setenv bootargs root=/dev/nfs rw " \
260 "nfsroot=$(serverip):$(rootpath)\0" \
261 "rootpath=/opt/eldk/arm_920TDI\0" \
262 "ram_args=setenv bootargs root=/dev/ram rw\0" \
263 "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
264 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
265 "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
266 "u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
267 "load=tftp C100000 $(u-boot)\0" \
268 "update=protect off 0 3FFFF;era 0 3FFFF;" \
269 "cp.b C100000 0 $(filesize);" \
270 "setenv filesize;saveenv\0" \
271 "loadfile=/tftpboot/TRAB/uImage\0" \
272 "loadaddr=C400000\0" \
273 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
274 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
275 "kernel_addr=000C0000\0" \
276 "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
278 "mdm_init2=ATS0=1\0" \
279 "mdm_flow_control=rts/cts\0"
280 #endif /* CFG_HUSH_PARSER */
281 #endif /* CONFIG_FLASH_8MB */
283 #if 0 /* disabled for development */
284 #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
285 #define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
286 #define CONFIG_AUTOBOOT_DELAY_STR "system" /* 1st password */
289 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
290 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
291 /* what's this ? it's not used anywhere */
292 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
296 * Miscellaneous configurable options
298 #define CFG_LONGHELP /* undef to save memory */
299 #define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
300 #ifdef CFG_HUSH_PARSER
301 #define CFG_PROMPT_HUSH_PS2 "> "
304 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
305 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
306 #define CFG_MAXARGS 16 /* max number of command args */
307 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
309 #define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
310 #define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
312 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
314 #define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
316 #ifdef CONFIG_TRAB_50MHZ
317 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
318 /* it to wrap 100 times (total 1562500) to get 1 sec. */
319 /* this should _really_ be calculated !! */
320 #define CFG_HZ 1562500
322 /* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
323 /* it to wrap 100 times (total 1039000) to get 1 sec. */
324 /* this should _really_ be calculated !! */
325 #define CFG_HZ 1039000
328 /* valid baudrates */
329 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
331 #define CONFIG_MISC_INIT_R /* have misc_init_r() function */
333 /*-----------------------------------------------------------------------
336 #define BURN_IN_CYCLE_DELAY 20 /* delay in sec between burn-in test cycles */
338 /*-----------------------------------------------------------------------
341 * The stack sizes are set up in start.S using the settings below
343 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
344 #ifdef CONFIG_USE_IRQ
345 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
346 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
349 /*-----------------------------------------------------------------------
350 * Physical Memory Map
352 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
353 #define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
354 #ifndef CONFIG_RAM_16MB
355 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
357 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
360 #define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
362 /* The following #defines are needed to get flash environment right */
363 #define CFG_MONITOR_BASE CFG_FLASH_BASE
364 #define CFG_MONITOR_LEN (256 << 10)
366 /*-----------------------------------------------------------------------
367 * FLASH and environment organization
369 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
370 #ifndef CONFIG_FLASH_8MB
371 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
373 #define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
376 /* timeout values are in ticks */
377 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
378 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
380 #define CFG_ENV_IS_IN_FLASH 1
382 /* Address and size of Primary Environment Sector */
383 #ifndef CONFIG_FLASH_8MB
384 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
385 #define CFG_ENV_SIZE 0x4000
386 #define CFG_ENV_SECT_SIZE 0x20000
388 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
389 #define CFG_ENV_SIZE 0x4000
390 #define CFG_ENV_SECT_SIZE 0x4000
393 /* Address and size of Redundant Environment Sector */
394 #define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
395 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
397 /* Initial value of the on-board touch screen brightness */
398 #define CFG_BRIGHTNESS 0x20
400 #endif /* __CONFIG_H */