2 * (C) Copyright 2002-2005
3 * Gary Jennejohn <gj@denx.de>
5 * Configuation settings for the TRAB board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * Default configuration is with 8 MB Flash, 32 MB RAM
32 #if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB))
33 # define CONFIG_FLASH_8MB /* 8 MB Flash */
35 #if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB))
36 # define CONFIG_RAM_32MB /* 32 MB SDRAM */
40 * High Level Configuration Options
43 #define CONFIG_ARM920T 1 /* This is an arm920t CPU */
44 #define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
45 #define CONFIG_TRAB 1 /* on a TRAB Board */
46 #undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
47 #define LITTLEENDIAN 1 /* used by usb_ohci.c */
49 /* automatic software updates (see board/trab/auto_update.c) */
50 #define CONFIG_AUTO_UPDATE 1
52 /* input clock of PLL */
53 #define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
55 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
57 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
58 #define CONFIG_SETUP_MEMORY_TAGS 1
59 #define CONFIG_INITRD_TAG 1
61 #define CFG_DEVICE_NULLDEV 1 /* enble null device */
62 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
64 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
66 /***********************************************************
68 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
69 * address 0x54 with 8bit addressing
70 ***********************************************************/
71 #define CONFIG_HARD_I2C /* I2C with hardware support */
72 #define CFG_I2C_SPEED 100000 /* I2C speed */
73 #define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
75 #define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
76 #define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
78 #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
79 #define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
80 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
83 #define CONFIG_USB_OHCI 1
84 #define CONFIG_USB_STORAGE 1
85 #define CONFIG_DOS_PARTITION 1
88 * Size of malloc() pool
90 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
91 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
96 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
97 #define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
98 #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
100 #define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
102 #define CONFIG_VFD 1 /* VFD linear frame buffer driver */
103 #define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
106 * select serial console configuration
108 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
110 #define CONFIG_HWFLOW /* include RTS/CTS flow control support */
112 #define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
114 #define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
117 * The following enables modem debugging stuff. The dbg() and
118 * 'char screen[1024]' are used for debug printfs. Unfortunately,
119 * it is usable only from BDI
121 #undef CONFIG_MODEM_SUPPORT_DEBUG
123 /* allow to overwrite serial and ethaddr */
124 #define CONFIG_ENV_OVERWRITE
126 #define CONFIG_BAUDRATE 115200
128 #define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
130 /* Use s3c2400's RTC */
131 #define CONFIG_RTC_S3C24X0 1
135 * Command line configuration.
137 #include <config_cmd_default.h>
139 #define CONFIG_CMD_BSP
140 #define CONFIG_CMD_DATE
141 #define CONFIG_CMD_DHCP
142 #define CONFIG_CMD_FAT
143 #define CONFIG_CMD_NFS
144 #define CONFIG_CMD_SNTP
145 #define CONFIG_CMD_USB
148 #define CONFIG_CMD_HWFLOW
152 #define CONFIG_CMD_VFD
155 #ifdef CONFIG_DRIVER_S3C24X0_I2C
156 #define CONFIG_CMD_EEPROM
157 #define CONFIG_CMD_I2C
161 #undef CONFIG_CMD_CACHE
166 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
168 #define CONFIG_BOOTDELAY 5
169 #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
170 #define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
171 #define CONFIG_BOOTARGS "console=ttyS0"
172 #define CONFIG_NETMASK 255.255.0.0
173 #define CONFIG_IPADDR 192.168.3.68
174 #define CONFIG_HOSTNAME trab
175 #define CONFIG_SERVERIP 192.168.3.1
176 #define CONFIG_BOOTCOMMAND "burn_in"
178 #ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
179 #ifdef CFG_HUSH_PARSER
180 #define CONFIG_EXTRA_ENV_SETTINGS \
181 "nfs_args=setenv bootargs root=/dev/nfs rw " \
182 "nfsroot=$serverip:$rootpath\0" \
183 "rootpath=/opt/eldk/arm_920TDI\0" \
184 "ram_args=setenv bootargs root=/dev/ram rw\0" \
185 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
186 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
187 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
188 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
189 "load=tftp C100000 ${u-boot}\0" \
190 "update=protect off 0 5FFFF;era 0 5FFFF;" \
191 "cp.b C100000 0 $filesize\0" \
192 "loadfile=/tftpboot/TRAB/uImage\0" \
193 "loadaddr=c400000\0" \
194 "net_load=tftpboot $loadaddr $loadfile\0" \
195 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
196 "kernel_addr=00060000\0" \
197 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
199 "mdm_init2=ATS0=1\0" \
200 "mdm_flow_control=rts/cts\0"
201 #else /* !CFG_HUSH_PARSER */
202 #define CONFIG_EXTRA_ENV_SETTINGS \
203 "nfs_args=setenv bootargs root=/dev/nfs rw " \
204 "nfsroot=${serverip}:${rootpath}\0" \
205 "rootpath=/opt/eldk/arm_920TDI\0" \
206 "ram_args=setenv bootargs root=/dev/ram rw\0" \
207 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
208 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
209 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
210 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
211 "load=tftp C100000 ${u-boot}\0" \
212 "update=protect off 0 5FFFF;era 0 5FFFF;" \
213 "cp.b C100000 0 ${filesize}\0" \
214 "loadfile=/tftpboot/TRAB/uImage\0" \
215 "loadaddr=c400000\0" \
216 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
217 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
218 "kernel_addr=000C0000\0" \
219 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
221 "mdm_init2=ATS0=1\0" \
222 "mdm_flow_control=rts/cts\0"
223 #endif /* CFG_HUSH_PARSER */
224 #else /* CONFIG_FLASH_8MB => 8 MB flash */
225 #ifdef CFG_HUSH_PARSER
226 #define CONFIG_EXTRA_ENV_SETTINGS \
227 "nfs_args=setenv bootargs root=/dev/nfs rw " \
228 "nfsroot=$serverip:$rootpath\0" \
229 "rootpath=/opt/eldk/arm_920TDI\0" \
230 "ram_args=setenv bootargs root=/dev/ram rw\0" \
231 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
232 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
233 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
234 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
235 "load=tftp C100000 ${u-boot}\0" \
236 "update=protect off 0 3FFFF;era 0 3FFFF;" \
237 "cp.b C100000 0 $filesize;" \
238 "setenv filesize;saveenv\0" \
239 "loadfile=/tftpboot/TRAB/uImage\0" \
240 "loadaddr=C400000\0" \
241 "net_load=tftpboot $loadaddr $loadfile\0" \
242 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
243 "kernel_addr=000C0000\0" \
244 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
246 "mdm_init2=ATS0=1\0" \
247 "mdm_flow_control=rts/cts\0"
248 #else /* !CFG_HUSH_PARSER */
249 #define CONFIG_EXTRA_ENV_SETTINGS \
250 "nfs_args=setenv bootargs root=/dev/nfs rw " \
251 "nfsroot=${serverip}:${rootpath}\0" \
252 "rootpath=/opt/eldk/arm_920TDI\0" \
253 "ram_args=setenv bootargs root=/dev/ram rw\0" \
254 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
255 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
256 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
257 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
258 "load=tftp C100000 ${u-boot}\0" \
259 "update=protect off 0 3FFFF;era 0 3FFFF;" \
260 "cp.b C100000 0 ${filesize};" \
261 "setenv filesize;saveenv\0" \
262 "loadfile=/tftpboot/TRAB/uImage\0" \
263 "loadaddr=C400000\0" \
264 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
265 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
266 "kernel_addr=000C0000\0" \
267 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
269 "mdm_init2=ATS0=1\0" \
270 "mdm_flow_control=rts/cts\0"
271 #endif /* CFG_HUSH_PARSER */
272 #endif /* CONFIG_FLASH_8MB */
274 #if 1 /* feel free to disable for development */
275 #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
276 #define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
277 #define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */
280 #if defined(CONFIG_CMD_KGDB)
281 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
282 /* what's this ? it's not used anywhere */
283 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
287 * Miscellaneous configurable options
289 #define CFG_LONGHELP /* undef to save memory */
290 #define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
291 #ifdef CFG_HUSH_PARSER
292 #define CFG_PROMPT_HUSH_PS2 "> "
295 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
296 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
297 #define CFG_MAXARGS 16 /* max number of command args */
298 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
300 #define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
301 #define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
303 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
305 #define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
307 #ifdef CONFIG_TRAB_50MHZ
308 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
309 /* it to wrap 100 times (total 1562500) to get 1 sec. */
310 /* this should _really_ be calculated !! */
311 #define CFG_HZ 1562500
313 /* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
314 /* it to wrap 100 times (total 1039000) to get 1 sec. */
315 /* this should _really_ be calculated !! */
316 #define CFG_HZ 1039000
319 /* valid baudrates */
320 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
322 #define CONFIG_MISC_INIT_R /* have misc_init_r() function */
324 /*-----------------------------------------------------------------------
325 * burn-in test stuff.
327 * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
328 * Because the burn-in test itself causes also an delay of about 4 seconds,
329 * this time must be subtracted from the desired overall burn-in cycle time.
331 #define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
333 /*-----------------------------------------------------------------------
336 * The stack sizes are set up in start.S using the settings below
338 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
339 #ifdef CONFIG_USE_IRQ
340 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
341 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
344 /*-----------------------------------------------------------------------
345 * Physical Memory Map
347 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
348 #define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
349 #ifndef CONFIG_RAM_16MB
350 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
352 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
355 #define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
357 /* The following #defines are needed to get flash environment right */
358 #define CFG_MONITOR_BASE CFG_FLASH_BASE
359 #define CFG_MONITOR_LEN (256 << 10)
361 /* Dynamic MTD partition support */
362 #define CONFIG_JFFS2_CMDLINE
363 #define MTDIDS_DEFAULT "nor0=0"
365 /* production flash layout */
366 #define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \
369 "336k(Firmware2)ro," \
375 /*-----------------------------------------------------------------------
376 * FLASH and environment organization
378 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
379 #ifndef CONFIG_FLASH_8MB
380 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
382 #define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
385 /* timeout values are in ticks */
386 #define CFG_FLASH_ERASE_TOUT (15*CFG_HZ) /* Timeout for Flash Erase */
387 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
389 #define CFG_ENV_IS_IN_FLASH 1
391 /* Address and size of Primary Environment Sector */
392 #ifndef CONFIG_FLASH_8MB
393 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
394 #define CFG_ENV_SIZE 0x4000
395 #define CFG_ENV_SECT_SIZE 0x20000
397 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
398 #define CFG_ENV_SIZE 0x4000
399 #define CFG_ENV_SECT_SIZE 0x4000
402 /* Address and size of Redundant Environment Sector */
403 #define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
404 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
406 /* Initial value of the on-board touch screen brightness */
407 #define CFG_BRIGHTNESS 0x20
409 #endif /* __CONFIG_H */