git.sur5r.net Git - u-boot/blob - include/configs/warp7.h

   1 /*
   2  * Copyright (C) 2016 NXP Semiconductors
   3  *
   4  * Configuration settings for the i.MX7S Warp board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __WARP7_CONFIG_H
  10 #define __WARP7_CONFIG_H
  11
  12 #define CONFIG_BOOTDELAY                1
  13 #include "mx7_common.h"
  14
  15 #define PHYS_SDRAM_SIZE                 SZ_512M
  16
  17 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
  18
  19
  20 /* Size of malloc() pool */
  21 #define CONFIG_SYS_MALLOC_LEN           (32 * SZ_1M)
  22
  23 #define CONFIG_BOARD_EARLY_INIT_F
  24
  25 /* MMC Config*/
  26 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
  27 #define CONFIG_SUPPORT_EMMC_BOOT
  28 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
  29 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
  30
  31 #define CONFIG_DFU_ENV_SETTINGS \
  32         "dfu_alt_info=image raw 0 0x800000;"\
  33                 "u-boot raw 0 0x4000;"\
  34                 "bootimg part 0 1;"\
  35                 "rootfs part 0 2\0" \
  36
  37 #define CONFIG_EXTRA_ENV_SETTINGS \
  38         CONFIG_DFU_ENV_SETTINGS \
  39         "script=boot.scr\0" \
  40         "image=zImage\0" \
  41         "console=ttymxc0\0" \
  42         "fdt_high=0xffffffff\0" \
  43         "initrd_high=0xffffffff\0" \
  44         "fdt_file=imx7d-warp.dtb\0" \
  45         "fdt_addr=0x83000000\0" \
  46         "boot_fdt=try\0" \
  47         "ip_dyn=yes\0" \
  48         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  49         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  50         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  51         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  52                 "root=${mmcroot}\0" \
  53         "loadbootscript=" \
  54                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  55         "bootscript=echo Running bootscript from mmc ...; " \
  56                 "source\0" \
  57         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  58         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  59         "mmcboot=echo Booting from mmc ...; " \
  60                 "run mmcargs; " \
  61                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  62                         "if run loadfdt; then " \
  63                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  64                         "else " \
  65                                 "if test ${boot_fdt} = try; then " \
  66                                         "bootz; " \
  67                                 "else " \
  68                                         "echo WARN: Cannot load the DT; " \
  69                                 "fi; " \
  70                         "fi; " \
  71                 "else " \
  72                         "bootz; " \
  73                 "fi;\0" \
  74
  75 #define CONFIG_BOOTCOMMAND \
  76            "mmc dev ${mmcdev};" \
  77            "mmc dev ${mmcdev}; if mmc rescan; then " \
  78                    "if run loadbootscript; then " \
  79                            "run bootscript; " \
  80                    "else " \
  81                            "if run loadimage; then " \
  82                                    "run mmcboot; " \
  83                            "fi; " \
  84                    "fi; " \
  85            "fi"
  86
  87 #define CONFIG_CMD_MEMTEST
  88 #define CONFIG_SYS_MEMTEST_START        0x80000000
  89 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x20000000)
  90
  91 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
  92 #define CONFIG_SYS_HZ                   1000
  93
  94 #define CONFIG_STACKSIZE                SZ_128K
  95
  96 /* Physical Memory Map */
  97 #define CONFIG_NR_DRAM_BANKS            1
  98 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
  99
 100 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 101 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 102 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 103
 104 #define CONFIG_SYS_INIT_SP_OFFSET \
 105         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 106 #define CONFIG_SYS_INIT_SP_ADDR \
 107         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 108
 109 /* FLASH and environment organization */
 110 #define CONFIG_SYS_NO_FLASH
 111 #define CONFIG_ENV_SIZE                 SZ_8K
 112 #define CONFIG_ENV_IS_IN_MMC
 113
 114 #define CONFIG_ENV_OFFSET               (8 * SZ_64K)
 115 #define CONFIG_SYS_FSL_USDHC_NUM        1
 116
 117 #define CONFIG_SYS_MMC_ENV_DEV          0
 118 #define CONFIG_SYS_MMC_ENV_PART         0
 119 #define CONFIG_MMCROOT                  "/dev/mmcblk2p2"
 120
 121 /* USB Configs */
 122 #define CONFIG_CMD_USB
 123 #define CONFIG_USB_EHCI
 124 #define CONFIG_USB_EHCI_MX7
 125 #define CONFIG_USB_STORAGE
 126 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 127
 128 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 129 #define CONFIG_MXC_USB_FLAGS            0
 130 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
 131
 132 #define CONFIG_IMX_THERMAL
 133
 134 #define CONFIG_CI_UDC
 135 #define CONFIG_USBD_HS
 136 #define CONFIG_USB_GADGET_DUALSPEED
 137
 138 #define CONFIG_USB_GADGET
 139 #define CONFIG_CMD_USB_MASS_STORAGE
 140 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 141 #define CONFIG_USB_GADGET_DOWNLOAD
 142 #define CONFIG_USB_GADGET_VBUS_DRAW     2
 143
 144 #define CONFIG_G_DNL_VENDOR_NUM         0x0525
 145 #define CONFIG_G_DNL_PRODUCT_NUM        0xa4a5
 146 #define CONFIG_G_DNL_MANUFACTURER       "FSL"
 147
 148 /* USB Device Firmware Update support */
 149 #define CONFIG_CMD_DFU
 150 #define CONFIG_USB_FUNCTION_DFU
 151 #define CONFIG_DFU_MMC
 152 #define CONFIG_SYS_DFU_DATA_BUF_SIZE    SZ_16M
 153 #define DFU_DEFAULT_POLL_TIMEOUT        300
 154
 155 #endif