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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Configuation settings for the WB45N CPU Module.
4  */
5
6 #ifndef __CONFIG_H__
7 #define __CONFIG_H__
8
9 #include <asm/hardware.h>
10
11 /* ARM asynchronous clock */
12 #define CONFIG_SYS_AT91_SLOW_CLOCK  32768
13 #define CONFIG_SYS_AT91_MAIN_CLOCK  12000000    /* 12 MHz crystal */
14
15 #define CONFIG_CMDLINE_TAG      /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_SKIP_LOWLEVEL_INIT
19
20 /* general purpose I/O */
21 #define CONFIG_ATMEL_LEGACY     /* required until (g)pio is fixed */
22 #define CONFIG_AT91_GPIO
23
24 /* serial console */
25 #define CONFIG_ATMEL_USART
26 #define CONFIG_USART_BASE   ATMEL_BASE_DBGU
27 #define CONFIG_USART_ID     ATMEL_ID_SYS
28
29 /*
30  * BOOTP options
31  */
32 #define CONFIG_BOOTP_BOOTFILESIZE
33
34 /* SDRAM */
35 #define CONFIG_NR_DRAM_BANKS        1
36 #define CONFIG_SYS_SDRAM_BASE       0x20000000
37 #define CONFIG_SYS_SDRAM_SIZE       0x04000000  /* 64 MB */
38
39 #define CONFIG_SYS_INIT_SP_ADDR \
40     (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
41
42 /* NAND flash */
43 #define CONFIG_NAND_ATMEL
44 #define CONFIG_SYS_MAX_NAND_DEVICE  1
45 #define CONFIG_SYS_NAND_BASE        0x40000000
46 /* our ALE is AD21 */
47 #define CONFIG_SYS_NAND_MASK_ALE    (1 << 21)
48 /* our CLE is AD22 */
49 #define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
50 #define CONFIG_SYS_NAND_ENABLE_PIN  AT91_PIN_PD4
51 #define CONFIG_SYS_NAND_READY_PIN   AT91_PIN_PD5
52
53 /* PMECC & PMERRLOC */
54 #define CONFIG_ATMEL_NAND_HWECC     1
55 #define CONFIG_ATMEL_NAND_HW_PMECC  1
56 #define CONFIG_PMECC_CAP            4
57 #define CONFIG_PMECC_SECTOR_SIZE    512
58
59 #define CONFIG_MTD_DEVICE
60 #define CONFIG_CMD_MTDPARTS
61 #define CONFIG_MTD_PARTITIONS
62 #define CONFIG_RBTREE
63 #define CONFIG_LZO
64
65 /* Ethernet */
66 #define CONFIG_MACB
67 #define CONFIG_RMII
68 #define CONFIG_NET_RETRY_COUNT      20
69 #define CONFIG_MACB_SEARCH_PHY
70 #define CONFIG_ETHADDR              C0:EE:40:00:00:00
71 #define CONFIG_ENV_OVERWRITE        1
72
73 /* System */
74 #define CONFIG_SYS_LOAD_ADDR        0x22000000  /* load address */
75 #define CONFIG_SYS_MEMTEST_START    CONFIG_SYS_SDRAM_BASE
76 #define CONFIG_SYS_MEMTEST_END      0x23e00000
77
78 #ifdef CONFIG_SYS_USE_NANDFLASH
79 /* bootstrap + u-boot + env + linux in nandflash */
80 #define CONFIG_ENV_OFFSET           0xa0000
81 #define CONFIG_ENV_OFFSET_REDUND    0xc0000
82 #define CONFIG_ENV_SIZE             0x20000     /* 1 block = 128 kB */
83
84 #define CONFIG_BOOTCOMMAND  "nand read 0x22000000 0xe0000 0x280000; " \
85     "run _mtd; bootm"
86
87 #define MTDIDS_DEFAULT      "nand0=atmel_nand"
88 #define MTDPARTS_DEFAULT    "mtdparts=atmel_nand:" \
89                             "128K(at91bs)," \
90                             "512K(u-boot)," \
91                             "128K(u-boot-env)," \
92                             "128K(redund-env)," \
93                             "2560K(kernel-a)," \
94                             "2560K(kernel-b)," \
95                             "38912K(rootfs-a)," \
96                             "38912K(rootfs-b)," \
97                             "46208K(user)," \
98                             "512K(logs)"
99
100 #else
101 #error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
102 #endif
103
104 #define CONFIG_BOOTARGS     "console=ttyS0,115200 earlyprintk " \
105                             "rw noinitrd mem=64M "              \
106                             "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6"
107
108 #define CONFIG_EXTRA_ENV_SETTINGS       \
109     "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
110     "autoload=no\0" \
111     "autostart=no\0" \
112     "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
113     "\0"
114
115 #define CONFIG_SYS_CBSIZE   256
116 #define CONFIG_SYS_MAXARGS  16
117
118 /*
119  * Size of malloc() pool
120  */
121 #define CONFIG_SYS_MALLOC_LEN       (512 * 1024 + 0x1000)
122
123 /* SPL */
124 #define CONFIG_SPL_TEXT_BASE        0x300000
125 #define CONFIG_SPL_MAX_SIZE         0x6000
126 #define CONFIG_SPL_STACK            0x308000
127
128 #define CONFIG_SPL_BSS_START_ADDR   0x20000000
129 #define CONFIG_SPL_BSS_MAX_SIZE     0x80000
130 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
131 #define CONFIG_SYS_SPL_MALLOC_SIZE  0x80000
132
133 #define CONFIG_SYS_MONITOR_LEN      (512 << 10)
134
135 #define CONFIG_SYS_MASTER_CLOCK     132096000
136 #define CONFIG_SYS_AT91_PLLA        0x20c73f03
137 #define CONFIG_SYS_MCKR             0x1301
138 #define CONFIG_SYS_MCKR_CSS         0x1302
139
140 #define CONFIG_SPL_NAND_DRIVERS
141 #define CONFIG_SPL_NAND_BASE
142 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
143 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
144 #define CONFIG_SYS_NAND_PAGE_SIZE   0x800
145 #define CONFIG_SYS_NAND_PAGE_COUNT  64
146 #define CONFIG_SYS_NAND_OOBSIZE     64
147 #define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
148 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
149 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
150
151 #endif                          /* __CONFIG_H__ */