2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6 * Configuration for the woodburn board.
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __WOODBURN_COMMON_CONFIG_H
12 #define __WOODBURN_COMMON_CONFIG_H
14 #include <asm/arch/imx-regs.h>
16 /* High Level Configuration Options */
18 #define CONFIG_MX35_HCLK_FREQ 24000000
19 #define CONFIG_SYS_FSL_CLK
21 #define CONFIG_SYS_DCACHE_OFF
23 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
25 /* This is required to setup the ESDC controller */
27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
28 #define CONFIG_REVISION_TAG
29 #define CONFIG_SETUP_MEMORY_TAGS
30 #define CONFIG_INITRD_TAG
33 * Size of malloc() pool
35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
40 #define CONFIG_SYS_I2C
41 #define CONFIG_SYS_I2C_MXC
42 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
43 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
45 #define CONFIG_SYS_SPD_BUS_NUM 0
49 #define CONFIG_POWER_I2C
50 #define CONFIG_POWER_FSL
51 #define CONFIG_POWER_FSL_MC13892
52 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
53 #define CONFIG_RTC_MC13XXX
56 #define CONFIG_FSL_ESDHC
57 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
58 #define CONFIG_SYS_FSL_ESDHC_NUM 1
63 #define CONFIG_MXC_UART
64 #define CONFIG_MXC_UART_BASE UART1_BASE
66 /* allow to overwrite serial and ethaddr */
67 #define CONFIG_ENV_OVERWRITE
73 #define CONFIG_NET_RETRY_COUNT 100
76 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
79 * Ethernet on SOC (FEC)
81 #define CONFIG_FEC_MXC
82 #define IMX_FEC_BASE FEC_BASE_ADDR
83 #define CONFIG_FEC_MXC_PHYADDR 0x1
86 #define CONFIG_DISCOVER_PHY
88 #define CONFIG_ARP_TIMEOUT 200UL
91 * Miscellaneous configurable options
94 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
95 #define CONFIG_SYS_MEMTEST_END 0x10000
97 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
100 * Physical Memory Map
102 #define CONFIG_NR_DRAM_BANKS 1
103 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
104 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
106 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
108 #define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \
110 GENERATED_GBL_DATA_SIZE)
111 #define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \
112 CONFIG_SYS_GBL_DATA_OFFSET)
115 * MTD Command for mtdparts
117 #define CONFIG_MTD_DEVICE
118 #define CONFIG_FLASH_CFI_MTD
119 #define CONFIG_MTD_PARTITIONS
122 * FLASH and environment organization
124 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
125 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
126 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
127 /* Monitor at beginning of flash */
128 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
129 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
131 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
132 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
134 /* Address and size of Redundant Environment Sector */
135 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
136 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
138 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
139 CONFIG_SYS_MONITOR_LEN)
142 * CFI FLASH driver setup
144 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
145 #define CONFIG_FLASH_CFI_DRIVER
147 /* A non-standard buffered write algorithm */
148 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
149 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
152 * NAND FLASH driver setup
154 #define CONFIG_NAND_MXC_V1_1
155 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
156 #define CONFIG_SYS_MAX_NAND_DEVICE 1
157 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
158 #define CONFIG_MXC_NAND_HWECC
159 #define CONFIG_SYS_NAND_LARGEPAGE
161 #define CONFIG_SYS_NAND_ONFI_DETECTION
164 * Default environment and default scripts
165 * to update uboot and load kernel
168 #define CONFIG_HOSTNAME woodburn
169 #define CONFIG_EXTRA_ENV_SETTINGS \
171 "nfsargs=setenv bootargs root=/dev/nfs rw " \
172 "nfsroot=${serverip}:${rootpath}\0" \
173 "ramargs=setenv bootargs root=/dev/ram rw\0" \
174 "addip_sta=setenv bootargs ${bootargs} " \
175 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
176 ":${hostname}:${netdev}:off panic=1\0" \
177 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
178 "addip=if test -n ${ipdyn};then run addip_dyn;" \
179 "else run addip_sta;fi\0" \
180 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
181 "addtty=setenv bootargs ${bootargs}" \
182 " console=ttymxc0,${baudrate}\0" \
183 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
184 "loadaddr=80800000\0" \
185 "kernel_addr_r=80800000\0" \
186 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
187 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
188 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
189 "flash_self=run ramargs addip addtty addmtd addmisc;" \
190 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
191 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
192 "bootm ${kernel_addr}\0" \
193 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
194 "run nfsargs addip addtty addmtd addmisc;" \
195 "bootm ${kernel_addr_r}\0" \
196 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
197 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
198 "net_self=if run net_self_load;then " \
199 "run ramargs addip addtty addmtd addmisc;" \
200 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
201 "else echo Images not loades;fi\0" \
202 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
203 "load=tftp ${loadaddr} ${u-boot}\0" \
204 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
205 "update=protect off ${uboot_addr} +80000;" \
206 "erase ${uboot_addr} +80000;" \
207 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
208 "upd=if run load;then echo Updating u-boot;if run update;" \
209 "then echo U-Boot updated;" \
210 "else echo Error updating u-boot !;" \
211 "echo Board without bootloader !!;" \
213 "else echo U-Boot not downloaded..exiting;fi\0" \
214 "bootcmd=run net_nfs\0"
216 #endif /* __CONFIG_H */