3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
9 * Configuation settings for the Zylonite board.
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 * High Level Configuration Options
37 #define CONFIG_CPU_MONAHANS 1 /* Intel Monahan CPU */
38 #define CONFIG_CPU_PXA320
39 #define CONFIG_ZYLONITE 1 /* Zylonite board */
41 /* #define CONFIG_LCD 1 */
43 #define CONFIG_SHARP_LM8V31
46 #define BOARD_LATE_INIT 1
48 #undef CONFIG_SKIP_RELOCATE_UBOOT
49 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
51 /* we will never enable dcache, because we have to setup MMU first */
52 #define CONFIG_SYS_NO_DCACHE
55 * Size of malloc() pool
57 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
58 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
64 #undef TURN_ON_ETHERNET
65 #ifdef TURN_ON_ETHERNET
66 # define CONFIG_SMC91111 1
67 # define CONFIG_SMC91111_BASE 0x14000300
68 # define CONFIG_SMC91111_EXT_PHY
69 # define CONFIG_SMC_USE_32_BIT
70 # undef CONFIG_SMC_USE_IOFUNCS /* just for use with the kernel */
74 * select serial console configuration
76 #define CONFIG_PXA_SERIAL
77 #define CONFIG_FFUART 1
79 /* allow to overwrite serial and ethaddr */
80 #define CONFIG_ENV_OVERWRITE
82 #define CONFIG_BAUDRATE 115200
88 #define CONFIG_BOOTP_BOOTFILESIZE
89 #define CONFIG_BOOTP_BOOTPATH
90 #define CONFIG_BOOTP_GATEWAY
91 #define CONFIG_BOOTP_HOSTNAME
95 * Command line configuration.
97 #include <config_cmd_default.h>
99 #ifdef TURN_ON_ETHERNET
100 #define CONFIG_CMD_PING
102 #define CONFIG_CMD_SAVEENV
103 #define CONFIG_CMD_NAND
105 #undef CONFIG_CMD_NET
106 #undef CONFIG_CMD_FLASH
107 #undef CONFIG_CMD_IMLS
111 #define CONFIG_BOOTDELAY -1
112 #define CONFIG_ETHADDR 08:00:3e:26:0a:5b
113 #define CONFIG_NETMASK 255.255.0.0
114 #define CONFIG_IPADDR 192.168.0.21
115 #define CONFIG_SERVERIP 192.168.0.250
116 #define CONFIG_BOOTCOMMAND "bootm 80000"
117 #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
118 #define CONFIG_CMDLINE_TAG
119 #define CONFIG_TIMESTAMP
121 #if defined(CONFIG_CMD_KGDB)
122 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
123 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
127 * Miscellaneous configurable options
129 #define CONFIG_SYS_HUSH_PARSER 1
130 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
132 #define CONFIG_SYS_LONGHELP /* undef to save memory */
133 #ifdef CONFIG_SYS_HUSH_PARSER
134 #define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
136 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
138 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
139 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
140 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
141 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
142 #define CONFIG_SYS_DEVICE_NULLDEV 1
144 #define CONFIG_SYS_MEMTEST_START 0x9c000000 /* memtest works on */
145 #define CONFIG_SYS_MEMTEST_END 0x9c400000 /* 4 ... 8 MB in DRAM */
147 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */
149 #define CONFIG_SYS_HZ 1000
151 /* Monahans Core Frequency */
152 #define CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */
153 #define CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2 */
155 /* valid baudrates */
156 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
159 #define CONFIG_PXA_MMC
160 #define CONFIG_CMD_MMC
161 #define CONFIG_SYS_MMC_BASE 0xF0000000
167 * The stack sizes are set up in start.S using the settings below
169 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
170 #ifdef CONFIG_USE_IRQ
171 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
172 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
176 * Physical Memory Map
178 #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
179 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
180 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
181 #define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
182 #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
183 #define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
184 #define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
185 #define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
186 #define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
188 #define CONFIG_SYS_DRAM_BASE 0x80000000 /* at CS0 */
189 #define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB Ram */
191 #undef CONFIG_SYS_SKIP_DRAM_SCRUB
193 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
194 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
199 #define CONFIG_SYS_NAND0_BASE 0x0
200 #undef CONFIG_SYS_NAND1_BASE
202 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE }
203 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
205 /* nand timeout values */
206 #define CONFIG_SYS_NAND_PROG_ERASE_TO 3000
207 #define CONFIG_SYS_NAND_OTHER_TO 100
208 #define CONFIG_SYS_NAND_SENDCMD_RETRY 3
209 #undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */
211 /* NAND Timing Parameters (in ns) */
212 #define NAND_TIMING_tCH 10
213 #define NAND_TIMING_tCS 0
214 #define NAND_TIMING_tWH 20
215 #define NAND_TIMING_tWP 40
217 #define NAND_TIMING_tRH 20
218 #define NAND_TIMING_tRP 40
220 #define NAND_TIMING_tR 11123
221 #define NAND_TIMING_tWHR 100
222 #define NAND_TIMING_tAR 10
225 #define CONFIG_SYS_DFC_DEBUG1 /* usefull */
226 #undef CONFIG_SYS_DFC_DEBUG2 /* noisy */
227 #undef CONFIG_SYS_DFC_DEBUG3 /* extremly noisy */
229 #define CONFIG_MTD_DEBUG
230 #define CONFIG_MTD_DEBUG_VERBOSE 1
232 #define CONFIG_SYS_NO_FLASH 1
234 #define CONFIG_ENV_IS_IN_NAND 1
235 #define CONFIG_ENV_OFFSET 0x40000
236 #define CONFIG_ENV_OFFSET_REDUND 0x44000
237 #define CONFIG_ENV_SIZE 0x4000
240 #endif /* __CONFIG_H */