2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3 * (C) Copyright 2013 Xilinx, Inc.
5 * Common configuration options for all Zynq boards.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ 800000000
19 #define CONFIG_CMD_CACHE
20 #define CONFIG_SYS_CACHELINE_SIZE 32
22 #define CONFIG_SYS_L2CACHE_OFF
23 #ifndef CONFIG_SYS_L2CACHE_OFF
24 # define CONFIG_SYS_L2_PL310
25 # define CONFIG_SYS_PL310_BASE 0xf8f02000
29 #define CONFIG_BAUDRATE 115200
30 /* The following table includes the supported baudrates */
31 #define CONFIG_SYS_BAUDRATE_TABLE \
32 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
35 #if defined(CONFIG_ZYNQ_DCC)
36 # define CONFIG_ARM_DCC
37 # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
39 # define CONFIG_ZYNQ_SERIAL
43 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
44 # define CONFIG_NET_MULTI
45 # define CONFIG_ZYNQ_GEM
47 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
48 # define CONFIG_PHYLIB
49 # define CONFIG_PHY_MARVELL
50 # define CONFIG_BOOTP_SERVERIP
51 # define CONFIG_BOOTP_BOOTPATH
52 # define CONFIG_BOOTP_GATEWAY
53 # define CONFIG_BOOTP_HOSTNAME
54 # define CONFIG_BOOTP_MAY_FAIL
55 # if !defined(CONFIG_ZYNQ_GEM_EMIO0)
56 # define CONFIG_ZYNQ_GEM_EMIO0 0
58 # if !defined(CONFIG_ZYNQ_GEM_EMIO1)
59 # define CONFIG_ZYNQ_GEM_EMIO1 0
64 #ifdef CONFIG_ZYNQ_SPI
65 # define CONFIG_SPI_FLASH
66 # define CONFIG_SPI_FLASH_SST
67 # define CONFIG_CMD_SF
71 #ifndef CONFIG_SYS_NO_FLASH
72 # define CONFIG_SYS_FLASH_BASE 0xE2000000
73 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
74 # define CONFIG_SYS_MAX_FLASH_BANKS 1
75 # define CONFIG_SYS_MAX_FLASH_SECT 512
76 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
77 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
78 # define CONFIG_FLASH_SHOW_PROGRESS 10
79 # define CONFIG_SYS_FLASH_CFI
80 # undef CONFIG_SYS_FLASH_EMPTY_INFO
81 # define CONFIG_FLASH_CFI_DRIVER
82 # undef CONFIG_SYS_FLASH_PROTECTION
83 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
87 #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
89 # define CONFIG_GENERIC_MMC
91 # define CONFIG_ZYNQ_SDHCI
92 # define CONFIG_CMD_MMC
95 #ifdef CONFIG_ZYNQ_USB
96 # define CONFIG_USB_EHCI
97 # define CONFIG_CMD_USB
98 # define CONFIG_USB_STORAGE
99 # define CONFIG_USB_EHCI_ZYNQ
100 # define CONFIG_USB_ULPI_VIEWPORT
101 # define CONFIG_USB_ULPI
102 # define CONFIG_EHCI_IS_TDI
103 # define CONFIG_USB_MAX_CONTROLLER_COUNT 2
106 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
107 # define CONFIG_SUPPORT_VFAT
108 # define CONFIG_CMD_FAT
109 # define CONFIG_CMD_EXT2
110 # define CONFIG_FAT_WRITE
111 # define CONFIG_DOS_PARTITION
112 # define CONFIG_CMD_EXT4
113 # define CONFIG_CMD_EXT4_WRITE
114 # define CONFIG_CMD_FS_GENERIC
117 #define CONFIG_SYS_I2C_ZYNQ
119 #if defined(CONFIG_SYS_I2C_ZYNQ)
120 # define CONFIG_CMD_I2C
121 # define CONFIG_SYS_I2C
122 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
123 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
127 #ifdef CONFIG_ZYNQ_EEPROM
128 # define CONFIG_CMD_EEPROM
129 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
130 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
131 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
132 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
133 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
136 /* Total Size of Environment Sector */
137 #define CONFIG_ENV_SIZE (128 << 10)
139 /* Allow to overwrite serial and ethaddr */
140 #define CONFIG_ENV_OVERWRITE
143 #ifndef CONFIG_ENV_IS_NOWHERE
144 # ifndef CONFIG_SYS_NO_FLASH
145 # define CONFIG_ENV_IS_IN_FLASH
146 # elif defined(CONFIG_SYS_NO_FLASH)
147 # define CONFIG_ENV_IS_NOWHERE
150 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
151 # define CONFIG_ENV_OFFSET 0xE0000
152 # define CONFIG_CMD_SAVEENV
155 /* Default environment */
156 #define CONFIG_EXTRA_ENV_SETTINGS \
157 "fit_image=fit.itb\0" \
158 "load_addr=0x2000000\0" \
159 "fit_size=0x800000\0" \
160 "flash_off=0x100000\0" \
161 "nor_flash_off=0xE2100000\0" \
162 "fdt_high=0x20000000\0" \
163 "initrd_high=0x20000000\0" \
164 "norboot=echo Copying FIT from NOR flash to RAM... && " \
165 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
166 "bootm ${load_addr}\0" \
167 "sdboot=echo Copying FIT from SD to RAM... && " \
168 "load mmc 0 ${load_addr} ${fit_image} && " \
169 "bootm ${load_addr}\0" \
170 "jtagboot=echo TFTPing FIT to RAM... && " \
171 "tftpboot ${load_addr} ${fit_image} && " \
172 "bootm ${load_addr}\0" \
173 "usbboot=if usb start; then " \
174 "echo Copying FIT from USB to RAM... && " \
175 "load usb 0 ${load_addr} ${fit_image} && " \
176 "bootm ${load_addr}\0" \
179 #define CONFIG_BOOTCOMMAND "run $modeboot"
180 #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
181 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
183 /* Miscellaneous configurable options */
184 #define CONFIG_SYS_PROMPT "zynq-uboot> "
185 #define CONFIG_SYS_HUSH_PARSER
187 #define CONFIG_CMDLINE_EDITING
188 #define CONFIG_AUTO_COMPLETE
189 #define CONFIG_BOARD_LATE_INIT
190 #define CONFIG_DISPLAY_BOARDINFO
191 #define CONFIG_SYS_LONGHELP
192 #define CONFIG_CLOCKS
193 #define CONFIG_CMD_CLK
194 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
195 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
196 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
197 sizeof(CONFIG_SYS_PROMPT) + 16)
199 /* Physical Memory map */
200 #define CONFIG_SYS_TEXT_BASE 0x4000000
202 #define CONFIG_NR_DRAM_BANKS 1
203 #define CONFIG_SYS_SDRAM_BASE 0
205 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
206 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
208 #define CONFIG_SYS_MALLOC_LEN 0x400000
209 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
210 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
211 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
212 CONFIG_SYS_INIT_RAM_SIZE - \
213 GENERATED_GBL_DATA_SIZE)
215 /* Enable the PL to be downloaded */
217 #define CONFIG_FPGA_XILINX
218 #define CONFIG_FPGA_ZYNQPL
219 #define CONFIG_CMD_FPGA
220 #define CONFIG_CMD_FPGA_LOADMK
221 #define CONFIG_CMD_FPGA_LOADP
222 #define CONFIG_CMD_FPGA_LOADBP
223 #define CONFIG_CMD_FPGA_LOADFS
225 /* Open Firmware flat tree */
226 #define CONFIG_OF_LIBFDT
230 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
231 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
234 #define CONFIG_DISPLAY_BOARDINFO_LATE
237 #define CONFIG_FIT_SIGNATURE
240 /* Extend size of kernel image for uncompression */
241 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
243 /* Boot FreeBSD/vxWorks from an ELF image */
244 #if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
246 # define CONFIG_CMD_ELF
247 # define CONFIG_SYS_MMC_MAX_DEVICE 1
250 #define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds"
253 #include <config_cmd_default.h>
255 #define CONFIG_CMD_PING
256 #define CONFIG_CMD_DHCP
257 #define CONFIG_CMD_MII
258 #define CONFIG_CMD_TFTPPUT
261 #define CONFIG_CMD_SPL
262 #define CONFIG_SPL_FRAMEWORK
263 #define CONFIG_SPL_LIBCOMMON_SUPPORT
264 #define CONFIG_SPL_LIBGENERIC_SUPPORT
265 #define CONFIG_SPL_SERIAL_SUPPORT
266 #define CONFIG_SPL_BOARD_INIT
268 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
271 #ifdef CONFIG_ZYNQ_SDHCI0
272 #define CONFIG_SPL_MMC_SUPPORT
273 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
274 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
275 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
276 #define CONFIG_SPL_LIBDISK_SUPPORT
277 #define CONFIG_SPL_FAT_SUPPORT
278 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
281 /* Disable dcache for SPL just for sure */
282 #ifdef CONFIG_SPL_BUILD
283 #define CONFIG_SYS_DCACHE_OFF
287 /* Address in RAM where the parameters must be copied by SPL. */
288 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
290 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
291 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
293 /* Not using MMC raw mode - just for compilation purpose */
294 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
295 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
296 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
298 /* qspi mode is working fine */
299 #ifdef CONFIG_ZYNQ_QSPI
300 #define CONFIG_SPL_SPI_SUPPORT
301 #define CONFIG_SPL_SPI_LOAD
302 #define CONFIG_SPL_SPI_FLASH_SUPPORT
303 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
306 /* for booting directly linux */
307 #define CONFIG_SPL_OS_BOOT
309 /* SP location before relocation, must use scratch RAM */
310 #define CONFIG_SPL_TEXT_BASE 0x0
312 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
313 #define CONFIG_SPL_MAX_SIZE 0x30000
315 /* The highest 64k OCM address */
316 #define OCM_HIGH_ADDR 0xffff0000
318 /* Just define any reasonable size */
319 #define CONFIG_SPL_STACK_SIZE 0x1000
321 /* SPL stack position - and stack goes down */
322 #define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
324 /* On the top of OCM space */
325 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \
326 GENERATED_GBL_DATA_SIZE)
327 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000
330 #define CONFIG_SPL_BSS_START_ADDR 0x100000
331 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
333 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
335 #define CONFIG_SYS_GENERIC_BOARD
337 #endif /* __CONFIG_ZYNQ_COMMON_H */