2 * Copyright (c) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
4 * SPDX-License-Identifier: GPL-2.0+
11 * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
12 * easily handle enabling of clock.
14 #ifdef CONFIG_CPU_MONAHANS
15 #define UART_CLK_BASE CKENA_21_BTUART
16 #define UART_CLK_REG CKENA
17 #define BTUART_INDEX 0
18 #define FFUART_INDEX 1
19 #define STUART_INDEX 2
20 #elif CONFIG_CPU_PXA25X
21 #define UART_CLK_BASE (1 << 4) /* HWUART */
22 #define UART_CLK_REG CKEN
23 #define HWUART_INDEX 0
24 #define STUART_INDEX 1
25 #define FFUART_INDEX 2
26 #define BTUART_INDEX 3
28 #define UART_CLK_BASE CKEN5_STUART
29 #define UART_CLK_REG CKEN
30 #define STUART_INDEX 0
31 #define FFUART_INDEX 1
32 #define BTUART_INDEX 2
36 * Only PXA250 has HWUART, to avoid poluting the code with more macros,
37 * artificially introduce this.
39 #ifndef CONFIG_CPU_PXA25X
40 #define HWUART_INDEX 0xff
44 * struct pxa_serial_platdata - information about a PXA port
46 * @base: Uart port base register address
47 * @port: Uart port index, for cpu with pinmux for uart / gpio
48 * baudrtatre: Uart port baudrate
50 struct pxa_serial_platdata {
51 struct pxa_uart_regs *base;
56 #endif /* __SERIAL_PXA_H */