2 * Copyright (c) 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
3 * Copyright (c) 2014 Renesas Electronics Corporation
5 * SPDX-License-Identifier: GPL-2.0+
24 * Information about SCIF port
26 * @base: Register base address
27 * @clk: Input clock rate, used for calculating the baud rate divisor
28 * @clk_mode: Clock mode, set internal (INT) or external (EXT)
31 struct sh_serial_platdata {
34 enum sh_clk_mode clk_mode;
35 enum sh_serial_type type;
37 #endif /* __serial_sh_h */