2 * This header provides constants for Tegra pinctrl bindings.
4 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
6 * Author: Laxman Dewangan <ldewangan@nvidia.com>
8 * SPDX-License-Identifier: GPL-2.0
11 #ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
12 #define _DT_BINDINGS_PINCTRL_TEGRA_H
15 * Enable/disable for diffeent dt properties. This is applicable for
16 * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
17 * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
19 #define TEGRA_PIN_DISABLE 0
20 #define TEGRA_PIN_ENABLE 1
22 #define TEGRA_PIN_PULL_NONE 0
23 #define TEGRA_PIN_PULL_DOWN 1
24 #define TEGRA_PIN_PULL_UP 2
26 /* Low power mode driver */
27 #define TEGRA_PIN_LP_DRIVE_DIV_8 0
28 #define TEGRA_PIN_LP_DRIVE_DIV_4 1
29 #define TEGRA_PIN_LP_DRIVE_DIV_2 2
30 #define TEGRA_PIN_LP_DRIVE_DIV_1 3
32 /* Rising/Falling slew rate */
33 #define TEGRA_PIN_SLEW_RATE_FASTEST 0
34 #define TEGRA_PIN_SLEW_RATE_FAST 1
35 #define TEGRA_PIN_SLEW_RATE_SLOW 2
36 #define TEGRA_PIN_SLEW_RATE_SLOWEST 3