2 * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
4 * SPDX-License-Identifier: GPL-2.0
7 #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
8 #define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
14 #define SCUPER_RESET 3
18 #define EMAC0_RESET 32
19 #define EMAC1_RESET 33
24 #define L4WD0_RESET 38
25 #define L4WD1_RESET 39
26 #define OSC1TIMER0_RESET 40
27 #define OSC1TIMER1_RESET 41
28 #define SPTIMER0_RESET 42
29 #define SPTIMER1_RESET 43
34 #define UART0_RESET 48
35 #define UART1_RESET 49
36 #define SPIM0_RESET 50
37 #define SPIM1_RESET 51
38 #define SPIS0_RESET 52
39 #define SPIS1_RESET 53
40 #define SDMMC_RESET 54
43 #define GPIO0_RESET 57
44 #define GPIO1_RESET 58
45 #define GPIO2_RESET 59
50 #define DMAIF0_RESET 64
51 #define DMAIF1_RESET 65
52 #define DMAIF2_RESET 66
53 #define DMAIF3_RESET 67
54 #define DMAIF4_RESET 68
55 #define DMAIF5_RESET 69
56 #define DMAIF6_RESET 70
57 #define DMAIF7_RESET 71
60 #define HPS2FPGA_RESET 96
61 #define LWHPS2FPGA_RESET 97
62 #define FPGA2HPS_RESET 98
66 #define OCRAM_RESET 129
67 #define SYSMGR_RESET 130
68 #define SYSMGRCOLD_RESET 131
69 #define FPGAMGR_RESET 132
70 #define ACPIDMAP_RESET 133
72 #define S2FCOLD_RESET 135
73 #define NRSTPIN_RESET 136
74 #define TIMESTAMPCOLD_RESET 137
75 #define CLKMGRCOLD_RESET 138
76 #define SCANMGR_RESET 139
77 #define FRZCTRLCOLD_RESET 140
78 #define SYSDBG_RESET 141
80 #define TAPCOLD_RESET 143
81 #define SDRCOLD_RESET 144