2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 /*-----------------------------------------------------------------------
29 * FLASH Info: contains chip specific data, per FLASH bank
33 ulong size; /* total bank size in bytes */
34 ushort sector_count; /* number of erase units */
35 ulong flash_id; /* combined device & manufacturer code */
36 ulong start[CFG_MAX_FLASH_SECT]; /* physical sector start addresses */
37 uchar protect[CFG_MAX_FLASH_SECT]; /* sector protection status */
39 uchar portwidth; /* the width of the port */
40 uchar chipwidth; /* the width of the chip */
41 ushort buffer_size; /* # of bytes in write buffer */
42 ulong erase_blk_tout; /* maximum block erase timeout */
43 ulong write_tout; /* maximum write timeout */
44 ulong buffer_write_tout; /* maximum buffer write timeout */
45 ushort vendor; /* the primary vendor id */
46 ushort cmd_reset; /* Vendor specific reset command */
51 * Values for the width of the port
53 #define FLASH_CFI_8BIT 0x01
54 #define FLASH_CFI_16BIT 0x02
55 #define FLASH_CFI_32BIT 0x04
56 #define FLASH_CFI_64BIT 0x08
58 * Values for the width of the chip
60 #define FLASH_CFI_BY8 0x01
61 #define FLASH_CFI_BY16 0x02
62 #define FLASH_CFI_BY32 0x04
63 #define FLASH_CFI_BY64 0x08
65 /* convert between bit value and numeric value */
66 #define CFI_FLASH_SHIFT_WIDTH 3
69 extern unsigned long flash_init (void);
70 extern void flash_print_info (flash_info_t *);
71 extern int flash_erase (flash_info_t *, int, int);
72 extern int flash_sect_erase (ulong addr_first, ulong addr_last);
73 extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last);
76 extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info);
77 extern int flash_write (uchar *, ulong, ulong);
78 extern flash_info_t *addr2info (ulong);
79 extern int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt);
82 #if defined(CFG_FLASH_PROTECTION)
83 extern int flash_real_protect(flash_info_t *info, long sector, int prot);
84 extern void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int len);
85 extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len);
86 #endif /* CFG_FLASH_PROTECTION */
88 /*-----------------------------------------------------------------------
89 * return codes from flash_write():
93 #define ERR_NOT_ERASED 2
94 #define ERR_PROTECTED 4
97 #define ERR_UNKNOWN_FLASH_VENDOR 32
98 #define ERR_UNKNOWN_FLASH_TYPE 64
99 #define ERR_PROG_ERROR 128
101 /*-----------------------------------------------------------------------
102 * Protection Flags for flash_protect():
104 #define FLAG_PROTECT_SET 0x01
105 #define FLAG_PROTECT_CLEAR 0x02
107 /*-----------------------------------------------------------------------
111 #define AMD_MANUFACT 0x00010001 /* AMD manuf. ID in D23..D16, D7..D0 */
112 #define FUJ_MANUFACT 0x00040004 /* FUJITSU manuf. ID in D23..D16, D7..D0 */
113 #define ATM_MANUFACT 0x001F001F /* ATMEL */
114 #define STM_MANUFACT 0x00200020 /* STM (Thomson) manuf. ID in D23.. -"- */
115 #define SST_MANUFACT 0x00BF00BF /* SST manuf. ID in D23..D16, D7..D0 */
116 #define MT_MANUFACT 0x00890089 /* MT manuf. ID in D23..D16, D7..D0 */
117 #define INTEL_MANUFACT 0x00890089 /* INTEL manuf. ID in D23..D16, D7..D0 */
118 #define INTEL_ALT_MANU 0x00B000B0 /* alternate INTEL namufacturer ID */
119 #define MX_MANUFACT 0x00C200C2 /* MXIC manuf. ID in D23..D16, D7..D0 */
120 #define TOSH_MANUFACT 0x00980098 /* TOSHIBA manuf. ID in D23..D16, D7..D0 */
122 /* Micron Technologies (INTEL compat.) */
123 #define MT_ID_28F400_T 0x44704470 /* 28F400B3 ID ( 4 M, top boot sector) */
124 #define MT_ID_28F400_B 0x44714471 /* 28F400B3 ID ( 4 M, bottom boot sect) */
126 #define AMD_ID_LV040B 0x4F /* 29LV040B ID */
127 /* 4 Mbit, 512K x 8, */
128 /* 8 64K x 8 uniform sectors */
130 #define AMD_ID_F040B 0xA4 /* 29F040B ID */
131 /* 4 Mbit, 512K x 8, */
132 /* 8 64K x 8 uniform sectors */
133 #define STM_ID_M29W040B 0xE3 /* M29W040B ID */
134 /* 4 Mbit, 512K x 8, */
135 /* 8 64K x 8 uniform sectors */
136 #define AMD_ID_F080B 0xD5 /* 29F080 ID ( 1 M) */
137 /* 8 Mbit, 512K x 16, */
138 /* 8 64K x 16 uniform sectors */
139 #define AMD_ID_F016D 0xAD /* 29F016 ID ( 2 M x 8) */
140 #define AMD_ID_F032B 0x41 /* 29F032 ID ( 4 M x 8) */
141 #define AMD_ID_LV116DT 0xC7 /* 29LV116DT ( 2 M x 8, top boot sect) */
142 #define AMD_ID_LV016B 0xc8 /* 29LV016 ID ( 2 M x 8) */
144 #define AMD_ID_PL160CB 0x22452245 /* 29PL160CB ID (16 M, bottom boot sect */
146 #define AMD_ID_LV400T 0x22B922B9 /* 29LV400T ID ( 4 M, top boot sector) */
147 #define AMD_ID_LV400B 0x22BA22BA /* 29LV400B ID ( 4 M, bottom boot sect) */
149 #define AMD_ID_LV033C 0xA3 /* 29LV033C ID ( 4 M x 8) */
150 #define AMD_ID_LV065D 0x93 /* 29LV065D ID ( 8 M x 8) */
152 #define AMD_ID_LV800T 0x22DA22DA /* 29LV800T ID ( 8 M, top boot sector) */
153 #define AMD_ID_LV800B 0x225B225B /* 29LV800B ID ( 8 M, bottom boot sect) */
155 #define AMD_ID_LV160T 0x22C422C4 /* 29LV160T ID (16 M, top boot sector) */
156 #define AMD_ID_LV160B 0x22492249 /* 29LV160B ID (16 M, bottom boot sect) */
158 #define AMD_ID_DL163T 0x22282228 /* 29DL163T ID (16 M, top boot sector) */
159 #define AMD_ID_DL163B 0x222B222B /* 29DL163B ID (16 M, bottom boot sect) */
161 #define AMD_ID_LV320T 0x22F622F6 /* 29LV320T ID (32 M, top boot sector) */
162 #define AMD_ID_LV320B 0x22F922F9 /* 29LV320B ID (32 M, bottom boot sect) */
164 #define AMD_ID_DL322T 0x22552255 /* 29DL322T ID (32 M, top boot sector) */
165 #define AMD_ID_DL322B 0x22562256 /* 29DL322B ID (32 M, bottom boot sect) */
166 #define AMD_ID_DL323T 0x22502250 /* 29DL323T ID (32 M, top boot sector) */
167 #define AMD_ID_DL323B 0x22532253 /* 29DL323B ID (32 M, bottom boot sect) */
168 #define AMD_ID_DL324T 0x225C225C /* 29DL324T ID (32 M, top boot sector) */
169 #define AMD_ID_DL324B 0x225F225F /* 29DL324B ID (32 M, bottom boot sect) */
171 #define AMD_ID_DL640 0x227E227E /* 29DL640D ID (64 M, dual boot sectors)*/
172 #define AMD_ID_MIRROR 0x227E227E /* 1st ID word for MirrorBit family */
173 #define AMD_ID_LV640U_2 0x220C220C /* 2d ID word for AM29LV640M at 0x38 */
174 #define AMD_ID_LV640U_3 0x22012201 /* 3d ID word for AM29LV640M at 0x3c */
175 #define AMD_ID_LV128U_2 0x22122212 /* 2d ID word for AM29LV128M at 0x38 */
176 #define AMD_ID_LV128U_3 0x22002200 /* 3d ID word for AM29LV128M at 0x3c */
178 #define AMD_ID_LV320B_2 0x221A221A /* 2d ID word for AM29LV320MB at 0x38 */
179 #define AMD_ID_LV320B_3 0x22002200 /* 3d ID word for AM29LV320MB at 0x3c */
181 #define AMD_ID_LV640U 0x22D722D7 /* 29LV640U ID (64 M, uniform sectors) */
183 #define ATM_ID_BV1614 0x000000C0 /* 49BV1614 ID */
184 #define ATM_ID_BV1614A 0x000000C8 /* 49BV1614A ID */
186 #define FUJI_ID_29F800BA 0x22582258 /* MBM29F800BA ID (8M) */
187 #define FUJI_ID_29F800TA 0x22D622D6 /* MBM29F800TA ID (8M) */
189 #define SST_ID_xF200A 0x27892789 /* 39xF200A ID ( 2M = 128K x 16 ) */
190 #define SST_ID_xF400A 0x27802780 /* 39xF400A ID ( 4M = 256K x 16 ) */
191 #define SST_ID_xF800A 0x27812781 /* 39xF800A ID ( 8M = 512K x 16 ) */
192 #define SST_ID_xF160A 0x27822782 /* 39xF800A ID (16M = 1M x 16 ) */
193 #define SST_ID_xF040 0xBFD7BFD7 /* 39xF040 ID (512KB = 4Mbit x 8) */
195 #define STM_ID_F040B 0xE2 /* M29F040B ID ( 4M = 512K x 8 ) */
196 /* 8 64K x 8 uniform sectors */
198 #define STM_ID_x800AB 0x005B005B /* M29W800AB ID (8M = 512K x 16 ) */
199 #define STM_ID_29W320DT 0x22CA22CA /* M29W320DT ID (32 M, top boot sector) */
200 #define STM_ID_29W320DB 0x22CB22CB /* M29W320DB ID (32 M, bottom boot sect) */
201 #define STM_ID_29W040B 0x00E300E3 /* M29W040B ID (4M = 512K x 8) */
203 #define INTEL_ID_28F016S 0x66a066a0 /* 28F016S[VS] ID (16M = 512k x 16) */
204 #define INTEL_ID_28F800B3T 0x88928892 /* 8M = 512K x 16 top boot sector */
205 #define INTEL_ID_28F800B3B 0x88938893 /* 8M = 512K x 16 bottom boot sector */
206 #define INTEL_ID_28F160B3T 0x88908890 /* 16M = 1M x 16 top boot sector */
207 #define INTEL_ID_28F160B3B 0x88918891 /* 16M = 1M x 16 bottom boot sector */
208 #define INTEL_ID_28F320B3T 0x88968896 /* 32M = 2M x 16 top boot sector */
209 #define INTEL_ID_28F320B3B 0x88978897 /* 32M = 2M x 16 bottom boot sector */
210 #define INTEL_ID_28F640B3T 0x88988898 /* 64M = 4M x 16 top boot sector */
211 #define INTEL_ID_28F640B3B 0x88998899 /* 64M = 4M x 16 bottom boot sector */
212 #define INTEL_ID_28F160F3B 0x88F488F4 /* 16M = 1M x 16 bottom boot sector */
214 #define INTEL_ID_28F800C3T 0x88C088C0 /* 8M = 512K x 16 top boot sector */
215 #define INTEL_ID_28F800C3B 0x88C188C1 /* 8M = 512K x 16 bottom boot sector */
216 #define INTEL_ID_28F160C3T 0x88C288C2 /* 16M = 1M x 16 top boot sector */
217 #define INTEL_ID_28F160C3B 0x88C388C3 /* 16M = 1M x 16 bottom boot sector */
218 #define INTEL_ID_28F320C3T 0x88C488C4 /* 32M = 2M x 16 top boot sector */
219 #define INTEL_ID_28F320C3B 0x88C588C5 /* 32M = 2M x 16 bottom boot sector */
220 #define INTEL_ID_28F640C3T 0x88CC88CC /* 64M = 4M x 16 top boot sector */
221 #define INTEL_ID_28F640C3B 0x88CD88CD /* 64M = 4M x 16 bottom boot sector */
223 #define INTEL_ID_28F128J3 0x89188918 /* 16M = 8M x 16 x 128 */
224 #define INTEL_ID_28F320J5 0x00140014 /* 32M = 128K x 32 */
225 #define INTEL_ID_28F640J5 0x00150015 /* 64M = 128K x 64 */
226 #define INTEL_ID_28F320J3A 0x00160016 /* 32M = 128K x 32 */
227 #define INTEL_ID_28F640J3A 0x00170017 /* 64M = 128K x 64 */
228 #define INTEL_ID_28F128J3A 0x00180018 /* 128M = 128K x 128 */
229 #define INTEL_ID_28F256L18T 0x880D880D /* 256M = 128K x 255 + 32k x 4 */
231 #define INTEL_ID_28F160S3 0x00D000D0 /* 16M = 512K x 32 (64kB x 32) */
232 #define INTEL_ID_28F320S3 0x00D400D4 /* 32M = 512K x 64 (64kB x 64) */
234 /* Note that the Sharp 28F016SC is compatible with the Intel E28F016SC */
235 #define SHARP_ID_28F016SCL 0xAAAAAAAA /* LH28F016SCT-L95 2Mx8, 32 64k blocks */
236 #define SHARP_ID_28F016SCZ 0xA0A0A0A0 /* LH28F016SCT-Z4 2Mx8, 32 64k blocks */
237 #define SHARP_ID_28F008SC 0xA6A6A6A6 /* LH28F008SCT-L12 1Mx8, 16 64k blocks */
238 /* LH28F008SCR-L85 1Mx8, 16 64k blocks */
240 #define TOSH_ID_FVT160 0xC2 /* TC58FVT160 ID (16 M, top ) */
241 #define TOSH_ID_FVB160 0x43 /* TC58FVT160 ID (16 M, bottom ) */
243 /*-----------------------------------------------------------------------
244 * Internal FLASH identification codes
246 * Be careful when adding new type! Odd numbers are "bottom boot sector" types!
249 #define FLASH_AM040 0x0001 /* AMD Am29F040B, Am29LV040B */
250 /* Bright Micro BM29F040 */
251 /* Fujitsu MBM29F040A */
253 /* SGS Thomson M29F040B */
254 /* 8 64K x 8 uniform sectors */
255 #define FLASH_AM400T 0x0002 /* AMD AM29LV400 */
256 #define FLASH_AM400B 0x0003
257 #define FLASH_AM800T 0x0004 /* AMD AM29LV800 */
258 #define FLASH_AM800B 0x0005
259 #define FLASH_AM116DT 0x0026 /* AMD AM29LV116DT (2Mx8bit) */
260 #define FLASH_AM160T 0x0006 /* AMD AM29LV160 */
261 #define FLASH_AM160LV 0x0046 /* AMD29LV160DB (2M = 2Mx8bit ) */
262 #define FLASH_AM160B 0x0007
263 #define FLASH_AM320T 0x0008 /* AMD AM29LV320 */
264 #define FLASH_AM320B 0x0009
266 #define FLASH_AM080 0x000A /* AMD Am29F080B */
267 /* 16 64K x 8 uniform sectors */
269 #define FLASH_AMDL322T 0x0010 /* AMD AM29DL322 */
270 #define FLASH_AMDL322B 0x0011
271 #define FLASH_AMDL323T 0x0012 /* AMD AM29DL323 */
272 #define FLASH_AMDL323B 0x0013
273 #define FLASH_AMDL324T 0x0014 /* AMD AM29DL324 */
274 #define FLASH_AMDL324B 0x0015
276 #define FLASH_AMDLV033C 0x0018
277 #define FLASH_AMDLV065D 0x001A
279 #define FLASH_AMDL640 0x0016 /* AMD AM29DL640D */
280 #define FLASH_AMD016 0x0018 /* AMD AM29F016D */
282 #define FLASH_SST200A 0x0040 /* SST 39xF200A ID ( 2M = 128K x 16 ) */
283 #define FLASH_SST400A 0x0042 /* SST 39xF400A ID ( 4M = 256K x 16 ) */
284 #define FLASH_SST800A 0x0044 /* SST 39xF800A ID ( 8M = 512K x 16 ) */
285 #define FLASH_SST160A 0x0046 /* SST 39xF160A ID ( 16M = 1M x 16 ) */
286 #define FLASH_SST040 0x000E /* SST 39xF040 ID (512KB = 4Mbit x 8 ) */
288 #define FLASH_STM800AB 0x0051 /* STM M29WF800AB ( 8M = 512K x 16 ) */
289 #define FLASH_STMW320DT 0x0052 /* STM M29W320DT (32 M, top boot sector) */
290 #define FLASH_STMW320DB 0x0053 /* STM M29W320DB (32 M, bottom boot sect)*/
291 #define FLASH_STM320DB 0x00CB /* STM M29W320DB (4M = 64K x 64, bottom)*/
292 #define FLASH_STM800DT 0x00D7 /* STM M29W800DT (1M = 64K x 16, top) */
293 #define FLASH_STM800DB 0x005B /* STM M29W800DB (1M = 64K x 16, bottom)*/
295 #define FLASH_28F400_T 0x0062 /* MT 28F400B3 ID ( 4M = 256K x 16 ) */
296 #define FLASH_28F400_B 0x0063 /* MT 28F400B3 ID ( 4M = 256K x 16 ) */
298 #define FLASH_INTEL800T 0x0074 /* INTEL 28F800B3T ( 8M = 512K x 16 ) */
299 #define FLASH_INTEL800B 0x0075 /* INTEL 28F800B3B ( 8M = 512K x 16 ) */
300 #define FLASH_INTEL160T 0x0076 /* INTEL 28F160B3T ( 16M = 1 M x 16 ) */
301 #define FLASH_INTEL160B 0x0077 /* INTEL 28F160B3B ( 16M = 1 M x 16 ) */
302 #define FLASH_INTEL320T 0x0078 /* INTEL 28F320B3T ( 32M = 2 M x 16 ) */
303 #define FLASH_INTEL320B 0x0079 /* INTEL 28F320B3B ( 32M = 2 M x 16 ) */
304 #define FLASH_INTEL640T 0x007A /* INTEL 28F320B3T ( 64M = 4 M x 16 ) */
305 #define FLASH_INTEL640B 0x007B /* INTEL 28F320B3B ( 64M = 4 M x 16 ) */
307 #define FLASH_28F320J3A 0x007C /* INTEL 28F320J3A ( 32M = 128K x 32) */
308 #define FLASH_28F640J3A 0x007D /* INTEL 28F640J3A ( 64M = 128K x 64) */
309 #define FLASH_28F128J3A 0x007E /* INTEL 28F128J3A (128M = 128K x 128) */
311 #define FLASH_28F008S5 0x0080 /* Intel 28F008S5 ( 1M = 64K x 16 ) */
312 #define FLASH_28F016SV 0x0081 /* Intel 28F016SV ( 16M = 512k x 32 ) */
313 #define FLASH_28F800_B 0x0083 /* Intel E28F800B ( 1M = ? ) */
314 #define FLASH_AM29F800B 0x0084 /* AMD Am29F800BB ( 1M = ? ) */
315 #define FLASH_28F320J5 0x0085 /* Intel 28F320J5 ( 4M = 128K x 32 ) */
316 #define FLASH_28F160S3 0x0086 /* Intel 28F160S3 ( 16M = 512K x 32 ) */
317 #define FLASH_28F320S3 0x0088 /* Intel 28F320S3 ( 32M = 512K x 64 ) */
318 #define FLASH_AM640U 0x0090 /* AMD Am29LV640U ( 64M = 4M x 16 ) */
319 #define FLASH_AM033C 0x0091 /* AMD AM29LV033 ( 32M = 4M x 8 ) */
320 #define FLASH_LH28F016SCT 0x0092 /* Sharp 28F016SCT ( 8 Meg Flash SIMM ) */
321 #define FLASH_28F160F3B 0x0093 /* Intel 28F160F3B ( 16M = 1M x 16 ) */
323 #define FLASH_28F640J5 0x0099 /* INTEL 28F640J5 ( 64M = 128K x 64) */
325 #define FLASH_28F800C3T 0x009A /* Intel 28F800C3T ( 8M = 512K x 16 ) */
326 #define FLASH_28F800C3B 0x009B /* Intel 28F800C3B ( 8M = 512K x 16 ) */
327 #define FLASH_28F160C3T 0x009C /* Intel 28F160C3T ( 16M = 1M x 16 ) */
328 #define FLASH_28F160C3B 0x009D /* Intel 28F160C3B ( 16M = 1M x 16 ) */
329 #define FLASH_28F320C3T 0x009E /* Intel 28F320C3T ( 32M = 2M x 16 ) */
330 #define FLASH_28F320C3B 0x009F /* Intel 28F320C3B ( 32M = 2M x 16 ) */
331 #define FLASH_28F640C3T 0x00A0 /* Intel 28F640C3T ( 64M = 4M x 16 ) */
332 #define FLASH_28F640C3B 0x00A1 /* Intel 28F640C3B ( 64M = 4M x 16 ) */
333 #define FLASH_AMLV320U 0x00A2 /* AMD 29LV320M ( 32M = 2M x 16 ) */
334 #define FLASH_AMLV640U 0x00A4 /* AMD 29LV640M ( 64M = 4M x 16 ) */
335 #define FLASH_AMLV128U 0x00A6 /* AMD 29LV128M ( 128M = 8M x 16 ) */
336 #define FLASH_AMLV320B 0x00A7 /* AMD 29LV320MB ( 32M = 2M x 16 ) */
337 #define FLASH_AMLV320T 0x00A8 /* AMD 29LV320MT ( 32M = 2M x 16 ) */
338 /* Intel 28F256L18T 256M = 128K x 255 + 32k x 4 */
339 #define FLASH_28F256L18T 0x00B0
340 #define FLASH_AMDL163T 0x00B2 /* AMD AM29DL163T (2M x 16 ) */
341 #define FLASH_AMDL163B 0x00B3
343 #define FLASH_UNKNOWN 0xFFFF /* unknown flash type */
346 /* manufacturer offsets
348 #define FLASH_MAN_AMD 0x00000000 /* AMD */
349 #define FLASH_MAN_FUJ 0x00010000 /* Fujitsu */
350 #define FLASH_MAN_BM 0x00020000 /* Bright Microelectronics */
351 #define FLASH_MAN_MX 0x00030000 /* MXIC */
352 #define FLASH_MAN_STM 0x00040000
353 #define FLASH_MAN_TOSH 0x00050000 /* Toshiba */
354 #define FLASH_MAN_SST 0x00100000
355 #define FLASH_MAN_INTEL 0x00300000
356 #define FLASH_MAN_MT 0x00400000
357 #define FLASH_MAN_SHARP 0x00500000
360 #define FLASH_TYPEMASK 0x0000FFFF /* extract FLASH type information */
361 #define FLASH_VENDMASK 0xFFFF0000 /* extract FLASH vendor information */
363 #define FLASH_AMD_COMP 0x000FFFFF /* Up to this ID, FLASH is compatible */
364 /* with AMD, Fujitsu and SST */
365 /* (JEDEC standard commands ?) */
367 #define FLASH_BTYPE 0x0001 /* mask for bottom boot sector type */
369 /*-----------------------------------------------------------------------
372 * We can't find any specifications for maximum chip erase times,
373 * so these values are guestimates.
375 #define FLASH_ERASE_TIMEOUT 120000 /* timeout for erasing in ms */
376 #define FLASH_WRITE_TIMEOUT 500 /* timeout for writes in ms */
378 #endif /* !CFG_NO_FLASH */
380 #endif /* _FLASH_H_ */