2 * linux/include/linux/mtd/nand.h
4 * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
5 * Steven J. Hill <sjhill@cotw.com>
6 * Thomas Gleixner <gleixner@autronix.de>
8 * $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 * Contains standard defines and IDs for NAND flash devices
18 * 01-31-2000 DMW Created
19 * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
20 * so it can be used by other NAND flash device
21 * drivers. I also changed the copyright since none
22 * of the original contents of this file are specific
23 * to DoC devices. David can whack me with a baseball
24 * bat later if I did something naughty.
25 * 10-11-2000 SJH Added private NAND flash structure for driver
26 * 10-24-2000 SJH Added prototype for 'nand_scan' function
27 * 10-29-2001 TG changed nand_chip structure to support
28 * hardwarespecific function for accessing control lines
29 * 02-21-2002 TG added support for different read/write adress and
30 * ready/busy line access function
31 * 02-26-2002 TG added chip_delay to nand_chip structure to optimize
32 * command delay times for different chips
33 * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
34 * defines in jffs2/wbuf.c
36 #ifndef __LINUX_MTD_NAND_H
37 #define __LINUX_MTD_NAND_H
39 #ifdef CONFIG_NEW_NAND_CODE
43 * Standard NAND flash commands
45 #define NAND_CMD_READ0 0
46 #define NAND_CMD_READ1 1
47 #define NAND_CMD_PAGEPROG 0x10
48 #define NAND_CMD_READOOB 0x50
49 #define NAND_CMD_ERASE1 0x60
50 #define NAND_CMD_STATUS 0x70
51 #define NAND_CMD_SEQIN 0x80
52 #define NAND_CMD_READID 0x90
53 #define NAND_CMD_ERASE2 0xd0
54 #define NAND_CMD_RESET 0xff
57 * Enumeration for NAND flash chip state
69 * NAND Private Flash Chip Data
73 * IO_ADDR - address to access the 8 I/O lines of the flash device
75 * hwcontrol - hardwarespecific function for accesing control-lines
77 * dev_ready - hardwarespecific function for accesing device ready/busy line
79 * chip_lock - spinlock used to protect access to this structure
81 * wq - wait queue to sleep on if a NAND operation is in progress
83 * state - give the current state of the NAND device
85 * page_shift - number of address bits in a page (column address bits)
87 * data_buf - data buffer passed to/from MTD user modules
89 * data_cache - data cache for redundant page access and shadow for
92 * ecc_code_buf - used only for holding calculated or read ECCs for
93 * a page read or written when ECC is in use
95 * reserved - padding to make structure fall on word boundary if
100 unsigned long curadr;
101 unsigned char curmode;
102 /* Also some erase/write/pipeline info when we get that far */
110 u_char ecc_code_buf[6];
112 char ChipID; /* Type of DiskOnChip */
116 unsigned long erasesize;
117 unsigned long mfr; /* Flash IDs - only one type of flash per device */
123 unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */
124 unsigned long totlen;
125 uint oobblock; /* Size of OOB blocks (e.g. 512) */
126 uint oobsize; /* Amount of OOB data per block (e.g. 16) */
132 * NAND Flash Manufacturer ID Codes
134 #define NAND_MFR_TOSHIBA 0x98
135 #define NAND_MFR_SAMSUNG 0xec
138 * NAND Flash Device ID Structure
140 * Structure overview:
142 * name - Complete name of device
144 * manufacture_id - manufacturer ID code of device.
146 * model_id - model ID code of device.
148 * chipshift - total number of address bits for the device which
149 * is used to calculate address offsets and the total
150 * number of bytes the device is capable of.
152 * page256 - denotes if flash device has 256 byte pages or not.
154 * pageadrlen - number of bytes minus one needed to hold the
155 * complete address into the flash array. Keep in
156 * mind that when a read or write is done to a
157 * specific address, the address is input serially
158 * 8 bits at a time. This structure member is used
159 * by the read/write routines as a loop index for
160 * shifting the address out 8 bits at a time.
162 * erasesize - size of an erase block in the flash device.
164 struct nand_flash_dev {
171 unsigned long erasesize;
176 * Constants for oob configuration
178 #define NAND_NOOB_ECCPOS0 0
179 #define NAND_NOOB_ECCPOS1 1
180 #define NAND_NOOB_ECCPOS2 2
181 #define NAND_NOOB_ECCPOS3 3
182 #define NAND_NOOB_ECCPOS4 6
183 #define NAND_NOOB_ECCPOS5 7
184 #define NAND_NOOB_BADBPOS -1
185 #define NAND_NOOB_ECCVPOS -1
187 #define NAND_JFFS2_OOB_ECCPOS0 0
188 #define NAND_JFFS2_OOB_ECCPOS1 1
189 #define NAND_JFFS2_OOB_ECCPOS2 2
190 #define NAND_JFFS2_OOB_ECCPOS3 3
191 #define NAND_JFFS2_OOB_ECCPOS4 6
192 #define NAND_JFFS2_OOB_ECCPOS5 7
193 #define NAND_JFFS2_OOB_BADBPOS 5
194 #define NAND_JFFS2_OOB_ECCVPOS 4
196 #define NAND_JFFS2_OOB8_FSDAPOS 6
197 #define NAND_JFFS2_OOB16_FSDAPOS 8
198 #define NAND_JFFS2_OOB8_FSDALEN 2
199 #define NAND_JFFS2_OOB16_FSDALEN 8
201 unsigned long nand_probe(unsigned long physadr);
202 #endif /* !CONFIG_NEW_NAND_CODE */
203 #endif /* __LINUX_MTD_NAND_H */