3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5 * SPDX-License-Identifier: GPL-2.0+
11 /* 0xF800.0000 . 0xFBFF.FFFF 64MB SMI (Serial Flash Mem) */
12 /* 0xFC00.0000 . 0xFC1F.FFFF 2MB SMI (Serial Flash Reg.) */
14 #define FLASH_START_ADDRESS CONFIG_SYS_FLASH_BASE
15 #define FLASH_BANK_SIZE CONFIG_SYS_FLASH_BANK_SIZE
17 #define SMIBANK0_BASE (FLASH_START_ADDRESS)
18 #define SMIBANK1_BASE (SMIBANK0_BASE + FLASH_BANK_SIZE)
19 #define SMIBANK2_BASE (SMIBANK1_BASE + FLASH_BANK_SIZE)
20 #define SMIBANK3_BASE (SMIBANK2_BASE + FLASH_BANK_SIZE)
36 #define BANK_EN 0x0000000F /* enables all banks */
37 #define DSEL_TIME 0x00000060 /* Deselect time */
38 #define PRESCAL5 0x00000500 /* AHB_CK prescaling value */
39 #define PRESCALA 0x00000A00 /* AHB_CK prescaling value */
40 #define PRESCAL3 0x00000300 /* AHB_CK prescaling value */
41 #define PRESCAL4 0x00000400 /* AHB_CK prescaling value */
42 #define SW_MODE 0x10000000 /* enables SW Mode */
43 #define WB_MODE 0x20000000 /* Write Burst Mode */
44 #define FAST_MODE 0x00008000 /* Fast Mode */
45 #define HOLD1 0x00010000
48 #define RD_STATUS_REG 0x00000400 /* reads status reg */
49 #define WE 0x00000800 /* Write Enable */
50 #define BANK0_SEL 0x00000000 /* Select Banck0 */
51 #define BANK1_SEL 0x00001000 /* Select Banck1 */
52 #define BANK2_SEL 0x00002000 /* Select Banck2 */
53 #define BANK3_SEL 0x00003000 /* Select Banck3 */
54 #define BANKSEL_SHIFT 12
55 #define SEND 0x00000080 /* Send data */
56 #define TX_LEN_1 0x00000001 /* data length = 1 byte */
57 #define TX_LEN_2 0x00000002 /* data length = 2 byte */
58 #define TX_LEN_3 0x00000003 /* data length = 3 byte */
59 #define TX_LEN_4 0x00000004 /* data length = 4 byte */
60 #define RX_LEN_1 0x00000010 /* data length = 1 byte */
61 #define RX_LEN_2 0x00000020 /* data length = 2 byte */
62 #define RX_LEN_3 0x00000030 /* data length = 3 byte */
63 #define RX_LEN_4 0x00000040 /* data length = 4 byte */
64 #define TFIE 0x00000100 /* Tx Flag Interrupt Enable */
65 #define WCIE 0x00000200 /* WCF Interrupt Enable */
68 #define INT_WCF_CLR 0xFFFFFDFF /* clear: WCF clear */
69 #define INT_TFF_CLR 0xFFFFFEFF /* clear: TFF clear */
70 #define WIP_BIT 0x00000001 /* WIP Bit of SPI SR */
71 #define WEL_BIT 0x00000002 /* WEL Bit of SPI SR */
72 #define RSR 0x00000005 /* Read Status regiser */
73 #define TFF 0x00000100 /* Transfer Finished FLag */
74 #define WCF 0x00000200 /* Transfer Finished FLag */
75 #define ERF1 0x00000400 /* Error Flag 1 */
76 #define ERF2 0x00000800 /* Error Flag 2 */
77 #define WM0 0x00001000 /* WM Bank 0 */
78 #define WM1 0x00002000 /* WM Bank 1 */
79 #define WM2 0x00004000 /* WM Bank 2 */
80 #define WM3 0x00008000 /* WM Bank 3 */
84 #define READ_ID 0x0000009F /* Read Identification */
85 #define BULK_ERASE 0x000000C7 /* BULK erase */
86 #define SECTOR_ERASE 0x000000D8 /* SECTOR erase */
87 #define WRITE_ENABLE 0x00000006 /* Wenable command to FLASH */
95 #define SFLASH_PAGE_SIZE 0x100 /* flash page size */
96 #define XFER_FINISH_TOUT 15 /* xfer finish timeout(in ms) */
97 #define WMODE_TOUT 15 /* write enable timeout(in ms) */
99 extern void smi_init(void);