2 * From coreboot file of same name
4 * SPDX-License-Identifier: GPL-2.0+
10 #define PCI_ROM_HDR 0xaa55
12 struct pci_rom_header {
16 uint8_t reserved[0x12];
37 * Determines which execution method is used and whether we allow falling back
38 * to the other if the requested method is not available.
41 PCI_ROM_EMULATE = 0 << 0,
42 PCI_ROM_USE_NATIVE = 1 << 0,
43 PCI_ROM_ALLOW_FALLBACK = 1 << 1,
47 * dm_pci_run_vga_bios() - Run the VGA BIOS in an x86 PC
49 * @dev: Video device containing the BIOS
50 * @int15_handler: Function to call to handle int 0x15
51 * @exec_method: flags from enum pci_rom_emul
53 int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
57 * board_map_oprom_vendev() - map several PCI IDs to the one the ROM expects
59 * Some VGA option roms are used for several chipsets but they only have one
60 * PCI ID in their header. If we encounter such an option rom, we need to do
61 * the mapping ourselves.
63 * @vendev: Vendor and device for the video device
64 * @return standard vendor and device expected by the ROM
66 uint32_t board_map_oprom_vendev(uint32_t vendev);