git.sur5r.net Git - u-boot/blob - include/power/tps65910_pmic.h

   1 /*
   2  * Copyright (C) EETS GmbH, 2017, Felix Brack <f.brack@eets.ch>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __TPS65910_PMIC_H_
   8 #define __TPS65910_PMIC_H_
   9
  10 #define TPS65910_I2C_SEL_MASK           (0x1 << 4)
  11 #define TPS65910_VDD_SR_MASK            (0x1 << 7)
  12 #define TPS65910_GAIN_SEL_MASK          (0x3 << 6)
  13 #define TPS65910_VDD_SEL_MASK           0x7f
  14 #define TPS65910_VDD_SEL_MIN            3
  15 #define TPS65910_VDD_SEL_MAX            75
  16 #define TPS65910_SEL_MASK               (0x3 << 2)
  17 #define TPS65910_SUPPLY_STATE_MASK      0x3
  18 #define TPS65910_SUPPLY_STATE_OFF       0x0
  19 #define TPS65910_SUPPLY_STATE_ON        0x1
  20
  21 /* i2c registers */
  22 enum {
  23         TPS65910_REG_RTC_SEC                    = 0x00,
  24         TPS65910_REG_RTC_MIN,
  25         TPS65910_REG_RTC_HOUR,
  26         TPS65910_REG_RTC_DAY,
  27         TPS65910_REG_RTC_MONTH,
  28         TPS65910_REG_RTC_YEAR,
  29         TPS65910_REG_RTC_WEEK,
  30         TPS65910_REG_RTC_ALARM_SEC              = 0x08,
  31         TPS65910_REG_RTC_ALARM_MIN,
  32         TPS65910_REG_RTC_ALARM_HOUR,
  33         TPS65910_REG_RTC_ALARM_DAY,
  34         TPS65910_REG_RTC_ALARM_MONTH,
  35         TPS65910_REG_RTC_ALARM_YEAR,
  36         TPS65910_REG_RTC_CTRL                   = 0x10,
  37         TPS65910_REG_RTC_STAT,
  38         TPS65910_REG_RTC_INT,
  39         TPS65910_REG_RTC_COMP_LSB,
  40         TPS65910_REG_RTC_COMP_MSB,
  41         TPS65910_REG_RTC_RESISTOR_PRG,
  42         TPS65910_REG_RTC_RESET_STAT,
  43         TPS65910_REG_BACKUP1,
  44         TPS65910_REG_BACKUP2,
  45         TPS65910_REG_BACKUP3,
  46         TPS65910_REG_BACKUP4,
  47         TPS65910_REG_BACKUP5,
  48         TPS65910_REG_PUADEN,
  49         TPS65910_REG_REF,
  50         TPS65910_REG_VRTC,
  51         TPS65910_REG_VIO                        = 0x20,
  52         TPS65910_REG_VDD1,
  53         TPS65910_REG_VDD1_VAL,
  54         TPS65910_REG_VDD1_VAL_SR,
  55         TPS65910_REG_VDD2,
  56         TPS65910_REG_VDD2_VAL,
  57         TPS65910_REG_VDD2_VAL_SR,
  58         TPS65910_REG_VDD3,
  59         TPS65910_REG_VDIG1                      = 0x30,
  60         TPS65910_REG_VDIG2,
  61         TPS65910_REG_VAUX1,
  62         TPS65910_REG_VAUX2,
  63         TPS65910_REG_VAUX33,
  64         TPS65910_REG_VMMC,
  65         TPS65910_REG_VPLL,
  66         TPS65910_REG_VDAC,
  67         TPS65910_REG_THERM,
  68         TPS65910_REG_BATTERY_BACKUP_CHARGE,
  69         TPS65910_REG_DCDC_CTRL                  = 0x3e,
  70         TPS65910_REG_DEVICE_CTRL,
  71         TPS65910_REG_DEVICE_CTRL2,
  72         TPS65910_REG_SLEEP_KEEP_LDO_ON,
  73         TPS65910_REG_SLEEP_KEEP_RES_ON,
  74         TPS65910_REG_SLEEP_SET_LDO_OFF,
  75         TPS65910_REG_SLEEP_SET_RES_OFF,
  76         TPS65910_REG_EN1_LDO_ASS,
  77         TPS65910_REG_EM1_SMPS_ASS,
  78         TPS65910_REG_EN2_LDO_ASS,
  79         TPS65910_REG_EM2_SMPS_ASS,
  80         TPS65910_REG_INT_STAT                   = 0x50,
  81         TPS65910_REG_INT_MASK,
  82         TPS65910_REG_INT_STAT2,
  83         TPS65910_REG_INT_MASK2,
  84         TPS65910_REG_GPIO                       = 0x60,
  85         TPS65910_REG_JTAGREVNUM                 = 0x80,
  86         TPS65910_NUM_REGS
  87 };
  88
  89 /* chip supplies */
  90 enum {
  91         TPS65910_SUPPLY_VCCIO   = 0x00,
  92         TPS65910_SUPPLY_VCC1,
  93         TPS65910_SUPPLY_VCC2,
  94         TPS65910_SUPPLY_VCC3,
  95         TPS65910_SUPPLY_VCC4,
  96         TPS65910_SUPPLY_VCC5,
  97         TPS65910_SUPPLY_VCC6,
  98         TPS65910_SUPPLY_VCC7,
  99         TPS65910_NUM_SUPPLIES
 100 };
 101
 102 /* regulator unit numbers */
 103 enum {
 104         TPS65910_UNIT_VRTC = 0x00,
 105         TPS65910_UNIT_VIO,
 106         TPS65910_UNIT_VDD1,
 107         TPS65910_UNIT_VDD2,
 108         TPS65910_UNIT_VDD3,
 109         TPS65910_UNIT_VDIG1,
 110         TPS65910_UNIT_VDIG2,
 111         TPS65910_UNIT_VPLL,
 112         TPS65910_UNIT_VDAC,
 113         TPS65910_UNIT_VAUX1,
 114         TPS65910_UNIT_VAUX2,
 115         TPS65910_UNIT_VAUX33,
 116         TPS65910_UNIT_VMMC,
 117 };
 118
 119 /* platform data */
 120 struct tps65910_regulator_pdata {
 121         u32 supply;     /* regulator supply voltage in uV */
 122         uint unit;      /* unit-address according to DT */
 123 };
 124
 125 /* driver names */
 126 #define TPS65910_BUCK_DRIVER    "tps65910_buck"
 127 #define TPS65910_BOOST_DRIVER   "tps65910_boost"
 128 #define TPS65910_LDO_DRIVER     "tps65910_ldo"
 129
 130 #endif /* __TPS65910_PMIC_H_ */