]> git.sur5r.net Git - cc65/blob - libsrc/c128/c128.inc
newline is used elsewhere and must be exported
[cc65] / libsrc / c128 / c128.inc
1 ;
2 ; C64 generic definitions. Stolen from Elite128
3 ;
4
5
6 ; ---------------------------------------------------------------------------
7 ; Zero page, Commodore stuff
8
9 ST              = $90           ; IEC status byte
10
11 FNAM_LEN        = $B7           ; Length of filename
12 SECADR          = $B9           ; Secondary address
13 DEVNUM          = $BA           ; Device number
14 FNAM_BANK       = $C7           ; Bank for filename
15 FNAM_LO         = $BB           ; Address of filename
16 FNAM_HI         = $BC
17 KEY_COUNT       = $D0           ; Number of keys in input buffer
18 MODE            = $D7           ; 40/80 column mode flag
19 CURS_X          = $EC           ; Cursor column
20 CURS_Y          = $EB           ; Cursor row
21 SCREEN_PTR      = $E0           ; Pointer to current char in text screen
22 CRAM_PTR        = $E2           ; Pointer to current char in color RAM
23
24 CHARCOLOR       = $F1
25 FKEY_COUNT      = $D1           ; Characters for function key
26 FKEY_LEN        = $1000         ; Function key lengths
27 FKEY_TEXT       = $100A         ; Function key texts
28
29 ; ---------------------------------------------------------------------------
30 ; Kernal routines
31
32 ; Direct entries
33 CURS_ON         = $CD6F
34 CURS_OFF        = $CD9F
35 CLRSCR          = $C142
36 KBDREAD         = $C006
37
38 ; ---------------------------------------------------------------------------
39 ; Vectors
40
41 IRQVec          = $0314
42 BRKVec          = $0316
43 NMIVec          = $0318
44 KeyStoreVec     = $033C
45
46 ; ---------------------------------------------------------------------------
47 ; I/O: VIC
48
49 VIC             = $D000
50 VIC_SPR0_X      = $D000
51 VIC_SPR0_Y      = $D001
52 VIC_SPR1_X      = $D002
53 VIC_SPR1_Y      = $D003
54 VIC_SPR2_X      = $D004
55 VIC_SPR2_Y      = $D005
56 VIC_SPR3_X      = $D006
57 VIC_SPR3_Y      = $D007
58 VIC_SPR4_X      = $D008
59 VIC_SPR4_Y      = $D009
60 VIC_SPR5_X      = $D00A
61 VIC_SPR5_Y      = $D00B
62 VIC_SPR6_X      = $D00C
63 VIC_SPR6_Y      = $D00D
64 VIC_SPR7_X      = $D00E
65 VIC_SPR7_Y      = $D00F
66 VIC_SPR_HI_X    = $D010
67 VIC_SPR_ENA     = $D015
68 VIC_SPR_EXP_X   = $D017
69 VIC_SPR_EXP_Y   = $D01D
70 VIC_SPR_MCOLOR  = $D01C
71 VIC_SPR_BG_PRIO = $D01B
72
73 VIC_SPR_MCOLOR0 = $D025
74 VIC_SPR_MCOLOR1 = $D026
75
76 VIC_SPR0_COLOR  = $D027
77 VIC_SPR1_COLOR  = $D028
78 VIC_SPR2_COLOR  = $D029
79 VIC_SPR3_COLOR  = $D02A
80 VIC_SPR4_COLOR  = $D02B
81 VIC_SPR5_COLOR  = $D02C
82 VIC_SPR6_COLOR  = $D02D
83 VIC_SPR7_COLOR  = $D02E
84
85 VIC_CTRL1       = $D011
86 VIC_CTRL2       = $D016
87
88 VIC_HLINE       = $D012
89
90 VIC_VIDEO_ADR   = $D018
91
92 VIC_IRR         = $D019         ; Interrupt request register
93 VIC_IMR         = $D01A         ; Interrupt mask register
94
95 VIC_BORDERCOLOR = $D020
96 VIC_BG_COLOR0   = $D021
97 VIC_BG_COLOR1   = $D022
98 VIC_BG_COLOR2   = $D023
99 VIC_BG_COLOR3   = $D024
100
101 ; 128 stuff:
102 VIC_KBD_128     = $D02F         ; Extended kbd bits (visible in 64 mode)
103 VIC_CLK_128     = $D030         ; Clock rate register (visible in 64 mode)
104
105
106 ; ---------------------------------------------------------------------------
107 ; I/O: SID
108
109 SID             = $D400
110 SID_S1Lo        = $D400
111 SID_S1Hi        = $D401
112 SID_PB1Lo       = $D402
113 SID_PB1Hi       = $D403
114 SID_Ctl1        = $D404
115 SID_AD1         = $D405
116 SID_SUR1        = $D406
117
118 SID_S2Lo        = $D407
119 SID_S2Hi        = $D408
120 SID_PB2Lo       = $D409
121 SID_PB2Hi       = $D40A
122 SID_Ctl2        = $D40B
123 SID_AD2         = $D40C
124 SID_SUR2        = $D40D
125
126 SID_S3Lo        = $D40E
127 SID_S3Hi        = $D40F
128 SID_PB3Lo       = $D410
129 SID_PB3Hi       = $D411
130 SID_Ctl3        = $D412
131 SID_AD3         = $D413
132 SID_SUR3        = $D414
133
134 SID_FltLo       = $D415
135 SID_FltHi       = $D416
136 SID_FltCtl      = $D417
137 SID_Amp         = $D418
138 SID_ADConv1     = $D419
139 SID_ADConv2     = $D41A
140 SID_Noise       = $D41B
141 SID_Read3       = $D41C
142
143 ; ---------------------------------------------------------------------------
144 ; I/O: VDC (128 only)
145
146 VDC_INDEX       = $D600
147 VDC_DATA        = $D601
148
149 ; ---------------------------------------------------------------------------
150 ; I/O: CIAs
151
152 CIA1            = $DC00
153 CIA1_PRA        = $DC00
154 CIA1_PRB        = $DC01
155 CIA1_DDRA       = $DC02
156 CIA1_DDRB       = $DC03
157 CIA1_ICR        = $DC0D
158 CIA1_CRA        = $DC0E
159 CIA1_CRB        = $DC0F
160
161 CIA2            = $DD00
162 CIA2_PRA        = $DD00
163 CIA2_PRB        = $DD01
164 CIA2_DDRA       = $DD02
165 CIA2_DDRB       = $DD03
166 CIA2_ICR        = $DD0D
167 CIA2_CRA        = $DD0E
168 CIA2_CRB        = $DD0F
169
170 ; ---------------------------------------------------------------------------
171 ; I/O: MMU
172
173 MMU_CR          = $FF00
174
175 ; ---------------------------------------------------------------------------
176 ; Super CPU
177
178 SCPU_VIC_Bank1  = $D075
179 SCPU_Slow       = $D07A
180 SCPU_Fast       = $D07B
181 SCPU_EnableRegs = $D07E
182 SCPU_DisableRegs= $D07F
183 SCPU_Detect     = $D0BC
184
185