git.sur5r.net Git - u-boot/blob - nand_spl/nand_boot.c

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <nand.h>
  10 #include <asm/io.h>
  11
  12 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
  13
  14 #define ECCSTEPS        (CONFIG_SYS_NAND_PAGE_SIZE / \
  15                                         CONFIG_SYS_NAND_ECCSIZE)
  16 #define ECCTOTAL        (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
  17
  18
  19 #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
  20 /*
  21  * NAND command for small page NAND devices (512)
  22  */
  23 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
  24 {
  25         struct nand_chip *this = mtd->priv;
  26         int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
  27
  28         while (!this->dev_ready(mtd))
  29                 ;
  30
  31         /* Begin command latch cycle */
  32         this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
  33         /* Set ALE and clear CLE to start address cycle */
  34         /* Column address */
  35         this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
  36         this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
  37         this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
  38                        NAND_CTRL_ALE); /* A[24:17] */
  39 #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
  40         /* One more address cycle for devices > 32MiB */
  41         this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
  42                        NAND_CTRL_ALE); /* A[28:25] */
  43 #endif
  44         /* Latch in address */
  45         this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  46
  47         /*
  48          * Wait a while for the data to be ready
  49          */
  50         while (!this->dev_ready(mtd))
  51                 ;
  52
  53         return 0;
  54 }
  55 #else
  56 /*
  57  * NAND command for large page NAND devices (2k)
  58  */
  59 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
  60 {
  61         struct nand_chip *this = mtd->priv;
  62         int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
  63         void (*hwctrl)(struct mtd_info *mtd, int cmd,
  64                         unsigned int ctrl) = this->cmd_ctrl;
  65
  66         while (!this->dev_ready(mtd))
  67                 ;
  68
  69         /* Emulate NAND_CMD_READOOB */
  70         if (cmd == NAND_CMD_READOOB) {
  71                 offs += CONFIG_SYS_NAND_PAGE_SIZE;
  72                 cmd = NAND_CMD_READ0;
  73         }
  74
  75         /* Shift the offset from byte addressing to word addressing. */
  76         if (this->options & NAND_BUSWIDTH_16)
  77                 offs >>= 1;
  78
  79         /* Begin command latch cycle */
  80         hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
  81         /* Set ALE and clear CLE to start address cycle */
  82         /* Column address */
  83         hwctrl(mtd, offs & 0xff,
  84                        NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
  85         hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
  86         /* Row address */
  87         hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
  88         hwctrl(mtd, ((page_addr >> 8) & 0xff),
  89                        NAND_CTRL_ALE); /* A[27:20] */
  90 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
  91         /* One more address cycle for devices > 128MiB */
  92         hwctrl(mtd, (page_addr >> 16) & 0x0f,
  93                        NAND_CTRL_ALE); /* A[31:28] */
  94 #endif
  95         /* Latch in address */
  96         hwctrl(mtd, NAND_CMD_READSTART,
  97                        NAND_CTRL_CLE | NAND_CTRL_CHANGE);
  98         hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  99
 100         /*
 101          * Wait a while for the data to be ready
 102          */
 103         while (!this->dev_ready(mtd))
 104                 ;
 105
 106         return 0;
 107 }
 108 #endif
 109
 110 static int nand_is_bad_block(struct mtd_info *mtd, int block)
 111 {
 112         struct nand_chip *this = mtd->priv;
 113
 114         nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
 115
 116         /*
 117          * Read one byte (or two if it's a 16 bit chip).
 118          */
 119         if (this->options & NAND_BUSWIDTH_16) {
 120                 if (readw(this->IO_ADDR_R) != 0xffff)
 121                         return 1;
 122         } else {
 123                 if (readb(this->IO_ADDR_R) != 0xff)
 124                         return 1;
 125         }
 126
 127         return 0;
 128 }
 129
 130 #if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST)
 131 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
 132 {
 133         struct nand_chip *this = mtd->priv;
 134         u_char ecc_calc[ECCTOTAL];
 135         u_char ecc_code[ECCTOTAL];
 136         u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
 137         int i;
 138         int eccsize = CONFIG_SYS_NAND_ECCSIZE;
 139         int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
 140         int eccsteps = ECCSTEPS;
 141         uint8_t *p = dst;
 142
 143         nand_command(mtd, block, page, 0, NAND_CMD_READOOB);
 144         this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
 145         nand_command(mtd, block, page, 0, NAND_CMD_READ0);
 146
 147         /* Pick the ECC bytes out of the oob data */
 148         for (i = 0; i < ECCTOTAL; i++)
 149                 ecc_code[i] = oob_data[nand_ecc_pos[i]];
 150
 151
 152         for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 153                 this->ecc.hwctl(mtd, NAND_ECC_READ);
 154                 this->read_buf(mtd, p, eccsize);
 155                 this->ecc.calculate(mtd, p, &ecc_calc[i]);
 156                 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
 157         }
 158
 159         return 0;
 160 }
 161 #else
 162 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
 163 {
 164         struct nand_chip *this = mtd->priv;
 165         u_char ecc_calc[ECCTOTAL];
 166         u_char ecc_code[ECCTOTAL];
 167         u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
 168         int i;
 169         int eccsize = CONFIG_SYS_NAND_ECCSIZE;
 170         int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
 171         int eccsteps = ECCSTEPS;
 172         uint8_t *p = dst;
 173
 174         nand_command(mtd, block, page, 0, NAND_CMD_READ0);
 175
 176         for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 177                 this->ecc.hwctl(mtd, NAND_ECC_READ);
 178                 this->read_buf(mtd, p, eccsize);
 179                 this->ecc.calculate(mtd, p, &ecc_calc[i]);
 180         }
 181         this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
 182
 183         /* Pick the ECC bytes out of the oob data */
 184         for (i = 0; i < ECCTOTAL; i++)
 185                 ecc_code[i] = oob_data[nand_ecc_pos[i]];
 186
 187         eccsteps = ECCSTEPS;
 188         p = dst;
 189
 190         for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 191                 /* No chance to do something with the possible error message
 192                  * from correct_data(). We just hope that all possible errors
 193                  * are corrected by this routine.
 194                  */
 195                 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
 196         }
 197
 198         return 0;
 199 }
 200 #endif /* #if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) */
 201
 202 static int nand_load(struct mtd_info *mtd, unsigned int offs,
 203                      unsigned int uboot_size, uchar *dst)
 204 {
 205         unsigned int block, lastblock;
 206         unsigned int page;
 207
 208         /*
 209          * offs has to be aligned to a page address!
 210          */
 211         block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
 212         lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
 213         page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
 214
 215         while (block <= lastblock) {
 216                 if (!nand_is_bad_block(mtd, block)) {
 217                         /*
 218                          * Skip bad blocks
 219                          */
 220                         while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
 221                                 nand_read_page(mtd, block, page, dst);
 222                                 dst += CONFIG_SYS_NAND_PAGE_SIZE;
 223                                 page++;
 224                         }
 225
 226                         page = 0;
 227                 } else {
 228                         lastblock++;
 229                 }
 230
 231                 block++;
 232         }
 233
 234         return 0;
 235 }
 236
 237 /*
 238  * The main entry for NAND booting. It's necessary that SDRAM is already
 239  * configured and available since this code loads the main U-Boot image
 240  * from NAND into SDRAM and starts it from there.
 241  */
 242 void nand_boot(void)
 243 {
 244         struct nand_chip nand_chip;
 245         nand_info_t nand_info;
 246         __attribute__((noreturn)) void (*uboot)(void);
 247
 248         /*
 249          * Init board specific nand support
 250          */
 251         nand_chip.select_chip = NULL;
 252         nand_info.priv = &nand_chip;
 253         nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void  __iomem *)CONFIG_SYS_NAND_BASE;
 254         nand_chip.dev_ready = NULL;     /* preset to NULL */
 255         nand_chip.options = 0;
 256         board_nand_init(&nand_chip);
 257
 258         if (nand_chip.select_chip)
 259                 nand_chip.select_chip(&nand_info, 0);
 260
 261         /*
 262          * Load U-Boot image from NAND into RAM
 263          */
 264         nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
 265                   (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
 266
 267 #ifdef CONFIG_NAND_ENV_DST
 268         nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 269                   (uchar *)CONFIG_NAND_ENV_DST);
 270
 271 #ifdef CONFIG_ENV_OFFSET_REDUND
 272         nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
 273                   (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
 274 #endif
 275 #endif
 276
 277         if (nand_chip.select_chip)
 278                 nand_chip.select_chip(&nand_info, -1);
 279
 280         /*
 281          * Jump to U-Boot image
 282          */
 283         uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
 284         (*uboot)();
 285 }