1 /*****************************************************************************/
5 /* Environment independent low level optimizations */
9 /* (C) 2001-2009, Ullrich von Bassewitz */
10 /* Roemerstrasse 52 */
11 /* D-70794 Filderstadt */
12 /* EMail: uz@cc65.org */
15 /* This software is provided 'as-is', without any expressed or implied */
16 /* warranty. In no event will the authors be held liable for any damages */
17 /* arising from the use of this software. */
19 /* Permission is granted to anyone to use this software for any purpose, */
20 /* including commercial applications, and to alter it and redistribute it */
21 /* freely, subject to the following restrictions: */
23 /* 1. The origin of this software must not be misrepresented; you must not */
24 /* claim that you wrote the original software. If you use this software */
25 /* in a product, an acknowledgment in the product documentation would be */
26 /* appreciated but is not required. */
27 /* 2. Altered source versions must be plainly marked as such, and must not */
28 /* be misrepresented as being the original software. */
29 /* 3. This notice may not be removed or altered from any source */
32 /*****************************************************************************/
48 /*****************************************************************************/
49 /* Helper functions */
50 /*****************************************************************************/
54 static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const char* Arg)
55 /* Checks a range of code entries if there are any memory accesses to Arg.
56 * Note: This function is not 100% safe, because there is more than one way
57 * to express a memory location ("foo" and "foo+0" comes to mind) and there
58 * may be other accesses through pointers. For the code generated by cc65 and
59 * for the purpose of the caller (OptPushPop) it is assumed to be safe enough
63 /* Walk over all code entries */
66 /* Get the next entry */
67 CodeEntry* E = CS_GetEntry (S, From);
69 /* For simplicity, we just check if there is an argument and if this
70 * argument equals Arg.
72 if (E->Arg && strcmp (E->Arg, Arg) == 0) {
87 static int GetBranchDist (CodeSeg* S, unsigned From, CodeEntry* To)
88 /* Get the branch distance between the two entries and return it. The distance
89 * will be negative for backward jumps and positive for forward jumps.
92 /* Get the index of the branch target */
93 unsigned TI = CS_GetEntryIndex (S, To);
95 /* Determine the branch distance */
98 /* Forward branch, do not count the current insn */
101 CodeEntry* N = CS_GetEntry (S, J++);
105 /* Backward branch */
108 CodeEntry* N = CS_GetEntry (S, J++);
113 /* Return the calculated distance */
119 static int IsShortDist (int Distance)
120 /* Return true if the given distance is a short branch distance */
122 return (Distance >= -125 && Distance <= 125);
127 static short ZPRegVal (unsigned short Use, const RegContents* RC)
128 /* Return the contents of the given zeropage register */
130 if ((Use & REG_TMP1) != 0) {
132 } else if ((Use & REG_PTR1_LO) != 0) {
134 } else if ((Use & REG_PTR1_HI) != 0) {
136 } else if ((Use & REG_SREG_LO) != 0) {
138 } else if ((Use & REG_SREG_HI) != 0) {
141 return UNKNOWN_REGVAL;
147 static short RegVal (unsigned short Use, const RegContents* RC)
148 /* Return the contents of the given register */
150 if ((Use & REG_A) != 0) {
152 } else if ((Use & REG_X) != 0) {
154 } else if ((Use & REG_Y) != 0) {
157 return ZPRegVal (Use, RC);
163 /*****************************************************************************/
164 /* Replace jumps to RTS by RTS */
165 /*****************************************************************************/
169 unsigned OptRTSJumps1 (CodeSeg* S)
170 /* Replace jumps to RTS by RTS */
172 unsigned Changes = 0;
174 /* Walk over all entries minus the last one */
176 while (I < CS_GetEntryCount (S)) {
178 /* Get the next entry */
179 CodeEntry* E = CS_GetEntry (S, I);
181 /* Check if it's an unconditional branch to a local target */
182 if ((E->Info & OF_UBRA) != 0 &&
184 E->JumpTo->Owner->OPC == OP65_RTS) {
186 /* Insert an RTS instruction */
187 CodeEntry* X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->LI);
188 CS_InsertEntry (S, X, I+1);
190 /* Delete the jump */
193 /* Remember, we had changes */
203 /* Return the number of changes made */
209 unsigned OptRTSJumps2 (CodeSeg* S)
210 /* Replace long conditional jumps to RTS */
212 unsigned Changes = 0;
214 /* Walk over all entries minus the last one */
216 while (I < CS_GetEntryCount (S)) {
220 /* Get the next entry */
221 CodeEntry* E = CS_GetEntry (S, I);
223 /* Check if it's an unconditional branch to a local target */
224 if ((E->Info & OF_CBRA) != 0 && /* Conditional branch */
225 (E->Info & OF_LBRA) != 0 && /* Long branch */
226 E->JumpTo != 0 && /* Local label */
227 E->JumpTo->Owner->OPC == OP65_RTS && /* Target is an RTS */
228 (N = CS_GetNextEntry (S, I)) != 0) { /* There is a next entry */
234 /* We will create a jump around an RTS instead of the long branch */
235 X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->JumpTo->Owner->LI);
236 CS_InsertEntry (S, X, I+1);
238 /* Get the new branch opcode */
239 NewBranch = MakeShortBranch (GetInverseBranch (E->OPC));
241 /* Get the label attached to N, create a new one if needed */
242 LN = CS_GenLabel (S, N);
244 /* Generate the branch */
245 X = NewCodeEntry (NewBranch, AM65_BRA, LN->Name, LN, E->LI);
246 CS_InsertEntry (S, X, I+1);
248 /* Delete the long branch */
251 /* Remember, we had changes */
261 /* Return the number of changes made */
267 /*****************************************************************************/
268 /* Remove dead jumps */
269 /*****************************************************************************/
273 unsigned OptDeadJumps (CodeSeg* S)
274 /* Remove dead jumps (jumps to the next instruction) */
276 unsigned Changes = 0;
278 /* Walk over all entries minus the last one */
280 while (I < CS_GetEntryCount (S)) {
282 /* Get the next entry */
283 CodeEntry* E = CS_GetEntry (S, I);
285 /* Check if it's a branch, if it has a local target, and if the target
286 * is the next instruction.
288 if (E->AM == AM65_BRA &&
290 E->JumpTo->Owner == CS_GetNextEntry (S, I)) {
292 /* Delete the dead jump */
295 /* Remember, we had changes */
306 /* Return the number of changes made */
312 /*****************************************************************************/
313 /* Remove dead code */
314 /*****************************************************************************/
318 unsigned OptDeadCode (CodeSeg* S)
319 /* Remove dead code (code that follows an unconditional jump or an rts/rti
323 unsigned Changes = 0;
325 /* Walk over all entries */
327 while (I < CS_GetEntryCount (S)) {
333 CodeEntry* E = CS_GetEntry (S, I);
335 /* Check if it's an unconditional branch, and if the next entry has
336 * no labels attached, or if the label is just used so that the insn
337 * can jump to itself.
339 if ((E->Info & OF_DEAD) != 0 && /* Dead code follows */
340 (N = CS_GetNextEntry (S, I)) != 0 && /* Has next entry */
341 (!CE_HasLabel (N) || /* Don't has a label */
342 ((N->Info & OF_UBRA) != 0 && /* Uncond branch */
343 (LN = N->JumpTo) != 0 && /* Jumps to known label */
344 LN->Owner == N && /* Attached to insn */
345 CL_GetRefCount (LN) == 1))) { /* Only reference */
347 /* Delete the next entry */
348 CS_DelEntry (S, I+1);
350 /* Remember, we had changes */
361 /* Return the number of changes made */
367 /*****************************************************************************/
368 /* Optimize jump cascades */
369 /*****************************************************************************/
373 unsigned OptJumpCascades (CodeSeg* S)
374 /* Optimize jump cascades (jumps to jumps). In such a case, the jump is
375 * replaced by a jump to the final location. This will in some cases produce
376 * worse code, because some jump targets are no longer reachable by short
377 * branches, but this is quite rare, so there are more advantages than
381 unsigned Changes = 0;
383 /* Walk over all entries */
385 while (I < CS_GetEntryCount (S)) {
391 CodeEntry* E = CS_GetEntry (S, I);
393 /* Check if it's a branch, if it has a jump label, if this jump
394 * label is not attached to the instruction itself, and if the
395 * target instruction is itself a branch.
397 if ((E->Info & OF_BRA) != 0 &&
398 (OldLabel = E->JumpTo) != 0 &&
399 (N = OldLabel->Owner) != E &&
400 (N->Info & OF_BRA) != 0) {
402 /* Check if we can use the final target label. This is the case,
403 * if the target branch is an absolut branch, or if it is a
404 * conditional branch checking the same condition as the first one.
406 if ((N->Info & OF_UBRA) != 0 ||
407 ((E->Info & OF_CBRA) != 0 &&
408 GetBranchCond (E->OPC) == GetBranchCond (N->OPC))) {
410 /* This is a jump cascade and we may jump to the final target,
411 * provided that the other insn does not jump to itself. If
412 * this is the case, we can also jump to ourselves, otherwise
413 * insert a jump to the new instruction and remove the old one.
416 CodeLabel* LN = N->JumpTo;
418 if (LN != 0 && LN->Owner == N) {
420 /* We found a jump to a jump to itself. Replace our jump
421 * by a jump to itself.
423 CodeLabel* LE = CS_GenLabel (S, E);
424 X = NewCodeEntry (E->OPC, E->AM, LE->Name, LE, E->LI);
428 /* Jump to the final jump target */
429 X = NewCodeEntry (E->OPC, E->AM, N->Arg, N->JumpTo, E->LI);
433 /* Insert it behind E */
434 CS_InsertEntry (S, X, I+1);
439 /* Remember, we had changes */
442 /* Check if both are conditional branches, and the condition of
443 * the second is the inverse of that of the first. In this case,
444 * the second branch will never be taken, and we may jump directly
445 * to the instruction behind this one.
447 } else if ((E->Info & OF_CBRA) != 0 && (N->Info & OF_CBRA) != 0) {
449 CodeEntry* X; /* Instruction behind N */
450 CodeLabel* LX; /* Label attached to X */
452 /* Get the branch conditions of both branches */
453 bc_t BC1 = GetBranchCond (E->OPC);
454 bc_t BC2 = GetBranchCond (N->OPC);
456 /* Check the branch conditions */
457 if (BC1 != GetInverseCond (BC2)) {
458 /* Condition not met */
462 /* We may jump behind this conditional branch. Get the
463 * pointer to the next instruction
465 if ((X = CS_GetNextEntry (S, CS_GetEntryIndex (S, N))) == 0) {
466 /* N is the last entry, bail out */
470 /* Get the label attached to X, create a new one if needed */
471 LX = CS_GenLabel (S, X);
473 /* Move the reference from E to the new label */
474 CS_MoveLabelRef (S, E, LX);
476 /* Remember, we had changes */
487 /* Return the number of changes made */
493 /*****************************************************************************/
494 /* Optimize jsr/rts */
495 /*****************************************************************************/
499 unsigned OptRTS (CodeSeg* S)
500 /* Optimize subroutine calls followed by an RTS. The subroutine call will get
501 * replaced by a jump. Don't bother to delete the RTS if it does not have a
502 * label, the dead code elimination should take care of it.
505 unsigned Changes = 0;
507 /* Walk over all entries minus the last one */
509 while (I < CS_GetEntryCount (S)) {
514 CodeEntry* E = CS_GetEntry (S, I);
516 /* Check if it's a subroutine call and if the following insn is RTS */
517 if (E->OPC == OP65_JSR &&
518 (N = CS_GetNextEntry (S, I)) != 0 &&
519 N->OPC == OP65_RTS) {
521 /* Change the jsr to a jmp and use the additional info for a jump */
523 CE_ReplaceOPC (E, OP65_JMP);
525 /* Remember, we had changes */
535 /* Return the number of changes made */
541 /*****************************************************************************/
542 /* Optimize jump targets */
543 /*****************************************************************************/
547 unsigned OptJumpTarget1 (CodeSeg* S)
548 /* If the instruction preceeding an unconditional branch is the same as the
549 * instruction preceeding the jump target, the jump target may be moved
550 * one entry back. This is a size optimization, since the instruction before
551 * the branch gets removed.
554 unsigned Changes = 0;
555 CodeEntry* E1; /* Entry 1 */
556 CodeEntry* E2; /* Entry 2 */
557 CodeEntry* T1; /* Jump target entry 1 */
558 CodeLabel* TL1; /* Target label 1 */
560 /* Walk over the entries */
562 while (I < CS_GetEntryCount (S)) {
565 E2 = CS_GetNextEntry (S, I);
567 /* Check if we have a jump or branch without a label attached, and
568 * a jump target, which is not attached to the jump itself
571 (E2->Info & OF_UBRA) != 0 &&
574 E2->JumpTo->Owner != E2) {
576 /* Get the entry preceeding the branch target */
577 T1 = CS_GetPrevEntry (S, CS_GetEntryIndex (S, E2->JumpTo->Owner));
579 /* There is no such entry */
583 /* The entry preceeding the branch target may not be the branch
590 /* Get the entry preceeding the jump */
591 E1 = CS_GetEntry (S, I);
593 /* Check if both preceeding instructions are identical */
594 if (!CodeEntriesAreEqual (E1, T1)) {
595 /* Not equal, try next */
599 /* Get the label for the instruction preceeding the jump target.
600 * This routine will create a new label if the instruction does
601 * not already have one.
603 TL1 = CS_GenLabel (S, T1);
605 /* Change the jump target to point to this new label */
606 CS_MoveLabelRef (S, E2, TL1);
608 /* If the instruction preceeding the jump has labels attached,
609 * move references to this label to the new label.
611 if (CE_HasLabel (E1)) {
612 CS_MoveLabels (S, E1, T1);
615 /* Remove the entry preceeding the jump */
618 /* Remember, we had changes */
628 /* Return the number of changes made */
634 unsigned OptJumpTarget2 (CodeSeg* S)
635 /* If a bcs jumps to a sec insn or a bcc jumps to clc, skip this insn, since
636 * it's job is already done.
639 unsigned Changes = 0;
641 /* Walk over the entries */
643 while (I < CS_GetEntryCount (S)) {
645 /* OP that may be skipped */
648 /* Jump target insn, old and new */
656 CodeEntry* E = CS_GetEntry (S, I);
658 /* Check if this is a bcc insn */
659 if (E->OPC == OP65_BCC || E->OPC == OP65_JCC) {
661 } else if (E->OPC == OP65_BCS || E->OPC == OP65_JCS) {
664 /* Not what we're looking for */
668 /* Must have a jump target */
669 if (E->JumpTo == 0) {
673 /* Get the owner insn of the jump target and check if it's the one, we
674 * will skip if present.
676 T = E->JumpTo->Owner;
681 /* Get the entry following the branch target */
682 N = CS_GetNextEntry (S, CS_GetEntryIndex (S, T));
684 /* There is no such entry */
688 /* Get the label for the instruction following the jump target.
689 * This routine will create a new label if the instruction does
690 * not already have one.
692 L = CS_GenLabel (S, N);
694 /* Change the jump target to point to this new label */
695 CS_MoveLabelRef (S, E, L);
697 /* Remember that we had changes */
705 /* Return the number of changes made */
711 /*****************************************************************************/
712 /* Optimize conditional branches */
713 /*****************************************************************************/
717 unsigned OptCondBranches1 (CodeSeg* S)
718 /* Performs several optimization steps:
720 * - If an immidiate load of a register is followed by a conditional jump that
721 * is never taken because the load of the register sets the flags in such a
722 * manner, remove the conditional branch.
723 * - If the conditional branch is always taken because of the register load,
724 * replace it by a jmp.
725 * - If a conditional branch jumps around an unconditional branch, remove the
726 * conditional branch and make the jump a conditional branch with the
727 * inverse condition of the first one.
730 unsigned Changes = 0;
732 /* Walk over the entries */
734 while (I < CS_GetEntryCount (S)) {
740 CodeEntry* E = CS_GetEntry (S, I);
742 /* Check if it's a register load */
743 if ((E->Info & OF_LOAD) != 0 && /* It's a load instruction */
744 E->AM == AM65_IMM && /* ..with immidiate addressing */
745 (E->Flags & CEF_NUMARG) != 0 && /* ..and a numeric argument. */
746 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
747 (N->Info & OF_CBRA) != 0 && /* ..which is a conditional branch */
748 !CE_HasLabel (N)) { /* ..and does not have a label */
750 /* Get the branch condition */
751 bc_t BC = GetBranchCond (N->OPC);
753 /* Check the argument against the branch condition */
754 if ((BC == BC_EQ && E->Num != 0) ||
755 (BC == BC_NE && E->Num == 0) ||
756 (BC == BC_PL && (E->Num & 0x80) != 0) ||
757 (BC == BC_MI && (E->Num & 0x80) == 0)) {
759 /* Remove the conditional branch */
760 CS_DelEntry (S, I+1);
762 /* Remember, we had changes */
765 } else if ((BC == BC_EQ && E->Num == 0) ||
766 (BC == BC_NE && E->Num != 0) ||
767 (BC == BC_PL && (E->Num & 0x80) == 0) ||
768 (BC == BC_MI && (E->Num & 0x80) != 0)) {
770 /* The branch is always taken, replace it by a jump */
771 CE_ReplaceOPC (N, OP65_JMP);
773 /* Remember, we had changes */
779 if ((E->Info & OF_CBRA) != 0 && /* It's a conditional branch */
780 (L = E->JumpTo) != 0 && /* ..referencing a local label */
781 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
782 (N->Info & OF_UBRA) != 0 && /* ..which is an uncond branch, */
783 !CE_HasLabel (N) && /* ..has no label attached */
784 L->Owner == CS_GetNextEntry (S, I+1)) {/* ..and jump target follows */
786 /* Replace the jump by a conditional branch with the inverse branch
787 * condition than the branch around it.
789 CE_ReplaceOPC (N, GetInverseBranch (E->OPC));
791 /* Remove the conditional branch */
794 /* Remember, we had changes */
804 /* Return the number of changes made */
810 unsigned OptCondBranches2 (CodeSeg* S)
811 /* If on entry to a "rol a" instruction the accu is zero, and a beq/bne follows,
812 * we can remove the rol and branch on the state of the carry flag.
815 unsigned Changes = 0;
818 /* Generate register info for this step */
821 /* Walk over the entries */
823 while (I < CS_GetEntryCount (S)) {
828 CodeEntry* E = CS_GetEntry (S, I);
830 /* Check if it's a rol insn with A in accu and a branch follows */
831 if (E->OPC == OP65_ROL &&
833 E->RI->In.RegA == 0 &&
835 (N = CS_GetNextEntry (S, I)) != 0 &&
836 (N->Info & OF_ZBRA) != 0 &&
837 !RegAUsed (S, I+1)) {
839 /* Replace the branch condition */
840 switch (GetBranchCond (N->OPC)) {
841 case BC_EQ: CE_ReplaceOPC (N, OP65_JCC); break;
842 case BC_NE: CE_ReplaceOPC (N, OP65_JCS); break;
843 default: Internal ("Unknown branch condition in OptCondBranches2");
846 /* Delete the rol insn */
849 /* Remember, we had changes */
857 /* Free register info */
860 /* Return the number of changes made */
866 /*****************************************************************************/
867 /* Remove unused loads and stores */
868 /*****************************************************************************/
872 unsigned OptUnusedLoads (CodeSeg* S)
873 /* Remove loads of registers where the value loaded is not used later. */
875 unsigned Changes = 0;
877 /* Walk over the entries */
879 while (I < CS_GetEntryCount (S)) {
884 CodeEntry* E = CS_GetEntry (S, I);
886 /* Check if it's a register load or transfer insn */
887 if ((E->Info & (OF_LOAD | OF_XFR | OF_REG_INCDEC)) != 0 &&
888 (N = CS_GetNextEntry (S, I)) != 0 &&
889 !CE_UseLoadFlags (N)) {
891 /* Check which sort of load or transfer it is */
898 case OP65_TYA: R = REG_A; break;
902 case OP65_TAX: R = REG_X; break;
906 case OP65_TAY: R = REG_Y; break;
907 default: goto NextEntry; /* OOPS */
910 /* Get register usage and check if the register value is used later */
911 if ((GetRegInfo (S, I+1, R) & R) == 0) {
913 /* Register value is not used, remove the load */
916 /* Remember, we had changes. Account the deleted entry in I. */
929 /* Return the number of changes made */
935 unsigned OptUnusedStores (CodeSeg* S)
936 /* Remove stores into zero page registers that aren't used later */
938 unsigned Changes = 0;
940 /* Walk over the entries */
942 while (I < CS_GetEntryCount (S)) {
945 CodeEntry* E = CS_GetEntry (S, I);
947 /* Check if it's a register load or transfer insn */
948 if ((E->Info & OF_STORE) != 0 &&
950 (E->Chg & REG_ZP) != 0) {
952 /* Check for the zero page location. We know that there cannot be
953 * more than one zero page location involved in the store.
955 unsigned R = E->Chg & REG_ZP;
957 /* Get register usage and check if the register value is used later */
958 if ((GetRegInfo (S, I+1, R) & R) == 0) {
960 /* Register value is not used, remove the load */
963 /* Remember, we had changes */
966 /* Continue with next insn */
976 /* Return the number of changes made */
982 unsigned OptDupLoads (CodeSeg* S)
983 /* Remove loads of registers where the value loaded is already in the register. */
985 unsigned Changes = 0;
988 /* Generate register info for this step */
991 /* Walk over the entries */
993 while (I < CS_GetEntryCount (S)) {
998 CodeEntry* E = CS_GetEntry (S, I);
1000 /* Assume we won't delete the entry */
1003 /* Get a pointer to the input registers of the insn */
1004 const RegContents* In = &E->RI->In;
1006 /* Handle the different instructions */
1010 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1011 CE_IsKnownImm (E, In->RegA) && /* Value to be loaded is known */
1012 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1013 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1019 if (RegValIsKnown (In->RegX) && /* Value of X is known */
1020 CE_IsKnownImm (E, In->RegX) && /* Value to be loaded is known */
1021 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1022 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1028 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1029 CE_IsKnownImm (E, In->RegY) && /* Value to be loaded is known */
1030 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1031 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1037 /* If we store into a known zero page location, and this
1038 * location does already contain the value to be stored,
1041 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1042 E->AM == AM65_ZP && /* Store into zp */
1043 In->RegA == ZPRegVal (E->Chg, In)) { /* Value identical */
1050 /* If we store into a known zero page location, and this
1051 * location does already contain the value to be stored,
1054 if (RegValIsKnown (In->RegX) && /* Value of A is known */
1055 E->AM == AM65_ZP && /* Store into zp */
1056 In->RegX == ZPRegVal (E->Chg, In)) { /* Value identical */
1060 /* If the value in the X register is known and the same as
1061 * that in the A register, replace the store by a STA. The
1062 * optimizer will then remove the load instruction for X
1063 * later. STX does support the zeropage,y addressing mode,
1064 * so be sure to check for that.
1066 } else if (RegValIsKnown (In->RegX) &&
1067 In->RegX == In->RegA &&
1068 E->AM != AM65_ABSY &&
1069 E->AM != AM65_ZPY) {
1070 /* Use the A register instead */
1071 CE_ReplaceOPC (E, OP65_STA);
1076 /* If we store into a known zero page location, and this
1077 * location does already contain the value to be stored,
1080 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1081 E->AM == AM65_ZP && /* Store into zp */
1082 In->RegY == ZPRegVal (E->Chg, In)) { /* Value identical */
1086 /* If the value in the Y register is known and the same as
1087 * that in the A register, replace the store by a STA. The
1088 * optimizer will then remove the load instruction for Y
1089 * later. If replacement by A is not possible try a
1090 * replacement by X, but check for invalid addressing modes
1093 } else if (RegValIsKnown (In->RegY)) {
1094 if (In->RegY == In->RegA) {
1095 CE_ReplaceOPC (E, OP65_STA);
1096 } else if (In->RegY == In->RegX &&
1097 E->AM != AM65_ABSX &&
1098 E->AM != AM65_ZPX) {
1099 CE_ReplaceOPC (E, OP65_STX);
1105 /* If we store into a known zero page location, and this
1106 * location does already contain the value to be stored,
1109 if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && E->AM == AM65_ZP) {
1110 if (ZPRegVal (E->Chg, In) == 0) {
1117 if (RegValIsKnown (In->RegA) &&
1118 In->RegA == In->RegX &&
1119 (N = CS_GetNextEntry (S, I)) != 0 &&
1120 !CE_UseLoadFlags (N)) {
1121 /* Value is identical and not followed by a branch */
1127 if (RegValIsKnown (In->RegA) &&
1128 In->RegA == In->RegY &&
1129 (N = CS_GetNextEntry (S, I)) != 0 &&
1130 !CE_UseLoadFlags (N)) {
1131 /* Value is identical and not followed by a branch */
1137 if (RegValIsKnown (In->RegX) &&
1138 In->RegX == In->RegA &&
1139 (N = CS_GetNextEntry (S, I)) != 0 &&
1140 !CE_UseLoadFlags (N)) {
1141 /* Value is identical and not followed by a branch */
1147 if (RegValIsKnown (In->RegY) &&
1148 In->RegY == In->RegA &&
1149 (N = CS_GetNextEntry (S, I)) != 0 &&
1150 !CE_UseLoadFlags (N)) {
1151 /* Value is identical and not followed by a branch */
1161 /* Delete the entry if requested */
1164 /* Register value is not used, remove the load */
1167 /* Remember, we had changes */
1179 /* Free register info */
1182 /* Return the number of changes made */
1188 unsigned OptStoreLoad (CodeSeg* S)
1189 /* Remove a store followed by a load from the same location. */
1191 unsigned Changes = 0;
1193 /* Walk over the entries */
1195 while (I < CS_GetEntryCount (S)) {
1200 /* Get next entry */
1201 CodeEntry* E = CS_GetEntry (S, I);
1203 /* Check if it is a store instruction followed by a load from the
1204 * same address which is itself not followed by a conditional branch.
1206 if ((E->Info & OF_STORE) != 0 &&
1207 (N = CS_GetNextEntry (S, I)) != 0 &&
1210 ((E->OPC == OP65_STA && N->OPC == OP65_LDA) ||
1211 (E->OPC == OP65_STX && N->OPC == OP65_LDX) ||
1212 (E->OPC == OP65_STY && N->OPC == OP65_LDY)) &&
1213 strcmp (E->Arg, N->Arg) == 0 &&
1214 (X = CS_GetNextEntry (S, I+1)) != 0 &&
1215 !CE_UseLoadFlags (X)) {
1217 /* Register has already the correct value, remove the load */
1218 CS_DelEntry (S, I+1);
1220 /* Remember, we had changes */
1230 /* Return the number of changes made */
1236 unsigned OptTransfers1 (CodeSeg* S)
1237 /* Remove transfers from one register to another and back */
1239 unsigned Changes = 0;
1241 /* Walk over the entries */
1243 while (I < CS_GetEntryCount (S)) {
1249 /* Get next entry */
1250 CodeEntry* E = CS_GetEntry (S, I);
1252 /* Check if we have two transfer instructions */
1253 if ((E->Info & OF_XFR) != 0 &&
1254 (N = CS_GetNextEntry (S, I)) != 0 &&
1256 (N->Info & OF_XFR) != 0) {
1258 /* Check if it's a transfer and back */
1259 if ((E->OPC == OP65_TAX && N->OPC == OP65_TXA && !RegXUsed (S, I+2)) ||
1260 (E->OPC == OP65_TAY && N->OPC == OP65_TYA && !RegYUsed (S, I+2)) ||
1261 (E->OPC == OP65_TXA && N->OPC == OP65_TAX && !RegAUsed (S, I+2)) ||
1262 (E->OPC == OP65_TYA && N->OPC == OP65_TAY && !RegAUsed (S, I+2))) {
1264 /* If the next insn is a conditional branch, check if the insn
1265 * preceeding the first xfr will set the flags right, otherwise we
1266 * may not remove the sequence.
1268 if ((X = CS_GetNextEntry (S, I+1)) == 0) {
1271 if (CE_UseLoadFlags (X)) {
1273 /* No preceeding entry */
1276 P = CS_GetEntry (S, I-1);
1277 if ((P->Info & OF_SETF) == 0) {
1278 /* Does not set the flags */
1283 /* Remove both transfers */
1284 CS_DelEntry (S, I+1);
1287 /* Remember, we had changes */
1298 /* Return the number of changes made */
1304 unsigned OptTransfers2 (CodeSeg* S)
1305 /* Replace loads followed by a register transfer by a load with the second
1306 * register if possible.
1309 unsigned Changes = 0;
1311 /* Walk over the entries */
1313 while (I < CS_GetEntryCount (S)) {
1317 /* Get next entry */
1318 CodeEntry* E = CS_GetEntry (S, I);
1320 /* Check if we have a load followed by a transfer where the loaded
1321 * register is not used later.
1323 if ((E->Info & OF_LOAD) != 0 &&
1324 (N = CS_GetNextEntry (S, I)) != 0 &&
1326 (N->Info & OF_XFR) != 0 &&
1327 GetRegInfo (S, I+2, E->Chg) != E->Chg) {
1331 if (E->OPC == OP65_LDA && N->OPC == OP65_TAX) {
1332 /* LDA/TAX - check for the right addressing modes */
1333 if (E->AM == AM65_IMM ||
1335 E->AM == AM65_ABS ||
1336 E->AM == AM65_ABSY) {
1338 X = NewCodeEntry (OP65_LDX, E->AM, E->Arg, 0, N->LI);
1340 } else if (E->OPC == OP65_LDA && N->OPC == OP65_TAY) {
1341 /* LDA/TAY - check for the right addressing modes */
1342 if (E->AM == AM65_IMM ||
1344 E->AM == AM65_ZPX ||
1345 E->AM == AM65_ABS ||
1346 E->AM == AM65_ABSX) {
1348 X = NewCodeEntry (OP65_LDY, E->AM, E->Arg, 0, N->LI);
1350 } else if (E->OPC == OP65_LDY && N->OPC == OP65_TYA) {
1351 /* LDY/TYA. LDA supports all addressing modes LDY does */
1352 X = NewCodeEntry (OP65_LDA, E->AM, E->Arg, 0, N->LI);
1353 } else if (E->OPC == OP65_LDX && N->OPC == OP65_TXA) {
1354 /* LDX/TXA. LDA doesn't support zp,y, so we must map it to
1357 am_t AM = (E->AM == AM65_ZPY)? AM65_ABSY : E->AM;
1358 X = NewCodeEntry (OP65_LDA, AM, E->Arg, 0, N->LI);
1361 /* If we have a load entry, add it and remove the old stuff */
1363 CS_InsertEntry (S, X, I+2);
1364 CS_DelEntries (S, I, 2);
1366 --I; /* Correct for one entry less */
1374 /* Return the number of changes made */
1380 unsigned OptTransfers3 (CodeSeg* S)
1381 /* Replace a register transfer followed by a store of the second register by a
1382 * store of the first register if this is possible.
1385 unsigned Changes = 0;
1386 unsigned UsedRegs = REG_NONE; /* Track used registers */
1387 unsigned Xfer = 0; /* Index of transfer insn */
1388 unsigned Store = 0; /* Index of store insn */
1389 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1390 CodeEntry* StoreEntry = 0; /* Pointer to store insn */
1397 } State = Initialize;
1399 /* Walk over the entries. Look for a xfer instruction that is followed by
1400 * a store later, where the value of the register is not used later.
1403 while (I < CS_GetEntryCount (S)) {
1405 /* Get next entry */
1406 CodeEntry* E = CS_GetEntry (S, I);
1411 /* Clear the list of used registers */
1412 UsedRegs = REG_NONE;
1416 if (E->Info & OF_XFR) {
1417 /* Found start of sequence */
1425 /* If we find a conditional jump, abort the sequence, since
1426 * handling them makes things really complicated.
1428 if (E->Info & OF_CBRA) {
1430 /* Switch back to searching */
1434 /* Does this insn use the target register of the transfer? */
1435 } else if ((E->Use & XferEntry->Chg) != 0) {
1437 /* It it's a store instruction, and the block is a basic
1438 * block, proceed. Otherwise restart
1440 if ((E->Info & OF_STORE) != 0 &&
1441 CS_IsBasicBlock (S, Xfer, I)) {
1450 /* Does this insn change the target register of the transfer? */
1451 } else if (E->Chg & XferEntry->Chg) {
1453 /* We *may* add code here to remove the transfer, but I'm
1454 * currently not sure about the consequences, so I won't
1455 * do that and bail out instead.
1460 /* Does this insn have a label? */
1461 } else if (CE_HasLabel (E)) {
1463 /* Too complex to handle - bail out */
1468 /* Track used registers */
1474 /* We are at the instruction behind the store. If the register
1475 * isn't used later, and we have an address mode match, we can
1476 * replace the transfer by a store and remove the store here.
1478 if ((GetRegInfo (S, I, XferEntry->Chg) & XferEntry->Chg) == 0 &&
1479 (StoreEntry->AM == AM65_ABS ||
1480 StoreEntry->AM == AM65_ZP) &&
1481 (StoreEntry->AM != AM65_ZP ||
1482 (StoreEntry->Chg & UsedRegs) == 0) &&
1483 !MemAccess (S, Xfer+1, Store-1, StoreEntry->Arg)) {
1485 /* Generate the replacement store insn */
1487 switch (XferEntry->OPC) {
1490 X = NewCodeEntry (OP65_STX,
1498 X = NewCodeEntry (OP65_STA,
1506 X = NewCodeEntry (OP65_STY,
1514 X = NewCodeEntry (OP65_STA,
1525 /* If we have a replacement store, change the code */
1527 /* Insert after the xfer insn */
1528 CS_InsertEntry (S, X, Xfer+1);
1530 /* Remove the xfer instead */
1531 CS_DelEntry (S, Xfer);
1533 /* Remove the final store */
1534 CS_DelEntry (S, Store);
1536 /* Correct I so we continue with the next insn */
1539 /* Remember we had changes */
1542 /* Restart after last xfer insn */
1546 /* Restart after last xfer insn */
1558 /* Return the number of changes made */
1564 unsigned OptTransfers4 (CodeSeg* S)
1565 /* Replace a load of a register followed by a transfer insn of the same register
1566 * by a load of the second register if possible.
1569 unsigned Changes = 0;
1570 unsigned Load = 0; /* Index of load insn */
1571 unsigned Xfer = 0; /* Index of transfer insn */
1572 CodeEntry* LoadEntry = 0; /* Pointer to load insn */
1573 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1581 /* Walk over the entries. Look for a load instruction that is followed by
1585 while (I < CS_GetEntryCount (S)) {
1587 /* Get next entry */
1588 CodeEntry* E = CS_GetEntry (S, I);
1593 if (E->Info & OF_LOAD) {
1594 /* Found start of sequence */
1602 /* If we find a conditional jump, abort the sequence, since
1603 * handling them makes things really complicated.
1605 if (E->Info & OF_CBRA) {
1607 /* Switch back to searching */
1611 /* Does this insn use the target register of the load? */
1612 } else if ((E->Use & LoadEntry->Chg) != 0) {
1614 /* It it's a xfer instruction, and the block is a basic
1615 * block, proceed. Otherwise restart
1617 if ((E->Info & OF_XFR) != 0 &&
1618 CS_IsBasicBlock (S, Load, I)) {
1627 /* Does this insn change the target register of the load? */
1628 } else if (E->Chg & LoadEntry->Chg) {
1630 /* We *may* add code here to remove the load, but I'm
1631 * currently not sure about the consequences, so I won't
1632 * do that and bail out instead.
1640 /* We are at the instruction behind the xfer. If the register
1641 * isn't used later, and we have an address mode match, we can
1642 * replace the transfer by a load and remove the initial load.
1644 if ((GetRegInfo (S, I, LoadEntry->Chg) & LoadEntry->Chg) == 0 &&
1645 (LoadEntry->AM == AM65_ABS ||
1646 LoadEntry->AM == AM65_ZP ||
1647 LoadEntry->AM == AM65_IMM) &&
1648 !MemAccess (S, Load+1, Xfer-1, LoadEntry->Arg)) {
1650 /* Generate the replacement load insn */
1652 switch (XferEntry->OPC) {
1656 X = NewCodeEntry (OP65_LDA,
1664 X = NewCodeEntry (OP65_LDX,
1672 X = NewCodeEntry (OP65_LDY,
1683 /* If we have a replacement load, change the code */
1685 /* Insert after the xfer insn */
1686 CS_InsertEntry (S, X, Xfer+1);
1688 /* Remove the xfer instead */
1689 CS_DelEntry (S, Xfer);
1691 /* Remove the initial load */
1692 CS_DelEntry (S, Load);
1694 /* Correct I so we continue with the next insn */
1697 /* Remember we had changes */
1700 /* Restart after last xfer insn */
1704 /* Restart after last xfer insn */
1716 /* Return the number of changes made */
1722 unsigned OptPushPop (CodeSeg* S)
1723 /* Remove a PHA/PLA sequence were A is not used later */
1725 unsigned Changes = 0;
1726 unsigned Push = 0; /* Index of push insn */
1727 unsigned Pop = 0; /* Index of pop insn */
1728 unsigned ChgA = 0; /* Flag for A changed */
1733 } State = Searching;
1735 /* Walk over the entries. Look for a push instruction that is followed by
1736 * a pop later, where the pop is not followed by an conditional branch,
1737 * and where the value of the A register is not used later on.
1738 * Look out for the following problems:
1740 * - There may be another PHA/PLA inside the sequence: Restart it.
1741 * - If the PLA has a label, all jumps to this label must be inside
1742 * the sequence, otherwise we cannot remove the PHA/PLA.
1745 while (I < CS_GetEntryCount (S)) {
1749 /* Get next entry */
1750 CodeEntry* E = CS_GetEntry (S, I);
1755 if (E->OPC == OP65_PHA) {
1756 /* Found start of sequence */
1764 if (E->OPC == OP65_PHA) {
1765 /* Inner push/pop, restart */
1768 } else if (E->OPC == OP65_PLA) {
1769 /* Found a matching pop */
1771 /* Check that the block between Push and Pop is a basic
1772 * block (one entry, one exit). Otherwise ignore it.
1774 if (CS_IsBasicBlock (S, Push, Pop)) {
1777 /* Go into searching mode again */
1780 } else if (E->Chg & REG_A) {
1786 /* We're at the instruction after the PLA.
1787 * Check for the following conditions:
1788 * - If this instruction is a store of A, and A is not used
1789 * later, we may replace the PHA by the store and remove
1790 * pla if several other conditions are met.
1791 * - If this instruction is not a conditional branch, and A
1792 * is either unused later, or not changed by the code
1793 * between push and pop, we may remove PHA and PLA.
1795 if (E->OPC == OP65_STA &&
1796 !RegAUsed (S, I+1) &&
1797 !MemAccess (S, Push+1, Pop-1, E->Arg)) {
1799 /* Insert a STA after the PHA */
1800 X = NewCodeEntry (E->OPC, E->AM, E->Arg, E->JumpTo, E->LI);
1801 CS_InsertEntry (S, X, Push+1);
1803 /* Remove the PHA instead */
1804 CS_DelEntry (S, Push);
1806 /* Remove the PLA/STA sequence */
1807 CS_DelEntries (S, Pop, 2);
1809 /* Correct I so we continue with the next insn */
1812 /* Remember we had changes */
1815 } else if ((E->Info & OF_CBRA) == 0 &&
1816 (!RegAUsed (S, I) || !ChgA)) {
1818 /* We can remove the PHA and PLA instructions */
1819 CS_DelEntry (S, Pop);
1820 CS_DelEntry (S, Push);
1822 /* Correct I so we continue with the next insn */
1825 /* Remember we had changes */
1829 /* Go into search mode again */
1839 /* Return the number of changes made */
1845 unsigned OptPrecalc (CodeSeg* S)
1846 /* Replace immediate operations with the accu where the current contents are
1847 * known by a load of the final value.
1850 unsigned Changes = 0;
1853 /* Generate register info for this step */
1856 /* Walk over the entries */
1858 while (I < CS_GetEntryCount (S)) {
1860 /* Get next entry */
1861 CodeEntry* E = CS_GetEntry (S, I);
1863 /* Get pointers to the input and output registers of the insn */
1864 const RegContents* Out = &E->RI->Out;
1865 const RegContents* In = &E->RI->In;
1867 /* Argument for LDn and flag */
1868 const char* Arg = 0;
1869 opc_t OPC = OP65_LDA;
1871 /* Handle the different instructions */
1875 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegA)) {
1876 /* Result of load is known */
1877 Arg = MakeHexArg (Out->RegA);
1882 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegX)) {
1883 /* Result of load is known but register is X */
1884 Arg = MakeHexArg (Out->RegX);
1890 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegY)) {
1891 /* Result of load is known but register is Y */
1892 Arg = MakeHexArg (Out->RegY);
1898 if (RegValIsKnown (Out->RegA)) {
1899 /* Accu op zp with known contents */
1900 Arg = MakeHexArg (Out->RegA);
1906 /* If this is an operation with an immediate operand of zero,
1907 * and the register is zero, the operation won't give us any
1908 * results we don't already have (including the flags), so
1909 * remove it. Something like this is generated as a result of
1910 * a compare where parts of the values are known to be zero.
1912 if (In->RegA == 0 && CE_IsKnownImm (E, 0x00)) {
1913 /* 0-0 or 0+0 -> remove */
1920 if (CE_IsKnownImm (E, 0xFF)) {
1921 /* AND with 0xFF, remove */
1924 } else if (CE_IsKnownImm (E, 0x00)) {
1925 /* AND with 0x00, replace by lda #$00 */
1926 Arg = MakeHexArg (0x00);
1927 } else if (RegValIsKnown (Out->RegA)) {
1928 /* Accu AND zp with known contents */
1929 Arg = MakeHexArg (Out->RegA);
1930 } else if (In->RegA == 0xFF) {
1931 /* AND but A contains 0xFF - replace by lda */
1932 CE_ReplaceOPC (E, OP65_LDA);
1938 if (CE_IsKnownImm (E, 0x00)) {
1939 /* ORA with zero, remove */
1942 } else if (CE_IsKnownImm (E, 0xFF)) {
1943 /* ORA with 0xFF, replace by lda #$ff */
1944 Arg = MakeHexArg (0xFF);
1945 } else if (RegValIsKnown (Out->RegA)) {
1946 /* Accu AND zp with known contents */
1947 Arg = MakeHexArg (Out->RegA);
1948 } else if (In->RegA == 0) {
1949 /* ORA but A contains 0x00 - replace by lda */
1950 CE_ReplaceOPC (E, OP65_LDA);
1960 /* Check if we have to replace the insn by LDA */
1962 CodeEntry* X = NewCodeEntry (OPC, AM65_IMM, Arg, 0, E->LI);
1963 CS_InsertEntry (S, X, I+1);
1972 /* Free register info */
1975 /* Return the number of changes made */
1981 /*****************************************************************************/
1982 /* Optimize branch types */
1983 /*****************************************************************************/
1987 unsigned OptBranchDist (CodeSeg* S)
1988 /* Change branches for the distance needed. */
1990 unsigned Changes = 0;
1992 /* Walk over the entries */
1994 while (I < CS_GetEntryCount (S)) {
1996 /* Get next entry */
1997 CodeEntry* E = CS_GetEntry (S, I);
1999 /* Check if it's a conditional branch to a local label. */
2000 if (E->Info & OF_CBRA) {
2002 /* Is this a branch to a local symbol? */
2003 if (E->JumpTo != 0) {
2005 /* Check if the branch distance is short */
2006 int IsShort = IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner));
2008 /* Make the branch short/long according to distance */
2009 if ((E->Info & OF_LBRA) == 0 && !IsShort) {
2010 /* Short branch but long distance */
2011 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2013 } else if ((E->Info & OF_LBRA) != 0 && IsShort) {
2014 /* Long branch but short distance */
2015 CE_ReplaceOPC (E, MakeShortBranch (E->OPC));
2019 } else if ((E->Info & OF_LBRA) == 0) {
2021 /* Short branch to external symbol - make it long */
2022 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2027 } else if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 &&
2028 (E->Info & OF_UBRA) != 0 &&
2030 IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner))) {
2032 /* The jump is short and may be replaced by a BRA on the 65C02 CPU */
2033 CE_ReplaceOPC (E, OP65_BRA);
2042 /* Return the number of changes made */
2048 /*****************************************************************************/
2049 /* Optimize indirect loads */
2050 /*****************************************************************************/
2054 unsigned OptIndLoads1 (CodeSeg* S)
2063 * provided that x and y are both zero.
2066 unsigned Changes = 0;
2069 /* Generate register info for this step */
2072 /* Walk over the entries */
2074 while (I < CS_GetEntryCount (S)) {
2076 /* Get next entry */
2077 CodeEntry* E = CS_GetEntry (S, I);
2079 /* Check if it's what we're looking for */
2080 if (E->OPC == OP65_LDA &&
2081 E->AM == AM65_ZP_INDY &&
2082 E->RI->In.RegY == 0 &&
2083 E->RI->In.RegX == 0) {
2085 /* Replace by the same insn with other addressing mode */
2086 CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZPX_IND, E->Arg, 0, E->LI);
2087 CS_InsertEntry (S, X, I+1);
2089 /* Remove the old insn */
2099 /* Free register info */
2102 /* Return the number of changes made */
2108 unsigned OptIndLoads2 (CodeSeg* S)
2117 * provided that x and y are both zero.
2120 unsigned Changes = 0;
2123 /* Generate register info for this step */
2126 /* Walk over the entries */
2128 while (I < CS_GetEntryCount (S)) {
2130 /* Get next entry */
2131 CodeEntry* E = CS_GetEntry (S, I);
2133 /* Check if it's what we're looking for */
2134 if (E->OPC == OP65_LDA &&
2135 E->AM == AM65_ZPX_IND &&
2136 E->RI->In.RegY == 0 &&
2137 E->RI->In.RegX == 0) {
2139 /* Replace by the same insn with other addressing mode */
2140 CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZP_INDY, E->Arg, 0, E->LI);
2141 CS_InsertEntry (S, X, I+1);
2143 /* Remove the old insn */
2153 /* Free register info */
2156 /* Return the number of changes made */