1 /*****************************************************************************/
5 /* Environment independent low level optimizations */
9 /* (C) 2001-2009, Ullrich von Bassewitz */
10 /* Roemerstrasse 52 */
11 /* D-70794 Filderstadt */
12 /* EMail: uz@cc65.org */
15 /* This software is provided 'as-is', without any expressed or implied */
16 /* warranty. In no event will the authors be held liable for any damages */
17 /* arising from the use of this software. */
19 /* Permission is granted to anyone to use this software for any purpose, */
20 /* including commercial applications, and to alter it and redistribute it */
21 /* freely, subject to the following restrictions: */
23 /* 1. The origin of this software must not be misrepresented; you must not */
24 /* claim that you wrote the original software. If you use this software */
25 /* in a product, an acknowledgment in the product documentation would be */
26 /* appreciated but is not required. */
27 /* 2. Altered source versions must be plainly marked as such, and must not */
28 /* be misrepresented as being the original software. */
29 /* 3. This notice may not be removed or altered from any source */
32 /*****************************************************************************/
48 /*****************************************************************************/
49 /* Helper functions */
50 /*****************************************************************************/
54 static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const CodeEntry* N)
55 /* Checks a range of code entries if there are any memory accesses to N->Arg */
57 /* Get the length of the argument */
58 unsigned NLen = strlen (N->Arg);
60 /* What to check for? */
63 Base = 0x01, /* Check for location without "+1" */
64 Word = 0x02, /* Check for location with "+1" added */
68 /* If the argument of N is a zero page location that ends with "+1", we
69 * must also check for word accesses to the location without +1.
71 if (N->AM == AM65_ZP && NLen > 2 && strcmp (N->Arg + NLen - 2, "+1") == 0) {
75 /* If the argument is zero page indirect, we must also check for accesses
78 if (N->AM == AM65_ZP_INDY || N->AM == AM65_ZPX_IND || N->AM == AM65_ZP_IND) {
82 /* Walk over all code entries */
85 /* Get the next entry */
86 CodeEntry* E = CS_GetEntry (S, From);
88 /* Check if there is an argument and if this argument equals Arg in
91 if (E->Arg[0] != '\0') {
95 if (strcmp (E->Arg, N->Arg) == 0) {
100 ELen = strlen (E->Arg);
101 if ((What & Base) != 0) {
102 if (ELen == NLen - 2 && strncmp (E->Arg, N->Arg, NLen-2) == 0) {
103 /* Found an access */
108 if ((What & Word) != 0) {
109 if (ELen == NLen + 2 && strncmp (E->Arg, N->Arg, NLen) == 0 &&
110 E->Arg[NLen] == '+' && E->Arg[NLen+1] == '1') {
111 /* Found an access */
127 static int GetBranchDist (CodeSeg* S, unsigned From, CodeEntry* To)
128 /* Get the branch distance between the two entries and return it. The distance
129 * will be negative for backward jumps and positive for forward jumps.
132 /* Get the index of the branch target */
133 unsigned TI = CS_GetEntryIndex (S, To);
135 /* Determine the branch distance */
138 /* Forward branch, do not count the current insn */
141 CodeEntry* N = CS_GetEntry (S, J++);
145 /* Backward branch */
148 CodeEntry* N = CS_GetEntry (S, J++);
153 /* Return the calculated distance */
159 static int IsShortDist (int Distance)
160 /* Return true if the given distance is a short branch distance */
162 return (Distance >= -125 && Distance <= 125);
167 static short ZPRegVal (unsigned short Use, const RegContents* RC)
168 /* Return the contents of the given zeropage register */
170 if ((Use & REG_TMP1) != 0) {
172 } else if ((Use & REG_PTR1_LO) != 0) {
174 } else if ((Use & REG_PTR1_HI) != 0) {
176 } else if ((Use & REG_SREG_LO) != 0) {
178 } else if ((Use & REG_SREG_HI) != 0) {
181 return UNKNOWN_REGVAL;
187 static short RegVal (unsigned short Use, const RegContents* RC)
188 /* Return the contents of the given register */
190 if ((Use & REG_A) != 0) {
192 } else if ((Use & REG_X) != 0) {
194 } else if ((Use & REG_Y) != 0) {
197 return ZPRegVal (Use, RC);
203 /*****************************************************************************/
204 /* Replace jumps to RTS by RTS */
205 /*****************************************************************************/
209 unsigned OptRTSJumps1 (CodeSeg* S)
210 /* Replace jumps to RTS by RTS */
212 unsigned Changes = 0;
214 /* Walk over all entries minus the last one */
216 while (I < CS_GetEntryCount (S)) {
218 /* Get the next entry */
219 CodeEntry* E = CS_GetEntry (S, I);
221 /* Check if it's an unconditional branch to a local target */
222 if ((E->Info & OF_UBRA) != 0 &&
224 E->JumpTo->Owner->OPC == OP65_RTS) {
226 /* Insert an RTS instruction */
227 CodeEntry* X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->LI);
228 CS_InsertEntry (S, X, I+1);
230 /* Delete the jump */
233 /* Remember, we had changes */
243 /* Return the number of changes made */
249 unsigned OptRTSJumps2 (CodeSeg* S)
250 /* Replace long conditional jumps to RTS or to a final target */
252 unsigned Changes = 0;
254 /* Walk over all entries minus the last one */
256 while (I < CS_GetEntryCount (S) - 1) {
258 /* Get the next entry */
259 CodeEntry* E = CS_GetEntry (S, I);
261 /* Check if it's an conditional branch to a local target */
262 if ((E->Info & OF_CBRA) != 0 && /* Conditional branch */
263 (E->Info & OF_LBRA) != 0 && /* Long branch */
264 E->JumpTo != 0) { /* Local label */
267 /* Get the jump target and the next entry. There's always a next
268 * entry, because we don't cover the last entry in the loop.
271 CodeEntry* T = E->JumpTo->Owner;
272 CodeEntry* N = CS_GetNextEntry (S, I);
274 /* Check if it's a jump to an RTS insn */
275 if (T->OPC == OP65_RTS) {
277 /* It's a jump to RTS. Create a conditional branch around an
280 X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, T->LI);
282 } else if (T->OPC == OP65_JMP && T->JumpTo == 0) {
284 /* It's a jump to a label outside the function. Create a
285 * conditional branch around a jump to the external label.
287 X = NewCodeEntry (OP65_JMP, AM65_ABS, T->Arg, T->JumpTo, T->LI);
291 /* If we have a replacement insn, insert it */
297 /* Insert the new insn */
298 CS_InsertEntry (S, X, I+1);
300 /* Create a conditional branch with the inverse condition
301 * around the replacement insn
304 /* Get the new branch opcode */
305 NewBranch = MakeShortBranch (GetInverseBranch (E->OPC));
307 /* Get the label attached to N, create a new one if needed */
308 LN = CS_GenLabel (S, N);
310 /* Generate the branch */
311 X = NewCodeEntry (NewBranch, AM65_BRA, LN->Name, LN, E->LI);
312 CS_InsertEntry (S, X, I+1);
314 /* Delete the long branch */
317 /* Remember, we had changes */
328 /* Return the number of changes made */
334 /*****************************************************************************/
335 /* Remove dead jumps */
336 /*****************************************************************************/
340 unsigned OptDeadJumps (CodeSeg* S)
341 /* Remove dead jumps (jumps to the next instruction) */
343 unsigned Changes = 0;
345 /* Walk over all entries minus the last one */
347 while (I < CS_GetEntryCount (S)) {
349 /* Get the next entry */
350 CodeEntry* E = CS_GetEntry (S, I);
352 /* Check if it's a branch, if it has a local target, and if the target
353 * is the next instruction.
355 if (E->AM == AM65_BRA &&
357 E->JumpTo->Owner == CS_GetNextEntry (S, I)) {
359 /* Delete the dead jump */
362 /* Remember, we had changes */
373 /* Return the number of changes made */
379 /*****************************************************************************/
380 /* Remove dead code */
381 /*****************************************************************************/
385 unsigned OptDeadCode (CodeSeg* S)
386 /* Remove dead code (code that follows an unconditional jump or an rts/rti
390 unsigned Changes = 0;
392 /* Walk over all entries */
394 while (I < CS_GetEntryCount (S)) {
400 CodeEntry* E = CS_GetEntry (S, I);
402 /* Check if it's an unconditional branch, and if the next entry has
403 * no labels attached, or if the label is just used so that the insn
404 * can jump to itself.
406 if ((E->Info & OF_DEAD) != 0 && /* Dead code follows */
407 (N = CS_GetNextEntry (S, I)) != 0 && /* Has next entry */
408 (!CE_HasLabel (N) || /* Don't has a label */
409 ((N->Info & OF_UBRA) != 0 && /* Uncond branch */
410 (LN = N->JumpTo) != 0 && /* Jumps to known label */
411 LN->Owner == N && /* Attached to insn */
412 CL_GetRefCount (LN) == 1))) { /* Only reference */
414 /* Delete the next entry */
415 CS_DelEntry (S, I+1);
417 /* Remember, we had changes */
428 /* Return the number of changes made */
434 /*****************************************************************************/
435 /* Optimize jump cascades */
436 /*****************************************************************************/
440 unsigned OptJumpCascades (CodeSeg* S)
441 /* Optimize jump cascades (jumps to jumps). In such a case, the jump is
442 * replaced by a jump to the final location. This will in some cases produce
443 * worse code, because some jump targets are no longer reachable by short
444 * branches, but this is quite rare, so there are more advantages than
448 unsigned Changes = 0;
450 /* Walk over all entries */
452 while (I < CS_GetEntryCount (S)) {
458 CodeEntry* E = CS_GetEntry (S, I);
461 * - if it's a branch,
462 * - if it has a jump label,
463 * - if this jump label is not attached to the instruction itself,
464 * - if the target instruction is itself a branch,
465 * - if either the first branch is unconditional or the target of
466 * the second branch is internal to the function.
467 * The latter condition will avoid conditional branches to targets
468 * outside of the function (usually incspx), which won't simplify the
469 * code, since conditional far branches are emulated by a short branch
472 if ((E->Info & OF_BRA) != 0 &&
473 (OldLabel = E->JumpTo) != 0 &&
474 (N = OldLabel->Owner) != E &&
475 (N->Info & OF_BRA) != 0 &&
476 ((E->Info & OF_CBRA) == 0 ||
479 /* Check if we can use the final target label. This is the case,
480 * if the target branch is an absolut branch, or if it is a
481 * conditional branch checking the same condition as the first one.
483 if ((N->Info & OF_UBRA) != 0 ||
484 ((E->Info & OF_CBRA) != 0 &&
485 GetBranchCond (E->OPC) == GetBranchCond (N->OPC))) {
487 /* This is a jump cascade and we may jump to the final target,
488 * provided that the other insn does not jump to itself. If
489 * this is the case, we can also jump to ourselves, otherwise
490 * insert a jump to the new instruction and remove the old one.
493 CodeLabel* LN = N->JumpTo;
495 if (LN != 0 && LN->Owner == N) {
497 /* We found a jump to a jump to itself. Replace our jump
498 * by a jump to itself.
500 CodeLabel* LE = CS_GenLabel (S, E);
501 X = NewCodeEntry (E->OPC, E->AM, LE->Name, LE, E->LI);
505 /* Jump to the final jump target */
506 X = NewCodeEntry (E->OPC, E->AM, N->Arg, N->JumpTo, E->LI);
510 /* Insert it behind E */
511 CS_InsertEntry (S, X, I+1);
516 /* Remember, we had changes */
519 /* Check if both are conditional branches, and the condition of
520 * the second is the inverse of that of the first. In this case,
521 * the second branch will never be taken, and we may jump directly
522 * to the instruction behind this one.
524 } else if ((E->Info & OF_CBRA) != 0 && (N->Info & OF_CBRA) != 0) {
526 CodeEntry* X; /* Instruction behind N */
527 CodeLabel* LX; /* Label attached to X */
529 /* Get the branch conditions of both branches */
530 bc_t BC1 = GetBranchCond (E->OPC);
531 bc_t BC2 = GetBranchCond (N->OPC);
533 /* Check the branch conditions */
534 if (BC1 != GetInverseCond (BC2)) {
535 /* Condition not met */
539 /* We may jump behind this conditional branch. Get the
540 * pointer to the next instruction
542 if ((X = CS_GetNextEntry (S, CS_GetEntryIndex (S, N))) == 0) {
543 /* N is the last entry, bail out */
547 /* Get the label attached to X, create a new one if needed */
548 LX = CS_GenLabel (S, X);
550 /* Move the reference from E to the new label */
551 CS_MoveLabelRef (S, E, LX);
553 /* Remember, we had changes */
564 /* Return the number of changes made */
570 /*****************************************************************************/
571 /* Optimize jsr/rts */
572 /*****************************************************************************/
576 unsigned OptRTS (CodeSeg* S)
577 /* Optimize subroutine calls followed by an RTS. The subroutine call will get
578 * replaced by a jump. Don't bother to delete the RTS if it does not have a
579 * label, the dead code elimination should take care of it.
582 unsigned Changes = 0;
584 /* Walk over all entries minus the last one */
586 while (I < CS_GetEntryCount (S)) {
591 CodeEntry* E = CS_GetEntry (S, I);
593 /* Check if it's a subroutine call and if the following insn is RTS */
594 if (E->OPC == OP65_JSR &&
595 (N = CS_GetNextEntry (S, I)) != 0 &&
596 N->OPC == OP65_RTS) {
598 /* Change the jsr to a jmp and use the additional info for a jump */
600 CE_ReplaceOPC (E, OP65_JMP);
602 /* Remember, we had changes */
612 /* Return the number of changes made */
618 /*****************************************************************************/
619 /* Optimize jump targets */
620 /*****************************************************************************/
624 unsigned OptJumpTarget1 (CodeSeg* S)
625 /* If the instruction preceeding an unconditional branch is the same as the
626 * instruction preceeding the jump target, the jump target may be moved
627 * one entry back. This is a size optimization, since the instruction before
628 * the branch gets removed.
631 unsigned Changes = 0;
632 CodeEntry* E1; /* Entry 1 */
633 CodeEntry* E2; /* Entry 2 */
634 CodeEntry* T1; /* Jump target entry 1 */
635 CodeLabel* TL1; /* Target label 1 */
637 /* Walk over the entries */
639 while (I < CS_GetEntryCount (S)) {
642 E2 = CS_GetNextEntry (S, I);
644 /* Check if we have a jump or branch without a label attached, and
645 * a jump target, which is not attached to the jump itself
648 (E2->Info & OF_UBRA) != 0 &&
651 E2->JumpTo->Owner != E2) {
653 /* Get the entry preceeding the branch target */
654 T1 = CS_GetPrevEntry (S, CS_GetEntryIndex (S, E2->JumpTo->Owner));
656 /* There is no such entry */
660 /* The entry preceeding the branch target may not be the branch
667 /* Get the entry preceeding the jump */
668 E1 = CS_GetEntry (S, I);
670 /* Check if both preceeding instructions are identical */
671 if (!CodeEntriesAreEqual (E1, T1)) {
672 /* Not equal, try next */
676 /* Get the label for the instruction preceeding the jump target.
677 * This routine will create a new label if the instruction does
678 * not already have one.
680 TL1 = CS_GenLabel (S, T1);
682 /* Change the jump target to point to this new label */
683 CS_MoveLabelRef (S, E2, TL1);
685 /* If the instruction preceeding the jump has labels attached,
686 * move references to this label to the new label.
688 if (CE_HasLabel (E1)) {
689 CS_MoveLabels (S, E1, T1);
692 /* Remove the entry preceeding the jump */
695 /* Remember, we had changes */
705 /* Return the number of changes made */
711 unsigned OptJumpTarget2 (CodeSeg* S)
712 /* If a bcs jumps to a sec insn or a bcc jumps to clc, skip this insn, since
713 * it's job is already done.
716 unsigned Changes = 0;
718 /* Walk over the entries */
720 while (I < CS_GetEntryCount (S)) {
722 /* OP that may be skipped */
725 /* Jump target insn, old and new */
733 CodeEntry* E = CS_GetEntry (S, I);
735 /* Check if this is a bcc insn */
736 if (E->OPC == OP65_BCC || E->OPC == OP65_JCC) {
738 } else if (E->OPC == OP65_BCS || E->OPC == OP65_JCS) {
741 /* Not what we're looking for */
745 /* Must have a jump target */
746 if (E->JumpTo == 0) {
750 /* Get the owner insn of the jump target and check if it's the one, we
751 * will skip if present.
753 T = E->JumpTo->Owner;
758 /* Get the entry following the branch target */
759 N = CS_GetNextEntry (S, CS_GetEntryIndex (S, T));
761 /* There is no such entry */
765 /* Get the label for the instruction following the jump target.
766 * This routine will create a new label if the instruction does
767 * not already have one.
769 L = CS_GenLabel (S, N);
771 /* Change the jump target to point to this new label */
772 CS_MoveLabelRef (S, E, L);
774 /* Remember that we had changes */
782 /* Return the number of changes made */
788 unsigned OptJumpTarget3 (CodeSeg* S)
789 /* Jumps to load instructions of a register, that do already have the matching
790 * register contents may skip the load instruction, since it's job is already
794 unsigned Changes = 0;
797 /* Generate register info for this step */
800 /* Walk over the entries */
802 while (I < CS_GetEntryCount (S)) {
807 CodeEntry* E = CS_GetEntry (S, I);
809 /* Check if this is a load insn with a label and the next insn is not
810 * a conditional branch that needs the flags from the load.
812 if ((E->Info & OF_LOAD) != 0 &&
815 (N = CS_GetNextEntry (S, I)) != 0 &&
816 !CE_UseLoadFlags (N)) {
824 /* Walk over all insn that jump here */
825 for (J = 0; J < CE_GetLabelCount (E); ++J) {
828 CodeLabel* L = CE_GetLabel (E, J);
830 /* Loop over all insn that reference this label. Since we may
831 * eventually remove a reference in the loop, we must loop
832 * from end down to start.
834 for (K = CL_GetRefCount (L) - 1; K >= 0; --K) {
836 /* Get the entry that jumps here */
837 CodeEntry* Jump = CL_GetRef (L, K);
839 /* Get the register info from this insn */
840 short Val = RegVal (E->Chg, &Jump->RI->Out2);
842 /* Check if the outgoing value is the one thats's loaded */
843 if (Val == (unsigned char) E->Num) {
845 /* Ok, skip the insn. First, generate a label for the
849 LN = CS_GenLabel (S, N);
852 /* Change the jump target to point to this new label */
853 CS_MoveLabelRef (S, Jump, LN);
855 /* Remember that we had changes */
867 /* Free register info */
870 /* Return the number of changes made */
876 /*****************************************************************************/
877 /* Optimize conditional branches */
878 /*****************************************************************************/
882 unsigned OptCondBranches1 (CodeSeg* S)
883 /* Performs several optimization steps:
885 * - If an immidiate load of a register is followed by a conditional jump that
886 * is never taken because the load of the register sets the flags in such a
887 * manner, remove the conditional branch.
888 * - If the conditional branch is always taken because of the register load,
889 * replace it by a jmp.
890 * - If a conditional branch jumps around an unconditional branch, remove the
891 * conditional branch and make the jump a conditional branch with the
892 * inverse condition of the first one.
895 unsigned Changes = 0;
897 /* Walk over the entries */
899 while (I < CS_GetEntryCount (S)) {
905 CodeEntry* E = CS_GetEntry (S, I);
907 /* Check if it's a register load */
908 if ((E->Info & OF_LOAD) != 0 && /* It's a load instruction */
909 E->AM == AM65_IMM && /* ..with immidiate addressing */
910 (E->Flags & CEF_NUMARG) != 0 && /* ..and a numeric argument. */
911 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
912 (N->Info & OF_CBRA) != 0 && /* ..which is a conditional branch */
913 !CE_HasLabel (N)) { /* ..and does not have a label */
915 /* Get the branch condition */
916 bc_t BC = GetBranchCond (N->OPC);
918 /* Check the argument against the branch condition */
919 if ((BC == BC_EQ && E->Num != 0) ||
920 (BC == BC_NE && E->Num == 0) ||
921 (BC == BC_PL && (E->Num & 0x80) != 0) ||
922 (BC == BC_MI && (E->Num & 0x80) == 0)) {
924 /* Remove the conditional branch */
925 CS_DelEntry (S, I+1);
927 /* Remember, we had changes */
930 } else if ((BC == BC_EQ && E->Num == 0) ||
931 (BC == BC_NE && E->Num != 0) ||
932 (BC == BC_PL && (E->Num & 0x80) == 0) ||
933 (BC == BC_MI && (E->Num & 0x80) != 0)) {
935 /* The branch is always taken, replace it by a jump */
936 CE_ReplaceOPC (N, OP65_JMP);
938 /* Remember, we had changes */
944 if ((E->Info & OF_CBRA) != 0 && /* It's a conditional branch */
945 (L = E->JumpTo) != 0 && /* ..referencing a local label */
946 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
947 (N->Info & OF_UBRA) != 0 && /* ..which is an uncond branch, */
948 !CE_HasLabel (N) && /* ..has no label attached */
949 L->Owner == CS_GetNextEntry (S, I+1)) {/* ..and jump target follows */
951 /* Replace the jump by a conditional branch with the inverse branch
952 * condition than the branch around it.
954 CE_ReplaceOPC (N, GetInverseBranch (E->OPC));
956 /* Remove the conditional branch */
959 /* Remember, we had changes */
969 /* Return the number of changes made */
975 unsigned OptCondBranches2 (CodeSeg* S)
976 /* If on entry to a "rol a" instruction the accu is zero, and a beq/bne follows,
977 * we can remove the rol and branch on the state of the carry flag.
980 unsigned Changes = 0;
983 /* Generate register info for this step */
986 /* Walk over the entries */
988 while (I < CS_GetEntryCount (S)) {
993 CodeEntry* E = CS_GetEntry (S, I);
995 /* Check if it's a rol insn with A in accu and a branch follows */
996 if (E->OPC == OP65_ROL &&
998 E->RI->In.RegA == 0 &&
1000 (N = CS_GetNextEntry (S, I)) != 0 &&
1001 (N->Info & OF_ZBRA) != 0 &&
1002 !RegAUsed (S, I+1)) {
1004 /* Replace the branch condition */
1005 switch (GetBranchCond (N->OPC)) {
1006 case BC_EQ: CE_ReplaceOPC (N, OP65_JCC); break;
1007 case BC_NE: CE_ReplaceOPC (N, OP65_JCS); break;
1008 default: Internal ("Unknown branch condition in OptCondBranches2");
1011 /* Delete the rol insn */
1014 /* Remember, we had changes */
1022 /* Free register info */
1025 /* Return the number of changes made */
1031 /*****************************************************************************/
1032 /* Remove unused loads and stores */
1033 /*****************************************************************************/
1037 unsigned OptUnusedLoads (CodeSeg* S)
1038 /* Remove loads of registers where the value loaded is not used later. */
1040 unsigned Changes = 0;
1042 /* Walk over the entries */
1044 while (I < CS_GetEntryCount (S)) {
1048 /* Get next entry */
1049 CodeEntry* E = CS_GetEntry (S, I);
1051 /* Check if it's a register load or transfer insn */
1052 if ((E->Info & (OF_LOAD | OF_XFR | OF_REG_INCDEC)) != 0 &&
1053 (N = CS_GetNextEntry (S, I)) != 0 &&
1054 !CE_UseLoadFlags (N)) {
1056 /* Check which sort of load or transfer it is */
1063 case OP65_TYA: R = REG_A; break;
1067 case OP65_TAX: R = REG_X; break;
1071 case OP65_TAY: R = REG_Y; break;
1072 default: goto NextEntry; /* OOPS */
1075 /* Get register usage and check if the register value is used later */
1076 if ((GetRegInfo (S, I+1, R) & R) == 0) {
1078 /* Register value is not used, remove the load */
1081 /* Remember, we had changes. Account the deleted entry in I. */
1094 /* Return the number of changes made */
1100 unsigned OptUnusedStores (CodeSeg* S)
1101 /* Remove stores into zero page registers that aren't used later */
1103 unsigned Changes = 0;
1105 /* Walk over the entries */
1107 while (I < CS_GetEntryCount (S)) {
1109 /* Get next entry */
1110 CodeEntry* E = CS_GetEntry (S, I);
1112 /* Check if it's a register load or transfer insn */
1113 if ((E->Info & OF_STORE) != 0 &&
1115 (E->Chg & REG_ZP) != 0) {
1117 /* Check for the zero page location. We know that there cannot be
1118 * more than one zero page location involved in the store.
1120 unsigned R = E->Chg & REG_ZP;
1122 /* Get register usage and check if the register value is used later */
1123 if ((GetRegInfo (S, I+1, R) & R) == 0) {
1125 /* Register value is not used, remove the load */
1128 /* Remember, we had changes */
1131 /* Continue with next insn */
1141 /* Return the number of changes made */
1147 unsigned OptDupLoads (CodeSeg* S)
1148 /* Remove loads of registers where the value loaded is already in the register. */
1150 unsigned Changes = 0;
1153 /* Generate register info for this step */
1156 /* Walk over the entries */
1158 while (I < CS_GetEntryCount (S)) {
1162 /* Get next entry */
1163 CodeEntry* E = CS_GetEntry (S, I);
1165 /* Assume we won't delete the entry */
1168 /* Get a pointer to the input registers of the insn */
1169 const RegContents* In = &E->RI->In;
1171 /* Handle the different instructions */
1175 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1176 CE_IsKnownImm (E, In->RegA) && /* Value to be loaded is known */
1177 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1178 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1184 if (RegValIsKnown (In->RegX) && /* Value of X is known */
1185 CE_IsKnownImm (E, In->RegX) && /* Value to be loaded is known */
1186 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1187 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1193 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1194 CE_IsKnownImm (E, In->RegY) && /* Value to be loaded is known */
1195 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1196 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1202 /* If we store into a known zero page location, and this
1203 * location does already contain the value to be stored,
1206 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1207 E->AM == AM65_ZP && /* Store into zp */
1208 In->RegA == ZPRegVal (E->Chg, In)) { /* Value identical */
1215 /* If we store into a known zero page location, and this
1216 * location does already contain the value to be stored,
1219 if (RegValIsKnown (In->RegX) && /* Value of A is known */
1220 E->AM == AM65_ZP && /* Store into zp */
1221 In->RegX == ZPRegVal (E->Chg, In)) { /* Value identical */
1225 /* If the value in the X register is known and the same as
1226 * that in the A register, replace the store by a STA. The
1227 * optimizer will then remove the load instruction for X
1228 * later. STX does support the zeropage,y addressing mode,
1229 * so be sure to check for that.
1231 } else if (RegValIsKnown (In->RegX) &&
1232 In->RegX == In->RegA &&
1233 E->AM != AM65_ABSY &&
1234 E->AM != AM65_ZPY) {
1235 /* Use the A register instead */
1236 CE_ReplaceOPC (E, OP65_STA);
1241 /* If we store into a known zero page location, and this
1242 * location does already contain the value to be stored,
1245 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1246 E->AM == AM65_ZP && /* Store into zp */
1247 In->RegY == ZPRegVal (E->Chg, In)) { /* Value identical */
1251 /* If the value in the Y register is known and the same as
1252 * that in the A register, replace the store by a STA. The
1253 * optimizer will then remove the load instruction for Y
1254 * later. If replacement by A is not possible try a
1255 * replacement by X, but check for invalid addressing modes
1258 } else if (RegValIsKnown (In->RegY)) {
1259 if (In->RegY == In->RegA) {
1260 CE_ReplaceOPC (E, OP65_STA);
1261 } else if (In->RegY == In->RegX &&
1262 E->AM != AM65_ABSX &&
1263 E->AM != AM65_ZPX) {
1264 CE_ReplaceOPC (E, OP65_STX);
1270 /* If we store into a known zero page location, and this
1271 * location does already contain the value to be stored,
1274 if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && E->AM == AM65_ZP) {
1275 if (ZPRegVal (E->Chg, In) == 0) {
1282 if (RegValIsKnown (In->RegA) &&
1283 In->RegA == In->RegX &&
1284 (N = CS_GetNextEntry (S, I)) != 0 &&
1285 !CE_UseLoadFlags (N)) {
1286 /* Value is identical and not followed by a branch */
1292 if (RegValIsKnown (In->RegA) &&
1293 In->RegA == In->RegY &&
1294 (N = CS_GetNextEntry (S, I)) != 0 &&
1295 !CE_UseLoadFlags (N)) {
1296 /* Value is identical and not followed by a branch */
1302 if (RegValIsKnown (In->RegX) &&
1303 In->RegX == In->RegA &&
1304 (N = CS_GetNextEntry (S, I)) != 0 &&
1305 !CE_UseLoadFlags (N)) {
1306 /* Value is identical and not followed by a branch */
1312 if (RegValIsKnown (In->RegY) &&
1313 In->RegY == In->RegA &&
1314 (N = CS_GetNextEntry (S, I)) != 0 &&
1315 !CE_UseLoadFlags (N)) {
1316 /* Value is identical and not followed by a branch */
1326 /* Delete the entry if requested */
1329 /* Register value is not used, remove the load */
1332 /* Remember, we had changes */
1344 /* Free register info */
1347 /* Return the number of changes made */
1353 unsigned OptStoreLoad (CodeSeg* S)
1354 /* Remove a store followed by a load from the same location. */
1356 unsigned Changes = 0;
1358 /* Walk over the entries */
1360 while (I < CS_GetEntryCount (S)) {
1365 /* Get next entry */
1366 CodeEntry* E = CS_GetEntry (S, I);
1368 /* Check if it is a store instruction followed by a load from the
1369 * same address which is itself not followed by a conditional branch.
1371 if ((E->Info & OF_STORE) != 0 &&
1372 (N = CS_GetNextEntry (S, I)) != 0 &&
1375 ((E->OPC == OP65_STA && N->OPC == OP65_LDA) ||
1376 (E->OPC == OP65_STX && N->OPC == OP65_LDX) ||
1377 (E->OPC == OP65_STY && N->OPC == OP65_LDY)) &&
1378 strcmp (E->Arg, N->Arg) == 0 &&
1379 (X = CS_GetNextEntry (S, I+1)) != 0 &&
1380 !CE_UseLoadFlags (X)) {
1382 /* Register has already the correct value, remove the load */
1383 CS_DelEntry (S, I+1);
1385 /* Remember, we had changes */
1395 /* Return the number of changes made */
1401 unsigned OptTransfers1 (CodeSeg* S)
1402 /* Remove transfers from one register to another and back */
1404 unsigned Changes = 0;
1406 /* Walk over the entries */
1408 while (I < CS_GetEntryCount (S)) {
1414 /* Get next entry */
1415 CodeEntry* E = CS_GetEntry (S, I);
1417 /* Check if we have two transfer instructions */
1418 if ((E->Info & OF_XFR) != 0 &&
1419 (N = CS_GetNextEntry (S, I)) != 0 &&
1421 (N->Info & OF_XFR) != 0) {
1423 /* Check if it's a transfer and back */
1424 if ((E->OPC == OP65_TAX && N->OPC == OP65_TXA && !RegXUsed (S, I+2)) ||
1425 (E->OPC == OP65_TAY && N->OPC == OP65_TYA && !RegYUsed (S, I+2)) ||
1426 (E->OPC == OP65_TXA && N->OPC == OP65_TAX && !RegAUsed (S, I+2)) ||
1427 (E->OPC == OP65_TYA && N->OPC == OP65_TAY && !RegAUsed (S, I+2))) {
1429 /* If the next insn is a conditional branch, check if the insn
1430 * preceeding the first xfr will set the flags right, otherwise we
1431 * may not remove the sequence.
1433 if ((X = CS_GetNextEntry (S, I+1)) == 0) {
1436 if (CE_UseLoadFlags (X)) {
1438 /* No preceeding entry */
1441 P = CS_GetEntry (S, I-1);
1442 if ((P->Info & OF_SETF) == 0) {
1443 /* Does not set the flags */
1448 /* Remove both transfers */
1449 CS_DelEntry (S, I+1);
1452 /* Remember, we had changes */
1463 /* Return the number of changes made */
1469 unsigned OptTransfers2 (CodeSeg* S)
1470 /* Replace loads followed by a register transfer by a load with the second
1471 * register if possible.
1474 unsigned Changes = 0;
1476 /* Walk over the entries */
1478 while (I < CS_GetEntryCount (S)) {
1482 /* Get next entry */
1483 CodeEntry* E = CS_GetEntry (S, I);
1485 /* Check if we have a load followed by a transfer where the loaded
1486 * register is not used later.
1488 if ((E->Info & OF_LOAD) != 0 &&
1489 (N = CS_GetNextEntry (S, I)) != 0 &&
1491 (N->Info & OF_XFR) != 0 &&
1492 GetRegInfo (S, I+2, E->Chg) != E->Chg) {
1496 if (E->OPC == OP65_LDA && N->OPC == OP65_TAX) {
1497 /* LDA/TAX - check for the right addressing modes */
1498 if (E->AM == AM65_IMM ||
1500 E->AM == AM65_ABS ||
1501 E->AM == AM65_ABSY) {
1503 X = NewCodeEntry (OP65_LDX, E->AM, E->Arg, 0, N->LI);
1505 } else if (E->OPC == OP65_LDA && N->OPC == OP65_TAY) {
1506 /* LDA/TAY - check for the right addressing modes */
1507 if (E->AM == AM65_IMM ||
1509 E->AM == AM65_ZPX ||
1510 E->AM == AM65_ABS ||
1511 E->AM == AM65_ABSX) {
1513 X = NewCodeEntry (OP65_LDY, E->AM, E->Arg, 0, N->LI);
1515 } else if (E->OPC == OP65_LDY && N->OPC == OP65_TYA) {
1516 /* LDY/TYA. LDA supports all addressing modes LDY does */
1517 X = NewCodeEntry (OP65_LDA, E->AM, E->Arg, 0, N->LI);
1518 } else if (E->OPC == OP65_LDX && N->OPC == OP65_TXA) {
1519 /* LDX/TXA. LDA doesn't support zp,y, so we must map it to
1522 am_t AM = (E->AM == AM65_ZPY)? AM65_ABSY : E->AM;
1523 X = NewCodeEntry (OP65_LDA, AM, E->Arg, 0, N->LI);
1526 /* If we have a load entry, add it and remove the old stuff */
1528 CS_InsertEntry (S, X, I+2);
1529 CS_DelEntries (S, I, 2);
1531 --I; /* Correct for one entry less */
1539 /* Return the number of changes made */
1545 unsigned OptTransfers3 (CodeSeg* S)
1546 /* Replace a register transfer followed by a store of the second register by a
1547 * store of the first register if this is possible.
1550 unsigned Changes = 0;
1551 unsigned UsedRegs = REG_NONE; /* Track used registers */
1552 unsigned Xfer = 0; /* Index of transfer insn */
1553 unsigned Store = 0; /* Index of store insn */
1554 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1555 CodeEntry* StoreEntry = 0; /* Pointer to store insn */
1562 } State = Initialize;
1564 /* Walk over the entries. Look for a xfer instruction that is followed by
1565 * a store later, where the value of the register is not used later.
1568 while (I < CS_GetEntryCount (S)) {
1570 /* Get next entry */
1571 CodeEntry* E = CS_GetEntry (S, I);
1576 /* Clear the list of used registers */
1577 UsedRegs = REG_NONE;
1581 if (E->Info & OF_XFR) {
1582 /* Found start of sequence */
1590 /* If we find a conditional jump, abort the sequence, since
1591 * handling them makes things really complicated.
1593 if (E->Info & OF_CBRA) {
1595 /* Switch back to searching */
1599 /* Does this insn use the target register of the transfer? */
1600 } else if ((E->Use & XferEntry->Chg) != 0) {
1602 /* It it's a store instruction, and the block is a basic
1603 * block, proceed. Otherwise restart
1605 if ((E->Info & OF_STORE) != 0 &&
1606 CS_IsBasicBlock (S, Xfer, I)) {
1615 /* Does this insn change the target register of the transfer? */
1616 } else if (E->Chg & XferEntry->Chg) {
1618 /* We *may* add code here to remove the transfer, but I'm
1619 * currently not sure about the consequences, so I won't
1620 * do that and bail out instead.
1625 /* Does this insn have a label? */
1626 } else if (CE_HasLabel (E)) {
1628 /* Too complex to handle - bail out */
1633 /* Track used registers */
1639 /* We are at the instruction behind the store. If the register
1640 * isn't used later, and we have an address mode match, we can
1641 * replace the transfer by a store and remove the store here.
1643 if ((GetRegInfo (S, I, XferEntry->Chg) & XferEntry->Chg) == 0 &&
1644 (StoreEntry->AM == AM65_ABS ||
1645 StoreEntry->AM == AM65_ZP) &&
1646 (StoreEntry->AM != AM65_ZP ||
1647 (StoreEntry->Chg & UsedRegs) == 0) &&
1648 !MemAccess (S, Xfer+1, Store-1, StoreEntry)) {
1650 /* Generate the replacement store insn */
1652 switch (XferEntry->OPC) {
1655 X = NewCodeEntry (OP65_STX,
1663 X = NewCodeEntry (OP65_STA,
1671 X = NewCodeEntry (OP65_STY,
1679 X = NewCodeEntry (OP65_STA,
1690 /* If we have a replacement store, change the code */
1692 /* Insert after the xfer insn */
1693 CS_InsertEntry (S, X, Xfer+1);
1695 /* Remove the xfer instead */
1696 CS_DelEntry (S, Xfer);
1698 /* Remove the final store */
1699 CS_DelEntry (S, Store);
1701 /* Correct I so we continue with the next insn */
1704 /* Remember we had changes */
1707 /* Restart after last xfer insn */
1711 /* Restart after last xfer insn */
1723 /* Return the number of changes made */
1729 unsigned OptTransfers4 (CodeSeg* S)
1730 /* Replace a load of a register followed by a transfer insn of the same register
1731 * by a load of the second register if possible.
1734 unsigned Changes = 0;
1735 unsigned Load = 0; /* Index of load insn */
1736 unsigned Xfer = 0; /* Index of transfer insn */
1737 CodeEntry* LoadEntry = 0; /* Pointer to load insn */
1738 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1746 /* Walk over the entries. Look for a load instruction that is followed by
1750 while (I < CS_GetEntryCount (S)) {
1752 /* Get next entry */
1753 CodeEntry* E = CS_GetEntry (S, I);
1758 if (E->Info & OF_LOAD) {
1759 /* Found start of sequence */
1767 /* If we find a conditional jump, abort the sequence, since
1768 * handling them makes things really complicated.
1770 if (E->Info & OF_CBRA) {
1772 /* Switch back to searching */
1776 /* Does this insn use the target register of the load? */
1777 } else if ((E->Use & LoadEntry->Chg) != 0) {
1779 /* It it's a xfer instruction, and the block is a basic
1780 * block, proceed. Otherwise restart
1782 if ((E->Info & OF_XFR) != 0 &&
1783 CS_IsBasicBlock (S, Load, I)) {
1792 /* Does this insn change the target register of the load? */
1793 } else if (E->Chg & LoadEntry->Chg) {
1795 /* We *may* add code here to remove the load, but I'm
1796 * currently not sure about the consequences, so I won't
1797 * do that and bail out instead.
1805 /* We are at the instruction behind the xfer. If the register
1806 * isn't used later, and we have an address mode match, we can
1807 * replace the transfer by a load and remove the initial load.
1809 if ((GetRegInfo (S, I, LoadEntry->Chg) & LoadEntry->Chg) == 0 &&
1810 (LoadEntry->AM == AM65_ABS ||
1811 LoadEntry->AM == AM65_ZP ||
1812 LoadEntry->AM == AM65_IMM) &&
1813 !MemAccess (S, Load+1, Xfer-1, LoadEntry)) {
1815 /* Generate the replacement load insn */
1817 switch (XferEntry->OPC) {
1821 X = NewCodeEntry (OP65_LDA,
1829 X = NewCodeEntry (OP65_LDX,
1837 X = NewCodeEntry (OP65_LDY,
1848 /* If we have a replacement load, change the code */
1850 /* Insert after the xfer insn */
1851 CS_InsertEntry (S, X, Xfer+1);
1853 /* Remove the xfer instead */
1854 CS_DelEntry (S, Xfer);
1856 /* Remove the initial load */
1857 CS_DelEntry (S, Load);
1859 /* Correct I so we continue with the next insn */
1862 /* Remember we had changes */
1865 /* Restart after last xfer insn */
1869 /* Restart after last xfer insn */
1881 /* Return the number of changes made */
1887 unsigned OptPushPop (CodeSeg* S)
1888 /* Remove a PHA/PLA sequence were A is not used later */
1890 unsigned Changes = 0;
1891 unsigned Push = 0; /* Index of push insn */
1892 unsigned Pop = 0; /* Index of pop insn */
1893 unsigned ChgA = 0; /* Flag for A changed */
1898 } State = Searching;
1900 /* Walk over the entries. Look for a push instruction that is followed by
1901 * a pop later, where the pop is not followed by an conditional branch,
1902 * and where the value of the A register is not used later on.
1903 * Look out for the following problems:
1905 * - There may be another PHA/PLA inside the sequence: Restart it.
1906 * - If the PLA has a label, all jumps to this label must be inside
1907 * the sequence, otherwise we cannot remove the PHA/PLA.
1910 while (I < CS_GetEntryCount (S)) {
1914 /* Get next entry */
1915 CodeEntry* E = CS_GetEntry (S, I);
1920 if (E->OPC == OP65_PHA) {
1921 /* Found start of sequence */
1929 if (E->OPC == OP65_PHA) {
1930 /* Inner push/pop, restart */
1933 } else if (E->OPC == OP65_PLA) {
1934 /* Found a matching pop */
1936 /* Check that the block between Push and Pop is a basic
1937 * block (one entry, one exit). Otherwise ignore it.
1939 if (CS_IsBasicBlock (S, Push, Pop)) {
1942 /* Go into searching mode again */
1945 } else if (E->Chg & REG_A) {
1951 /* We're at the instruction after the PLA.
1952 * Check for the following conditions:
1953 * - If this instruction is a store of A, does not have a
1954 * label, and A is not used later, we may replace the PHA
1955 * by the store and remove pla if several other conditions
1957 * - If this instruction is not a conditional branch, and A
1958 * is either unused later, or not changed by the code
1959 * between push and pop, we may remove PHA and PLA.
1961 if (E->OPC == OP65_STA &&
1963 !RegAUsed (S, I+1) &&
1964 !MemAccess (S, Push+1, Pop-1, E)) {
1966 /* Insert a STA after the PHA */
1967 X = NewCodeEntry (E->OPC, E->AM, E->Arg, E->JumpTo, E->LI);
1968 CS_InsertEntry (S, X, Push+1);
1970 /* Remove the PHA instead */
1971 CS_DelEntry (S, Push);
1973 /* Remove the PLA/STA sequence */
1974 CS_DelEntries (S, Pop, 2);
1976 /* Correct I so we continue with the next insn */
1979 /* Remember we had changes */
1982 } else if ((E->Info & OF_CBRA) == 0 &&
1983 (!RegAUsed (S, I) || !ChgA)) {
1985 /* We can remove the PHA and PLA instructions */
1986 CS_DelEntry (S, Pop);
1987 CS_DelEntry (S, Push);
1989 /* Correct I so we continue with the next insn */
1992 /* Remember we had changes */
1996 /* Go into search mode again */
2006 /* Return the number of changes made */
2012 unsigned OptPrecalc (CodeSeg* S)
2013 /* Replace immediate operations with the accu where the current contents are
2014 * known by a load of the final value.
2017 unsigned Changes = 0;
2020 /* Generate register info for this step */
2023 /* Walk over the entries */
2025 while (I < CS_GetEntryCount (S)) {
2027 /* Get next entry */
2028 CodeEntry* E = CS_GetEntry (S, I);
2030 /* Get pointers to the input and output registers of the insn */
2031 const RegContents* Out = &E->RI->Out;
2032 const RegContents* In = &E->RI->In;
2034 /* Argument for LDn and flag */
2035 const char* Arg = 0;
2036 opc_t OPC = OP65_LDA;
2038 /* Handle the different instructions */
2042 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegA)) {
2043 /* Result of load is known */
2044 Arg = MakeHexArg (Out->RegA);
2049 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegX)) {
2050 /* Result of load is known but register is X */
2051 Arg = MakeHexArg (Out->RegX);
2057 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegY)) {
2058 /* Result of load is known but register is Y */
2059 Arg = MakeHexArg (Out->RegY);
2065 if (RegValIsKnown (Out->RegA)) {
2066 /* Accu op zp with known contents */
2067 Arg = MakeHexArg (Out->RegA);
2073 /* If this is an operation with an immediate operand of zero,
2074 * and the register is zero, the operation won't give us any
2075 * results we don't already have (including the flags), so
2076 * remove it. Something like this is generated as a result of
2077 * a compare where parts of the values are known to be zero.
2079 if (In->RegA == 0 && CE_IsKnownImm (E, 0x00)) {
2080 /* 0-0 or 0+0 -> remove */
2087 if (CE_IsKnownImm (E, 0xFF)) {
2088 /* AND with 0xFF, remove */
2091 } else if (CE_IsKnownImm (E, 0x00)) {
2092 /* AND with 0x00, replace by lda #$00 */
2093 Arg = MakeHexArg (0x00);
2094 } else if (RegValIsKnown (Out->RegA)) {
2095 /* Accu AND zp with known contents */
2096 Arg = MakeHexArg (Out->RegA);
2097 } else if (In->RegA == 0xFF) {
2098 /* AND but A contains 0xFF - replace by lda */
2099 CE_ReplaceOPC (E, OP65_LDA);
2105 if (CE_IsKnownImm (E, 0x00)) {
2106 /* ORA with zero, remove */
2109 } else if (CE_IsKnownImm (E, 0xFF)) {
2110 /* ORA with 0xFF, replace by lda #$ff */
2111 Arg = MakeHexArg (0xFF);
2112 } else if (RegValIsKnown (Out->RegA)) {
2113 /* Accu AND zp with known contents */
2114 Arg = MakeHexArg (Out->RegA);
2115 } else if (In->RegA == 0) {
2116 /* ORA but A contains 0x00 - replace by lda */
2117 CE_ReplaceOPC (E, OP65_LDA);
2127 /* Check if we have to replace the insn by LDA */
2129 CodeEntry* X = NewCodeEntry (OPC, AM65_IMM, Arg, 0, E->LI);
2130 CS_InsertEntry (S, X, I+1);
2139 /* Free register info */
2142 /* Return the number of changes made */
2148 /*****************************************************************************/
2149 /* Optimize branch types */
2150 /*****************************************************************************/
2154 unsigned OptBranchDist (CodeSeg* S)
2155 /* Change branches for the distance needed. */
2157 unsigned Changes = 0;
2159 /* Walk over the entries */
2161 while (I < CS_GetEntryCount (S)) {
2163 /* Get next entry */
2164 CodeEntry* E = CS_GetEntry (S, I);
2166 /* Check if it's a conditional branch to a local label. */
2167 if (E->Info & OF_CBRA) {
2169 /* Is this a branch to a local symbol? */
2170 if (E->JumpTo != 0) {
2172 /* Check if the branch distance is short */
2173 int IsShort = IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner));
2175 /* Make the branch short/long according to distance */
2176 if ((E->Info & OF_LBRA) == 0 && !IsShort) {
2177 /* Short branch but long distance */
2178 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2180 } else if ((E->Info & OF_LBRA) != 0 && IsShort) {
2181 /* Long branch but short distance */
2182 CE_ReplaceOPC (E, MakeShortBranch (E->OPC));
2186 } else if ((E->Info & OF_LBRA) == 0) {
2188 /* Short branch to external symbol - make it long */
2189 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2194 } else if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 &&
2195 (E->Info & OF_UBRA) != 0 &&
2197 IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner))) {
2199 /* The jump is short and may be replaced by a BRA on the 65C02 CPU */
2200 CE_ReplaceOPC (E, OP65_BRA);
2209 /* Return the number of changes made */
2215 /*****************************************************************************/
2216 /* Optimize indirect loads */
2217 /*****************************************************************************/
2221 unsigned OptIndLoads1 (CodeSeg* S)
2230 * provided that x and y are both zero.
2233 unsigned Changes = 0;
2236 /* Generate register info for this step */
2239 /* Walk over the entries */
2241 while (I < CS_GetEntryCount (S)) {
2243 /* Get next entry */
2244 CodeEntry* E = CS_GetEntry (S, I);
2246 /* Check if it's what we're looking for */
2247 if (E->OPC == OP65_LDA &&
2248 E->AM == AM65_ZP_INDY &&
2249 E->RI->In.RegY == 0 &&
2250 E->RI->In.RegX == 0) {
2252 /* Replace by the same insn with other addressing mode */
2253 CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZPX_IND, E->Arg, 0, E->LI);
2254 CS_InsertEntry (S, X, I+1);
2256 /* Remove the old insn */
2266 /* Free register info */
2269 /* Return the number of changes made */
2275 unsigned OptIndLoads2 (CodeSeg* S)
2284 * provided that x and y are both zero.
2287 unsigned Changes = 0;
2290 /* Generate register info for this step */
2293 /* Walk over the entries */
2295 while (I < CS_GetEntryCount (S)) {
2297 /* Get next entry */
2298 CodeEntry* E = CS_GetEntry (S, I);
2300 /* Check if it's what we're looking for */
2301 if (E->OPC == OP65_LDA &&
2302 E->AM == AM65_ZPX_IND &&
2303 E->RI->In.RegY == 0 &&
2304 E->RI->In.RegX == 0) {
2306 /* Replace by the same insn with other addressing mode */
2307 CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZP_INDY, E->Arg, 0, E->LI);
2308 CS_InsertEntry (S, X, I+1);
2310 /* Remove the old insn */
2320 /* Free register info */
2323 /* Return the number of changes made */