1 /*****************************************************************************/
5 /* Environment independent low level optimizations */
9 /* (C) 2001-2009, Ullrich von Bassewitz */
10 /* Roemerstrasse 52 */
11 /* D-70794 Filderstadt */
12 /* EMail: uz@cc65.org */
15 /* This software is provided 'as-is', without any expressed or implied */
16 /* warranty. In no event will the authors be held liable for any damages */
17 /* arising from the use of this software. */
19 /* Permission is granted to anyone to use this software for any purpose, */
20 /* including commercial applications, and to alter it and redistribute it */
21 /* freely, subject to the following restrictions: */
23 /* 1. The origin of this software must not be misrepresented; you must not */
24 /* claim that you wrote the original software. If you use this software */
25 /* in a product, an acknowledgment in the product documentation would be */
26 /* appreciated but is not required. */
27 /* 2. Altered source versions must be plainly marked as such, and must not */
28 /* be misrepresented as being the original software. */
29 /* 3. This notice may not be removed or altered from any source */
32 /*****************************************************************************/
48 /*****************************************************************************/
49 /* Helper functions */
50 /*****************************************************************************/
54 static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const char* Arg)
55 /* Checks a range of code entries if there are any memory accesses to Arg.
56 * Note: This function is not 100% safe, because there is more than one way
57 * to express a memory location ("foo" and "foo+0" comes to mind) and there
58 * may be other accesses through pointers. For the code generated by cc65 and
59 * for the purpose of the caller (OptPushPop) it is assumed to be safe enough
63 /* Walk over all code entries */
66 /* Get the next entry */
67 CodeEntry* E = CS_GetEntry (S, From);
69 /* For simplicity, we just check if there is an argument and if this
70 * argument equals Arg.
72 if (E->Arg && strcmp (E->Arg, Arg) == 0) {
87 static int GetBranchDist (CodeSeg* S, unsigned From, CodeEntry* To)
88 /* Get the branch distance between the two entries and return it. The distance
89 * will be negative for backward jumps and positive for forward jumps.
92 /* Get the index of the branch target */
93 unsigned TI = CS_GetEntryIndex (S, To);
95 /* Determine the branch distance */
98 /* Forward branch, do not count the current insn */
101 CodeEntry* N = CS_GetEntry (S, J++);
105 /* Backward branch */
108 CodeEntry* N = CS_GetEntry (S, J++);
113 /* Return the calculated distance */
119 static int IsShortDist (int Distance)
120 /* Return true if the given distance is a short branch distance */
122 return (Distance >= -125 && Distance <= 125);
127 static short ZPRegVal (unsigned short Use, const RegContents* RC)
128 /* Return the contents of the given zeropage register */
130 if ((Use & REG_TMP1) != 0) {
132 } else if ((Use & REG_PTR1_LO) != 0) {
134 } else if ((Use & REG_PTR1_HI) != 0) {
136 } else if ((Use & REG_SREG_LO) != 0) {
138 } else if ((Use & REG_SREG_HI) != 0) {
141 return UNKNOWN_REGVAL;
147 static short RegVal (unsigned short Use, const RegContents* RC)
148 /* Return the contents of the given register */
150 if ((Use & REG_A) != 0) {
152 } else if ((Use & REG_X) != 0) {
154 } else if ((Use & REG_Y) != 0) {
157 return ZPRegVal (Use, RC);
163 /*****************************************************************************/
164 /* Replace jumps to RTS by RTS */
165 /*****************************************************************************/
169 unsigned OptRTSJumps1 (CodeSeg* S)
170 /* Replace jumps to RTS by RTS */
172 unsigned Changes = 0;
174 /* Walk over all entries minus the last one */
176 while (I < CS_GetEntryCount (S)) {
178 /* Get the next entry */
179 CodeEntry* E = CS_GetEntry (S, I);
181 /* Check if it's an unconditional branch to a local target */
182 if ((E->Info & OF_UBRA) != 0 &&
184 E->JumpTo->Owner->OPC == OP65_RTS) {
186 /* Insert an RTS instruction */
187 CodeEntry* X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->LI);
188 CS_InsertEntry (S, X, I+1);
190 /* Delete the jump */
193 /* Remember, we had changes */
203 /* Return the number of changes made */
209 unsigned OptRTSJumps2 (CodeSeg* S)
210 /* Replace long conditional jumps to RTS */
212 unsigned Changes = 0;
214 /* Walk over all entries minus the last one */
216 while (I < CS_GetEntryCount (S)) {
220 /* Get the next entry */
221 CodeEntry* E = CS_GetEntry (S, I);
223 /* Check if it's an unconditional branch to a local target */
224 if ((E->Info & OF_CBRA) != 0 && /* Conditional branch */
225 (E->Info & OF_LBRA) != 0 && /* Long branch */
226 E->JumpTo != 0 && /* Local label */
227 E->JumpTo->Owner->OPC == OP65_RTS && /* Target is an RTS */
228 (N = CS_GetNextEntry (S, I)) != 0) { /* There is a next entry */
234 /* We will create a jump around an RTS instead of the long branch */
235 X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->JumpTo->Owner->LI);
236 CS_InsertEntry (S, X, I+1);
238 /* Get the new branch opcode */
239 NewBranch = MakeShortBranch (GetInverseBranch (E->OPC));
241 /* Get the label attached to N, create a new one if needed */
242 LN = CS_GenLabel (S, N);
244 /* Generate the branch */
245 X = NewCodeEntry (NewBranch, AM65_BRA, LN->Name, LN, E->LI);
246 CS_InsertEntry (S, X, I+1);
248 /* Delete the long branch */
251 /* Remember, we had changes */
261 /* Return the number of changes made */
267 /*****************************************************************************/
268 /* Remove dead jumps */
269 /*****************************************************************************/
273 unsigned OptDeadJumps (CodeSeg* S)
274 /* Remove dead jumps (jumps to the next instruction) */
276 unsigned Changes = 0;
278 /* Walk over all entries minus the last one */
280 while (I < CS_GetEntryCount (S)) {
282 /* Get the next entry */
283 CodeEntry* E = CS_GetEntry (S, I);
285 /* Check if it's a branch, if it has a local target, and if the target
286 * is the next instruction.
288 if (E->AM == AM65_BRA &&
290 E->JumpTo->Owner == CS_GetNextEntry (S, I)) {
292 /* Delete the dead jump */
295 /* Remember, we had changes */
306 /* Return the number of changes made */
312 /*****************************************************************************/
313 /* Remove dead code */
314 /*****************************************************************************/
318 unsigned OptDeadCode (CodeSeg* S)
319 /* Remove dead code (code that follows an unconditional jump or an rts/rti
323 unsigned Changes = 0;
325 /* Walk over all entries */
327 while (I < CS_GetEntryCount (S)) {
333 CodeEntry* E = CS_GetEntry (S, I);
335 /* Check if it's an unconditional branch, and if the next entry has
336 * no labels attached, or if the label is just used so that the insn
337 * can jump to itself.
339 if ((E->Info & OF_DEAD) != 0 && /* Dead code follows */
340 (N = CS_GetNextEntry (S, I)) != 0 && /* Has next entry */
341 (!CE_HasLabel (N) || /* Don't has a label */
342 ((N->Info & OF_UBRA) != 0 && /* Uncond branch */
343 (LN = N->JumpTo) != 0 && /* Jumps to known label */
344 LN->Owner == N && /* Attached to insn */
345 CL_GetRefCount (LN) == 1))) { /* Only reference */
347 /* Delete the next entry */
348 CS_DelEntry (S, I+1);
350 /* Remember, we had changes */
361 /* Return the number of changes made */
367 /*****************************************************************************/
368 /* Optimize jump cascades */
369 /*****************************************************************************/
373 unsigned OptJumpCascades (CodeSeg* S)
374 /* Optimize jump cascades (jumps to jumps). In such a case, the jump is
375 * replaced by a jump to the final location. This will in some cases produce
376 * worse code, because some jump targets are no longer reachable by short
377 * branches, but this is quite rare, so there are more advantages than
381 unsigned Changes = 0;
383 /* Walk over all entries */
385 while (I < CS_GetEntryCount (S)) {
391 CodeEntry* E = CS_GetEntry (S, I);
393 /* Check if it's a branch, if it has a jump label, if this jump
394 * label is not attached to the instruction itself, and if the
395 * target instruction is itself a branch.
397 if ((E->Info & OF_BRA) != 0 &&
398 (OldLabel = E->JumpTo) != 0 &&
399 (N = OldLabel->Owner) != E &&
400 (N->Info & OF_BRA) != 0) {
402 /* Check if we can use the final target label. This is the case,
403 * if the target branch is an absolut branch, or if it is a
404 * conditional branch checking the same condition as the first one.
406 if ((N->Info & OF_UBRA) != 0 ||
407 ((E->Info & OF_CBRA) != 0 &&
408 GetBranchCond (E->OPC) == GetBranchCond (N->OPC))) {
410 /* This is a jump cascade and we may jump to the final target,
411 * provided that the other insn does not jump to itself. If
412 * this is the case, we can also jump to ourselves, otherwise
413 * insert a jump to the new instruction and remove the old one.
416 CodeLabel* LN = N->JumpTo;
418 if (LN != 0 && LN->Owner == N) {
420 /* We found a jump to a jump to itself. Replace our jump
421 * by a jump to itself.
423 CodeLabel* LE = CS_GenLabel (S, E);
424 X = NewCodeEntry (E->OPC, E->AM, LE->Name, LE, E->LI);
428 /* Jump to the final jump target */
429 X = NewCodeEntry (E->OPC, E->AM, N->Arg, N->JumpTo, E->LI);
433 /* Insert it behind E */
434 CS_InsertEntry (S, X, I+1);
439 /* Remember, we had changes */
442 /* Check if both are conditional branches, and the condition of
443 * the second is the inverse of that of the first. In this case,
444 * the second branch will never be taken, and we may jump directly
445 * to the instruction behind this one.
447 } else if ((E->Info & OF_CBRA) != 0 && (N->Info & OF_CBRA) != 0) {
449 CodeEntry* X; /* Instruction behind N */
450 CodeLabel* LX; /* Label attached to X */
452 /* Get the branch conditions of both branches */
453 bc_t BC1 = GetBranchCond (E->OPC);
454 bc_t BC2 = GetBranchCond (N->OPC);
456 /* Check the branch conditions */
457 if (BC1 != GetInverseCond (BC2)) {
458 /* Condition not met */
462 /* We may jump behind this conditional branch. Get the
463 * pointer to the next instruction
465 if ((X = CS_GetNextEntry (S, CS_GetEntryIndex (S, N))) == 0) {
466 /* N is the last entry, bail out */
470 /* Get the label attached to X, create a new one if needed */
471 LX = CS_GenLabel (S, X);
473 /* Move the reference from E to the new label */
474 CS_MoveLabelRef (S, E, LX);
476 /* Remember, we had changes */
487 /* Return the number of changes made */
493 /*****************************************************************************/
494 /* Optimize jsr/rts */
495 /*****************************************************************************/
499 unsigned OptRTS (CodeSeg* S)
500 /* Optimize subroutine calls followed by an RTS. The subroutine call will get
501 * replaced by a jump. Don't bother to delete the RTS if it does not have a
502 * label, the dead code elimination should take care of it.
505 unsigned Changes = 0;
507 /* Walk over all entries minus the last one */
509 while (I < CS_GetEntryCount (S)) {
514 CodeEntry* E = CS_GetEntry (S, I);
516 /* Check if it's a subroutine call and if the following insn is RTS */
517 if (E->OPC == OP65_JSR &&
518 (N = CS_GetNextEntry (S, I)) != 0 &&
519 N->OPC == OP65_RTS) {
521 /* Change the jsr to a jmp and use the additional info for a jump */
523 CE_ReplaceOPC (E, OP65_JMP);
525 /* Remember, we had changes */
535 /* Return the number of changes made */
541 /*****************************************************************************/
542 /* Optimize jump targets */
543 /*****************************************************************************/
547 unsigned OptJumpTarget1 (CodeSeg* S)
548 /* If the instruction preceeding an unconditional branch is the same as the
549 * instruction preceeding the jump target, the jump target may be moved
550 * one entry back. This is a size optimization, since the instruction before
551 * the branch gets removed.
554 unsigned Changes = 0;
555 CodeEntry* E1; /* Entry 1 */
556 CodeEntry* E2; /* Entry 2 */
557 CodeEntry* T1; /* Jump target entry 1 */
558 CodeLabel* TL1; /* Target label 1 */
560 /* Walk over the entries */
562 while (I < CS_GetEntryCount (S)) {
565 E2 = CS_GetNextEntry (S, I);
567 /* Check if we have a jump or branch, and a matching label, which
568 * is not attached to the jump itself
571 (E2->Info & OF_UBRA) != 0 &&
573 E2->JumpTo->Owner != E2) {
575 /* Get the entry preceeding the branch target */
576 T1 = CS_GetPrevEntry (S, CS_GetEntryIndex (S, E2->JumpTo->Owner));
578 /* There is no such entry */
582 /* Get the entry preceeding the jump */
583 E1 = CS_GetEntry (S, I);
585 /* Check if both preceeding instructions are identical */
586 if (!CodeEntriesAreEqual (E1, T1)) {
587 /* Not equal, try next */
591 /* Get the label for the instruction preceeding the jump target.
592 * This routine will create a new label if the instruction does
593 * not already have one.
595 TL1 = CS_GenLabel (S, T1);
597 /* Change the jump target to point to this new label */
598 CS_MoveLabelRef (S, E2, TL1);
600 /* If the instruction preceeding the jump has labels attached,
601 * move references to this label to the new label.
603 if (CE_HasLabel (E1)) {
604 CS_MoveLabels (S, E1, T1);
607 /* Remove the entry preceeding the jump */
610 /* Remember, we had changes */
620 /* Return the number of changes made */
626 unsigned OptJumpTarget2 (CodeSeg* S)
627 /* If a bcs jumps to a sec insn or a bcc jumps to clc, skip this insn, since
628 * it's job is already done.
631 unsigned Changes = 0;
633 /* Walk over the entries */
635 while (I < CS_GetEntryCount (S)) {
637 /* OP that may be skipped */
640 /* Jump target insn, old and new */
648 CodeEntry* E = CS_GetEntry (S, I);
650 /* Check if this is a bcc insn */
651 if (E->OPC == OP65_BCC || E->OPC == OP65_JCC) {
653 } else if (E->OPC == OP65_BCS || E->OPC == OP65_JCS) {
656 /* Not what we're looking for */
660 /* Must have a jump target */
661 if (E->JumpTo == 0) {
665 /* Get the owner insn of the jump target and check if it's the one, we
666 * will skip if present.
668 T = E->JumpTo->Owner;
673 /* Get the entry following the branch target */
674 N = CS_GetNextEntry (S, CS_GetEntryIndex (S, T));
676 /* There is no such entry */
680 /* Get the label for the instruction following the jump target.
681 * This routine will create a new label if the instruction does
682 * not already have one.
684 L = CS_GenLabel (S, N);
686 /* Change the jump target to point to this new label */
687 CS_MoveLabelRef (S, E, L);
689 /* Remember that we had changes */
697 /* Return the number of changes made */
703 /*****************************************************************************/
704 /* Optimize conditional branches */
705 /*****************************************************************************/
709 unsigned OptCondBranches (CodeSeg* S)
710 /* Performs several optimization steps:
712 * - If an immidiate load of a register is followed by a conditional jump that
713 * is never taken because the load of the register sets the flags in such a
714 * manner, remove the conditional branch.
715 * - If the conditional branch is always taken because of the register load,
716 * replace it by a jmp.
717 * - If a conditional branch jumps around an unconditional branch, remove the
718 * conditional branch and make the jump a conditional branch with the
719 * inverse condition of the first one.
722 unsigned Changes = 0;
724 /* Walk over the entries */
726 while (I < CS_GetEntryCount (S)) {
732 CodeEntry* E = CS_GetEntry (S, I);
734 /* Check if it's a register load */
735 if ((E->Info & OF_LOAD) != 0 && /* It's a load instruction */
736 E->AM == AM65_IMM && /* ..with immidiate addressing */
737 (E->Flags & CEF_NUMARG) != 0 && /* ..and a numeric argument. */
738 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
739 (N->Info & OF_CBRA) != 0 && /* ..which is a conditional branch */
740 !CE_HasLabel (N)) { /* ..and does not have a label */
742 /* Get the branch condition */
743 bc_t BC = GetBranchCond (N->OPC);
745 /* Check the argument against the branch condition */
746 if ((BC == BC_EQ && E->Num != 0) ||
747 (BC == BC_NE && E->Num == 0) ||
748 (BC == BC_PL && (E->Num & 0x80) != 0) ||
749 (BC == BC_MI && (E->Num & 0x80) == 0)) {
751 /* Remove the conditional branch */
752 CS_DelEntry (S, I+1);
754 /* Remember, we had changes */
757 } else if ((BC == BC_EQ && E->Num == 0) ||
758 (BC == BC_NE && E->Num != 0) ||
759 (BC == BC_PL && (E->Num & 0x80) == 0) ||
760 (BC == BC_MI && (E->Num & 0x80) != 0)) {
762 /* The branch is always taken, replace it by a jump */
763 CE_ReplaceOPC (N, OP65_JMP);
765 /* Remember, we had changes */
771 if ((E->Info & OF_CBRA) != 0 && /* It's a conditional branch */
772 (L = E->JumpTo) != 0 && /* ..referencing a local label */
773 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
774 (N->Info & OF_UBRA) != 0 && /* ..which is an uncond branch, */
775 !CE_HasLabel (N) && /* ..has no label attached */
776 L->Owner == CS_GetNextEntry (S, I+1)) {/* ..and jump target follows */
778 /* Replace the jump by a conditional branch with the inverse branch
779 * condition than the branch around it.
781 CE_ReplaceOPC (N, GetInverseBranch (E->OPC));
783 /* Remove the conditional branch */
786 /* Remember, we had changes */
796 /* Return the number of changes made */
802 /*****************************************************************************/
803 /* Remove unused loads and stores */
804 /*****************************************************************************/
808 unsigned OptUnusedLoads (CodeSeg* S)
809 /* Remove loads of registers where the value loaded is not used later. */
811 unsigned Changes = 0;
813 /* Walk over the entries */
815 while (I < CS_GetEntryCount (S)) {
820 CodeEntry* E = CS_GetEntry (S, I);
822 /* Check if it's a register load or transfer insn */
823 if ((E->Info & (OF_LOAD | OF_XFR | OF_REG_INCDEC)) != 0 &&
824 (N = CS_GetNextEntry (S, I)) != 0 &&
825 !CE_UseLoadFlags (N)) {
827 /* Check which sort of load or transfer it is */
834 case OP65_TYA: R = REG_A; break;
838 case OP65_TAX: R = REG_X; break;
842 case OP65_TAY: R = REG_Y; break;
843 default: goto NextEntry; /* OOPS */
846 /* Get register usage and check if the register value is used later */
847 if ((GetRegInfo (S, I+1, R) & R) == 0) {
849 /* Register value is not used, remove the load */
852 /* Remember, we had changes. Account the deleted entry in I. */
865 /* Return the number of changes made */
871 unsigned OptUnusedStores (CodeSeg* S)
872 /* Remove stores into zero page registers that aren't used later */
874 unsigned Changes = 0;
876 /* Walk over the entries */
878 while (I < CS_GetEntryCount (S)) {
881 CodeEntry* E = CS_GetEntry (S, I);
883 /* Check if it's a register load or transfer insn */
884 if ((E->Info & OF_STORE) != 0 &&
886 (E->Chg & REG_ZP) != 0) {
888 /* Check for the zero page location. We know that there cannot be
889 * more than one zero page location involved in the store.
891 unsigned R = E->Chg & REG_ZP;
893 /* Get register usage and check if the register value is used later */
894 if ((GetRegInfo (S, I+1, R) & R) == 0) {
896 /* Register value is not used, remove the load */
899 /* Remember, we had changes */
910 /* Return the number of changes made */
916 unsigned OptDupLoads (CodeSeg* S)
917 /* Remove loads of registers where the value loaded is already in the register. */
919 unsigned Changes = 0;
922 /* Generate register info for this step */
925 /* Walk over the entries */
927 while (I < CS_GetEntryCount (S)) {
932 CodeEntry* E = CS_GetEntry (S, I);
934 /* Assume we won't delete the entry */
937 /* Get a pointer to the input registers of the insn */
938 const RegContents* In = &E->RI->In;
940 /* Handle the different instructions */
944 if (RegValIsKnown (In->RegA) && /* Value of A is known */
945 CE_IsKnownImm (E, In->RegA) && /* Value to be loaded is known */
946 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
947 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
953 if (RegValIsKnown (In->RegX) && /* Value of X is known */
954 CE_IsKnownImm (E, In->RegX) && /* Value to be loaded is known */
955 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
956 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
962 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
963 CE_IsKnownImm (E, In->RegY) && /* Value to be loaded is known */
964 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
965 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
971 /* If we store into a known zero page location, and this
972 * location does already contain the value to be stored,
975 if (RegValIsKnown (In->RegA) && /* Value of A is known */
976 E->AM == AM65_ZP && /* Store into zp */
977 In->RegA == ZPRegVal (E->Chg, In)) { /* Value identical */
984 /* If we store into a known zero page location, and this
985 * location does already contain the value to be stored,
988 if (RegValIsKnown (In->RegX) && /* Value of A is known */
989 E->AM == AM65_ZP && /* Store into zp */
990 In->RegX == ZPRegVal (E->Chg, In)) { /* Value identical */
994 /* If the value in the X register is known and the same as
995 * that in the A register, replace the store by a STA. The
996 * optimizer will then remove the load instruction for X
997 * later. STX does support the zeropage,y addressing mode,
998 * so be sure to check for that.
1000 } else if (RegValIsKnown (In->RegX) &&
1001 In->RegX == In->RegA &&
1002 E->AM != AM65_ABSY &&
1003 E->AM != AM65_ZPY) {
1004 /* Use the A register instead */
1005 CE_ReplaceOPC (E, OP65_STA);
1010 /* If we store into a known zero page location, and this
1011 * location does already contain the value to be stored,
1014 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1015 E->AM == AM65_ZP && /* Store into zp */
1016 In->RegY == ZPRegVal (E->Chg, In)) { /* Value identical */
1020 /* If the value in the Y register is known and the same as
1021 * that in the A register, replace the store by a STA. The
1022 * optimizer will then remove the load instruction for Y
1023 * later. If replacement by A is not possible try a
1024 * replacement by X, but check for invalid addressing modes
1027 } else if (RegValIsKnown (In->RegY)) {
1028 if (In->RegY == In->RegA) {
1029 CE_ReplaceOPC (E, OP65_STA);
1030 } else if (In->RegY == In->RegX &&
1031 E->AM != AM65_ABSX &&
1032 E->AM != AM65_ZPX) {
1033 CE_ReplaceOPC (E, OP65_STX);
1039 /* If we store into a known zero page location, and this
1040 * location does already contain the value to be stored,
1043 if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && E->AM == AM65_ZP) {
1044 if (ZPRegVal (E->Chg, In) == 0) {
1051 if (RegValIsKnown (In->RegA) &&
1052 In->RegA == In->RegX &&
1053 (N = CS_GetNextEntry (S, I)) != 0 &&
1054 !CE_UseLoadFlags (N)) {
1055 /* Value is identical and not followed by a branch */
1061 if (RegValIsKnown (In->RegA) &&
1062 In->RegA == In->RegY &&
1063 (N = CS_GetNextEntry (S, I)) != 0 &&
1064 !CE_UseLoadFlags (N)) {
1065 /* Value is identical and not followed by a branch */
1071 if (RegValIsKnown (In->RegX) &&
1072 In->RegX == In->RegA &&
1073 (N = CS_GetNextEntry (S, I)) != 0 &&
1074 !CE_UseLoadFlags (N)) {
1075 /* Value is identical and not followed by a branch */
1081 if (RegValIsKnown (In->RegY) &&
1082 In->RegY == In->RegA &&
1083 (N = CS_GetNextEntry (S, I)) != 0 &&
1084 !CE_UseLoadFlags (N)) {
1085 /* Value is identical and not followed by a branch */
1095 /* Delete the entry if requested */
1098 /* Register value is not used, remove the load */
1101 /* Remember, we had changes */
1113 /* Free register info */
1116 /* Return the number of changes made */
1122 unsigned OptStoreLoad (CodeSeg* S)
1123 /* Remove a store followed by a load from the same location. */
1125 unsigned Changes = 0;
1127 /* Walk over the entries */
1129 while (I < CS_GetEntryCount (S)) {
1134 /* Get next entry */
1135 CodeEntry* E = CS_GetEntry (S, I);
1137 /* Check if it is a store instruction followed by a load from the
1138 * same address which is itself not followed by a conditional branch.
1140 if ((E->Info & OF_STORE) != 0 &&
1141 (N = CS_GetNextEntry (S, I)) != 0 &&
1144 ((E->OPC == OP65_STA && N->OPC == OP65_LDA) ||
1145 (E->OPC == OP65_STX && N->OPC == OP65_LDX) ||
1146 (E->OPC == OP65_STY && N->OPC == OP65_LDY)) &&
1147 strcmp (E->Arg, N->Arg) == 0 &&
1148 (X = CS_GetNextEntry (S, I+1)) != 0 &&
1149 !CE_UseLoadFlags (X)) {
1151 /* Register has already the correct value, remove the load */
1152 CS_DelEntry (S, I+1);
1154 /* Remember, we had changes */
1164 /* Return the number of changes made */
1170 unsigned OptTransfers1 (CodeSeg* S)
1171 /* Remove transfers from one register to another and back */
1173 unsigned Changes = 0;
1175 /* Walk over the entries */
1177 while (I < CS_GetEntryCount (S)) {
1183 /* Get next entry */
1184 CodeEntry* E = CS_GetEntry (S, I);
1186 /* Check if we have two transfer instructions */
1187 if ((E->Info & OF_XFR) != 0 &&
1188 (N = CS_GetNextEntry (S, I)) != 0 &&
1190 (N->Info & OF_XFR) != 0) {
1192 /* Check if it's a transfer and back */
1193 if ((E->OPC == OP65_TAX && N->OPC == OP65_TXA && !RegXUsed (S, I+2)) ||
1194 (E->OPC == OP65_TAY && N->OPC == OP65_TYA && !RegYUsed (S, I+2)) ||
1195 (E->OPC == OP65_TXA && N->OPC == OP65_TAX && !RegAUsed (S, I+2)) ||
1196 (E->OPC == OP65_TYA && N->OPC == OP65_TAY && !RegAUsed (S, I+2))) {
1198 /* If the next insn is a conditional branch, check if the insn
1199 * preceeding the first xfr will set the flags right, otherwise we
1200 * may not remove the sequence.
1202 if ((X = CS_GetNextEntry (S, I+1)) == 0) {
1205 if (CE_UseLoadFlags (X)) {
1207 /* No preceeding entry */
1210 P = CS_GetEntry (S, I-1);
1211 if ((P->Info & OF_SETF) == 0) {
1212 /* Does not set the flags */
1217 /* Remove both transfers */
1218 CS_DelEntry (S, I+1);
1221 /* Remember, we had changes */
1232 /* Return the number of changes made */
1238 unsigned OptTransfers2 (CodeSeg* S)
1239 /* Replace loads followed by a register transfer by a load with the second
1240 * register if possible.
1243 unsigned Changes = 0;
1245 /* Walk over the entries */
1247 while (I < CS_GetEntryCount (S)) {
1251 /* Get next entry */
1252 CodeEntry* E = CS_GetEntry (S, I);
1254 /* Check if we have a load followed by a transfer where the loaded
1255 * register is not used later.
1257 if ((E->Info & OF_LOAD) != 0 &&
1258 (N = CS_GetNextEntry (S, I)) != 0 &&
1260 (N->Info & OF_XFR) != 0 &&
1261 GetRegInfo (S, I+2, E->Chg) != E->Chg) {
1265 if (E->OPC == OP65_LDA && N->OPC == OP65_TAX) {
1266 /* LDA/TAX - check for the right addressing modes */
1267 if (E->AM == AM65_IMM ||
1269 E->AM == AM65_ABS ||
1270 E->AM == AM65_ABSY) {
1272 X = NewCodeEntry (OP65_LDX, E->AM, E->Arg, 0, N->LI);
1274 } else if (E->OPC == OP65_LDA && N->OPC == OP65_TAY) {
1275 /* LDA/TAY - check for the right addressing modes */
1276 if (E->AM == AM65_IMM ||
1278 E->AM == AM65_ZPX ||
1279 E->AM == AM65_ABS ||
1280 E->AM == AM65_ABSX) {
1282 X = NewCodeEntry (OP65_LDY, E->AM, E->Arg, 0, N->LI);
1284 } else if (E->OPC == OP65_LDY && N->OPC == OP65_TYA) {
1285 /* LDY/TYA. LDA supports all addressing modes LDY does */
1286 X = NewCodeEntry (OP65_LDA, E->AM, E->Arg, 0, N->LI);
1287 } else if (E->OPC == OP65_LDX && N->OPC == OP65_TXA) {
1288 /* LDX/TXA. LDA doesn't support zp,y, so we must map it to
1291 am_t AM = (E->AM == AM65_ZPY)? AM65_ABSY : E->AM;
1292 X = NewCodeEntry (OP65_LDA, AM, E->Arg, 0, N->LI);
1295 /* If we have a load entry, add it and remove the old stuff */
1297 CS_InsertEntry (S, X, I+2);
1298 CS_DelEntries (S, I, 2);
1300 --I; /* Correct for one entry less */
1308 /* Return the number of changes made */
1314 unsigned OptTransfers3 (CodeSeg* S)
1315 /* Replace a register transfer followed by a store of the second register by a
1316 * store of the first register if this is possible.
1319 unsigned Changes = 0;
1320 unsigned Xfer = 0; /* Index of transfer insn */
1321 unsigned Store = 0; /* Index of store insn */
1322 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1323 CodeEntry* StoreEntry = 0; /* Pointer to store insn */
1329 } State = Searching;
1331 /* Walk over the entries. Look for a xfer instruction that is followed by
1332 * a store later, where the value of the register is not used later.
1335 while (I < CS_GetEntryCount (S)) {
1337 /* Get next entry */
1338 CodeEntry* E = CS_GetEntry (S, I);
1343 if (E->Info & OF_XFR) {
1344 /* Found start of sequence */
1352 /* If we find a conditional jump, abort the sequence, since
1353 * handling them makes things really complicated.
1355 if (E->Info & OF_CBRA) {
1357 /* Switch back to searching */
1361 /* Does this insn use the target register of the transfer? */
1362 } else if ((E->Use & XferEntry->Chg) != 0) {
1364 /* It it's a store instruction, and the block is a basic
1365 * block, proceed. Otherwise restart
1367 if ((E->Info & OF_STORE) != 0 &&
1368 CS_IsBasicBlock (S, Xfer, I)) {
1377 /* Does this insn change the target register of the transfer? */
1378 } else if (E->Chg & XferEntry->Chg) {
1380 /* We *may* add code here to remove the transfer, but I'm
1381 * currently not sure about the consequences, so I won't
1382 * do that and bail out instead.
1390 /* We are at the instruction behind the store. If the register
1391 * isn't used later, and we have an address mode match, we can
1392 * replace the transfer by a store and remove the store here.
1394 if ((GetRegInfo (S, I, XferEntry->Chg) & XferEntry->Chg) == 0 &&
1395 (StoreEntry->AM == AM65_ABS || StoreEntry->AM == AM65_ZP) &&
1396 !MemAccess (S, Xfer+1, Store-1, StoreEntry->Arg)) {
1398 /* Generate the replacement store insn */
1400 switch (XferEntry->OPC) {
1403 X = NewCodeEntry (OP65_STX,
1411 X = NewCodeEntry (OP65_STA,
1419 X = NewCodeEntry (OP65_STY,
1427 X = NewCodeEntry (OP65_STA,
1438 /* If we have a replacement store, change the code */
1440 /* Insert after the xfer insn */
1441 CS_InsertEntry (S, X, Xfer+1);
1443 /* Remove the xfer instead */
1444 CS_DelEntry (S, Xfer);
1446 /* Remove the final store */
1447 CS_DelEntry (S, Store);
1449 /* Correct I so we continue with the next insn */
1452 /* Remember we had changes */
1455 /* Restart after last xfer insn */
1459 /* Restart after last xfer insn */
1471 /* Return the number of changes made */
1477 unsigned OptTransfers4 (CodeSeg* S)
1478 /* Replace a load of a register followed by a transfer insn of the same register
1479 * by a load of the second register if possible.
1482 unsigned Changes = 0;
1483 unsigned Load = 0; /* Index of load insn */
1484 unsigned Xfer = 0; /* Index of transfer insn */
1485 CodeEntry* LoadEntry = 0; /* Pointer to load insn */
1486 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1492 } State = Searching;
1494 /* Walk over the entries. Look for a load instruction that is followed by
1498 while (I < CS_GetEntryCount (S)) {
1500 /* Get next entry */
1501 CodeEntry* E = CS_GetEntry (S, I);
1506 if (E->Info & OF_LOAD) {
1507 /* Found start of sequence */
1515 /* If we find a conditional jump, abort the sequence, since
1516 * handling them makes things really complicated.
1518 if (E->Info & OF_CBRA) {
1520 /* Switch back to searching */
1524 /* Does this insn use the target register of the load? */
1525 } else if ((E->Use & LoadEntry->Chg) != 0) {
1527 /* It it's a xfer instruction, and the block is a basic
1528 * block, proceed. Otherwise restart
1530 if ((E->Info & OF_XFR) != 0 &&
1531 CS_IsBasicBlock (S, Load, I)) {
1540 /* Does this insn change the target register of the load? */
1541 } else if (E->Chg & LoadEntry->Chg) {
1543 /* We *may* add code here to remove the load, but I'm
1544 * currently not sure about the consequences, so I won't
1545 * do that and bail out instead.
1553 /* We are at the instruction behind the xfer. If the register
1554 * isn't used later, and we have an address mode match, we can
1555 * replace the transfer by a load and remove the initial load.
1557 if ((GetRegInfo (S, I, LoadEntry->Chg) & LoadEntry->Chg) == 0 &&
1558 (LoadEntry->AM == AM65_ABS ||
1559 LoadEntry->AM == AM65_ZP ||
1560 LoadEntry->AM == AM65_IMM) &&
1561 !MemAccess (S, Load+1, Xfer-1, LoadEntry->Arg)) {
1563 /* Generate the replacement load insn */
1565 switch (XferEntry->OPC) {
1569 X = NewCodeEntry (OP65_LDA,
1577 X = NewCodeEntry (OP65_LDX,
1585 X = NewCodeEntry (OP65_LDY,
1596 /* If we have a replacement load, change the code */
1598 /* Insert after the xfer insn */
1599 CS_InsertEntry (S, X, Xfer+1);
1601 /* Remove the xfer instead */
1602 CS_DelEntry (S, Xfer);
1604 /* Remove the initial load */
1605 CS_DelEntry (S, Load);
1607 /* Correct I so we continue with the next insn */
1610 /* Remember we had changes */
1613 /* Restart after last xfer insn */
1617 /* Restart after last xfer insn */
1629 /* Return the number of changes made */
1635 unsigned OptPushPop (CodeSeg* S)
1636 /* Remove a PHA/PLA sequence were A is not used later */
1638 unsigned Changes = 0;
1639 unsigned Push = 0; /* Index of push insn */
1640 unsigned Pop = 0; /* Index of pop insn */
1645 } State = Searching;
1647 /* Walk over the entries. Look for a push instruction that is followed by
1648 * a pop later, where the pop is not followed by an conditional branch,
1649 * and where the value of the A register is not used later on.
1650 * Look out for the following problems:
1652 * - There may be another PHA/PLA inside the sequence: Restart it.
1653 * - If the PLA has a label, all jumps to this label must be inside
1654 * the sequence, otherwise we cannot remove the PHA/PLA.
1657 while (I < CS_GetEntryCount (S)) {
1661 /* Get next entry */
1662 CodeEntry* E = CS_GetEntry (S, I);
1667 if (E->OPC == OP65_PHA) {
1668 /* Found start of sequence */
1675 if (E->OPC == OP65_PHA) {
1676 /* Inner push/pop, restart */
1678 } else if (E->OPC == OP65_PLA) {
1679 /* Found a matching pop */
1681 /* Check that the block between Push and Pop is a basic
1682 * block (one entry, one exit). Otherwise ignore it.
1684 if (CS_IsBasicBlock (S, Push, Pop)) {
1687 /* Go into searching mode again */
1694 /* We're at the instruction after the PLA.
1695 * Check for the following conditions:
1696 * - If this instruction is a store of A, and A is not used
1697 * later, we may replace the PHA by the store and remove
1698 * pla if several other conditions are met.
1699 * - If this instruction is not a conditional branch, and A
1700 * is unused later, we may remove PHA and PLA.
1702 if (E->OPC == OP65_STA &&
1703 !RegAUsed (S, I+1) &&
1704 !MemAccess (S, Push+1, Pop-1, E->Arg)) {
1706 /* Insert a STA after the PHA */
1707 X = NewCodeEntry (E->OPC, E->AM, E->Arg, E->JumpTo, E->LI);
1708 CS_InsertEntry (S, X, Push+1);
1710 /* Remove the PHA instead */
1711 CS_DelEntry (S, Push);
1713 /* Remove the PLA/STA sequence */
1714 CS_DelEntries (S, Pop, 2);
1716 /* Correct I so we continue with the next insn */
1719 /* Remember we had changes */
1722 } else if ((E->Info & OF_CBRA) == 0 &&
1725 /* We can remove the PHA and PLA instructions */
1726 CS_DelEntry (S, Pop);
1727 CS_DelEntry (S, Push);
1729 /* Correct I so we continue with the next insn */
1732 /* Remember we had changes */
1736 /* Go into search mode again */
1746 /* Return the number of changes made */
1752 unsigned OptPrecalc (CodeSeg* S)
1753 /* Replace immediate operations with the accu where the current contents are
1754 * known by a load of the final value.
1757 unsigned Changes = 0;
1760 /* Generate register info for this step */
1763 /* Walk over the entries */
1765 while (I < CS_GetEntryCount (S)) {
1767 /* Get next entry */
1768 CodeEntry* E = CS_GetEntry (S, I);
1770 /* Get a pointer to the output registers of the insn */
1771 const RegContents* Out = &E->RI->Out;
1773 /* Argument for LDn and flag */
1774 const char* Arg = 0;
1775 opc_t OPC = OP65_LDA;
1777 /* Handle the different instructions */
1781 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegA)) {
1782 /* Result of load is known */
1783 Arg = MakeHexArg (Out->RegA);
1788 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegX)) {
1789 /* Result of load is known but register is X */
1790 Arg = MakeHexArg (Out->RegX);
1796 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegY)) {
1797 /* Result of load is known but register is Y */
1798 Arg = MakeHexArg (Out->RegY);
1808 if (RegValIsKnown (Out->RegA)) {
1809 /* Accu op zp with known contents */
1810 Arg = MakeHexArg (Out->RegA);
1815 if (CE_IsKnownImm (E, 0xFF)) {
1816 /* AND with 0xFF, remove */
1819 } else if (RegValIsKnown (Out->RegA)) {
1820 /* Accu AND zp with known contents */
1821 Arg = MakeHexArg (Out->RegA);
1826 if (CE_IsKnownImm (E, 0x00)) {
1827 /* ORA with zero, remove */
1830 } else if (RegValIsKnown (Out->RegA)) {
1831 /* Accu AND zp with known contents */
1832 Arg = MakeHexArg (Out->RegA);
1841 /* Check if we have to replace the insn by LDA */
1843 CodeEntry* X = NewCodeEntry (OPC, AM65_IMM, Arg, 0, E->LI);
1844 CS_InsertEntry (S, X, I+1);
1853 /* Free register info */
1856 /* Return the number of changes made */
1862 /*****************************************************************************/
1863 /* Optimize branch types */
1864 /*****************************************************************************/
1868 unsigned OptBranchDist (CodeSeg* S)
1869 /* Change branches for the distance needed. */
1871 unsigned Changes = 0;
1873 /* Walk over the entries */
1875 while (I < CS_GetEntryCount (S)) {
1877 /* Get next entry */
1878 CodeEntry* E = CS_GetEntry (S, I);
1880 /* Check if it's a conditional branch to a local label. */
1881 if (E->Info & OF_CBRA) {
1883 /* Is this a branch to a local symbol? */
1884 if (E->JumpTo != 0) {
1886 /* Check if the branch distance is short */
1887 int IsShort = IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner));
1889 /* Make the branch short/long according to distance */
1890 if ((E->Info & OF_LBRA) == 0 && !IsShort) {
1891 /* Short branch but long distance */
1892 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
1894 } else if ((E->Info & OF_LBRA) != 0 && IsShort) {
1895 /* Long branch but short distance */
1896 CE_ReplaceOPC (E, MakeShortBranch (E->OPC));
1900 } else if ((E->Info & OF_LBRA) == 0) {
1902 /* Short branch to external symbol - make it long */
1903 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
1908 } else if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 &&
1909 (E->Info & OF_UBRA) != 0 &&
1911 IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner))) {
1913 /* The jump is short and may be replaced by a BRA on the 65C02 CPU */
1914 CE_ReplaceOPC (E, OP65_BRA);
1923 /* Return the number of changes made */