1 /*****************************************************************************/
5 /* Environment independent low level optimizations */
9 /* (C) 2001-2009, Ullrich von Bassewitz */
10 /* Roemerstrasse 52 */
11 /* D-70794 Filderstadt */
12 /* EMail: uz@cc65.org */
15 /* This software is provided 'as-is', without any expressed or implied */
16 /* warranty. In no event will the authors be held liable for any damages */
17 /* arising from the use of this software. */
19 /* Permission is granted to anyone to use this software for any purpose, */
20 /* including commercial applications, and to alter it and redistribute it */
21 /* freely, subject to the following restrictions: */
23 /* 1. The origin of this software must not be misrepresented; you must not */
24 /* claim that you wrote the original software. If you use this software */
25 /* in a product, an acknowledgment in the product documentation would be */
26 /* appreciated but is not required. */
27 /* 2. Altered source versions must be plainly marked as such, and must not */
28 /* be misrepresented as being the original software. */
29 /* 3. This notice may not be removed or altered from any source */
32 /*****************************************************************************/
48 /*****************************************************************************/
49 /* Helper functions */
50 /*****************************************************************************/
54 static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const CodeEntry* N)
55 /* Checks a range of code entries if there are any memory accesses to N->Arg */
57 /* Get the length of the argument */
58 unsigned NLen = strlen (N->Arg);
60 /* What to check for? */
63 Base = 0x01, /* Check for location without "+1" */
64 Word = 0x02, /* Check for location with "+1" added */
68 /* If the argument of N is a zero page location that ends with "+1", we
69 * must also check for word accesses to the location without +1.
71 if (N->AM == AM65_ZP && NLen > 2 && strcmp (N->Arg + NLen - 2, "+1") == 0) {
75 /* If the argument is zero page indirect, we must also check for accesses
78 if (N->AM == AM65_ZP_INDY || N->AM == AM65_ZPX_IND || N->AM == AM65_ZP_IND) {
82 /* Walk over all code entries */
85 /* Get the next entry */
86 CodeEntry* E = CS_GetEntry (S, From);
88 /* Check if there is an argument and if this argument equals Arg in
91 if (E->Arg[0] != '\0') {
95 if (strcmp (E->Arg, N->Arg) == 0) {
100 ELen = strlen (E->Arg);
101 if ((What & Base) != 0) {
102 if (ELen == NLen - 2 && strncmp (E->Arg, N->Arg, NLen-2) == 0) {
103 /* Found an access */
108 if ((What & Word) != 0) {
109 if (ELen == NLen + 2 && strncmp (E->Arg, N->Arg, NLen) == 0 &&
110 E->Arg[NLen] == '+' && E->Arg[NLen+1] == '1') {
111 /* Found an access */
127 static int GetBranchDist (CodeSeg* S, unsigned From, CodeEntry* To)
128 /* Get the branch distance between the two entries and return it. The distance
129 * will be negative for backward jumps and positive for forward jumps.
132 /* Get the index of the branch target */
133 unsigned TI = CS_GetEntryIndex (S, To);
135 /* Determine the branch distance */
138 /* Forward branch, do not count the current insn */
141 CodeEntry* N = CS_GetEntry (S, J++);
145 /* Backward branch */
148 CodeEntry* N = CS_GetEntry (S, J++);
153 /* Return the calculated distance */
159 static int IsShortDist (int Distance)
160 /* Return true if the given distance is a short branch distance */
162 return (Distance >= -125 && Distance <= 125);
167 static short ZPRegVal (unsigned short Use, const RegContents* RC)
168 /* Return the contents of the given zeropage register */
170 if ((Use & REG_TMP1) != 0) {
172 } else if ((Use & REG_PTR1_LO) != 0) {
174 } else if ((Use & REG_PTR1_HI) != 0) {
176 } else if ((Use & REG_SREG_LO) != 0) {
178 } else if ((Use & REG_SREG_HI) != 0) {
181 return UNKNOWN_REGVAL;
187 static short RegVal (unsigned short Use, const RegContents* RC)
188 /* Return the contents of the given register */
190 if ((Use & REG_A) != 0) {
192 } else if ((Use & REG_X) != 0) {
194 } else if ((Use & REG_Y) != 0) {
197 return ZPRegVal (Use, RC);
203 /*****************************************************************************/
204 /* Replace jumps to RTS by RTS */
205 /*****************************************************************************/
209 unsigned OptRTSJumps1 (CodeSeg* S)
210 /* Replace jumps to RTS by RTS */
212 unsigned Changes = 0;
214 /* Walk over all entries minus the last one */
216 while (I < CS_GetEntryCount (S)) {
218 /* Get the next entry */
219 CodeEntry* E = CS_GetEntry (S, I);
221 /* Check if it's an unconditional branch to a local target */
222 if ((E->Info & OF_UBRA) != 0 &&
224 E->JumpTo->Owner->OPC == OP65_RTS) {
226 /* Insert an RTS instruction */
227 CodeEntry* X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->LI);
228 CS_InsertEntry (S, X, I+1);
230 /* Delete the jump */
233 /* Remember, we had changes */
243 /* Return the number of changes made */
249 unsigned OptRTSJumps2 (CodeSeg* S)
250 /* Replace long conditional jumps to RTS */
252 unsigned Changes = 0;
254 /* Walk over all entries minus the last one */
256 while (I < CS_GetEntryCount (S)) {
260 /* Get the next entry */
261 CodeEntry* E = CS_GetEntry (S, I);
263 /* Check if it's an unconditional branch to a local target */
264 if ((E->Info & OF_CBRA) != 0 && /* Conditional branch */
265 (E->Info & OF_LBRA) != 0 && /* Long branch */
266 E->JumpTo != 0 && /* Local label */
267 E->JumpTo->Owner->OPC == OP65_RTS && /* Target is an RTS */
268 (N = CS_GetNextEntry (S, I)) != 0) { /* There is a next entry */
274 /* We will create a jump around an RTS instead of the long branch */
275 X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->JumpTo->Owner->LI);
276 CS_InsertEntry (S, X, I+1);
278 /* Get the new branch opcode */
279 NewBranch = MakeShortBranch (GetInverseBranch (E->OPC));
281 /* Get the label attached to N, create a new one if needed */
282 LN = CS_GenLabel (S, N);
284 /* Generate the branch */
285 X = NewCodeEntry (NewBranch, AM65_BRA, LN->Name, LN, E->LI);
286 CS_InsertEntry (S, X, I+1);
288 /* Delete the long branch */
291 /* Remember, we had changes */
301 /* Return the number of changes made */
307 /*****************************************************************************/
308 /* Remove dead jumps */
309 /*****************************************************************************/
313 unsigned OptDeadJumps (CodeSeg* S)
314 /* Remove dead jumps (jumps to the next instruction) */
316 unsigned Changes = 0;
318 /* Walk over all entries minus the last one */
320 while (I < CS_GetEntryCount (S)) {
322 /* Get the next entry */
323 CodeEntry* E = CS_GetEntry (S, I);
325 /* Check if it's a branch, if it has a local target, and if the target
326 * is the next instruction.
328 if (E->AM == AM65_BRA &&
330 E->JumpTo->Owner == CS_GetNextEntry (S, I)) {
332 /* Delete the dead jump */
335 /* Remember, we had changes */
346 /* Return the number of changes made */
352 /*****************************************************************************/
353 /* Remove dead code */
354 /*****************************************************************************/
358 unsigned OptDeadCode (CodeSeg* S)
359 /* Remove dead code (code that follows an unconditional jump or an rts/rti
363 unsigned Changes = 0;
365 /* Walk over all entries */
367 while (I < CS_GetEntryCount (S)) {
373 CodeEntry* E = CS_GetEntry (S, I);
375 /* Check if it's an unconditional branch, and if the next entry has
376 * no labels attached, or if the label is just used so that the insn
377 * can jump to itself.
379 if ((E->Info & OF_DEAD) != 0 && /* Dead code follows */
380 (N = CS_GetNextEntry (S, I)) != 0 && /* Has next entry */
381 (!CE_HasLabel (N) || /* Don't has a label */
382 ((N->Info & OF_UBRA) != 0 && /* Uncond branch */
383 (LN = N->JumpTo) != 0 && /* Jumps to known label */
384 LN->Owner == N && /* Attached to insn */
385 CL_GetRefCount (LN) == 1))) { /* Only reference */
387 /* Delete the next entry */
388 CS_DelEntry (S, I+1);
390 /* Remember, we had changes */
401 /* Return the number of changes made */
407 /*****************************************************************************/
408 /* Optimize jump cascades */
409 /*****************************************************************************/
413 unsigned OptJumpCascades (CodeSeg* S)
414 /* Optimize jump cascades (jumps to jumps). In such a case, the jump is
415 * replaced by a jump to the final location. This will in some cases produce
416 * worse code, because some jump targets are no longer reachable by short
417 * branches, but this is quite rare, so there are more advantages than
421 unsigned Changes = 0;
423 /* Walk over all entries */
425 while (I < CS_GetEntryCount (S)) {
431 CodeEntry* E = CS_GetEntry (S, I);
434 * - if it's a branch,
435 * - if it has a jump label,
436 * - if this jump label is not attached to the instruction itself,
437 * - if the target instruction is itself a branch,
438 * - if either the first branch is unconditional or the target of
439 * the second branch is internal to the function.
440 * The latter condition will avoid conditional branches to targets
441 * outside of the function (usually incspx), which won't simplify the
442 * code, since conditional far branches are emulated by a short branch
445 if ((E->Info & OF_BRA) != 0 &&
446 (OldLabel = E->JumpTo) != 0 &&
447 (N = OldLabel->Owner) != E &&
448 (N->Info & OF_BRA) != 0 &&
449 ((E->Info & OF_CBRA) == 0 ||
452 /* Check if we can use the final target label. This is the case,
453 * if the target branch is an absolut branch, or if it is a
454 * conditional branch checking the same condition as the first one.
456 if ((N->Info & OF_UBRA) != 0 ||
457 ((E->Info & OF_CBRA) != 0 &&
458 GetBranchCond (E->OPC) == GetBranchCond (N->OPC))) {
460 /* This is a jump cascade and we may jump to the final target,
461 * provided that the other insn does not jump to itself. If
462 * this is the case, we can also jump to ourselves, otherwise
463 * insert a jump to the new instruction and remove the old one.
466 CodeLabel* LN = N->JumpTo;
468 if (LN != 0 && LN->Owner == N) {
470 /* We found a jump to a jump to itself. Replace our jump
471 * by a jump to itself.
473 CodeLabel* LE = CS_GenLabel (S, E);
474 X = NewCodeEntry (E->OPC, E->AM, LE->Name, LE, E->LI);
478 /* Jump to the final jump target */
479 X = NewCodeEntry (E->OPC, E->AM, N->Arg, N->JumpTo, E->LI);
483 /* Insert it behind E */
484 CS_InsertEntry (S, X, I+1);
489 /* Remember, we had changes */
492 /* Check if both are conditional branches, and the condition of
493 * the second is the inverse of that of the first. In this case,
494 * the second branch will never be taken, and we may jump directly
495 * to the instruction behind this one.
497 } else if ((E->Info & OF_CBRA) != 0 && (N->Info & OF_CBRA) != 0) {
499 CodeEntry* X; /* Instruction behind N */
500 CodeLabel* LX; /* Label attached to X */
502 /* Get the branch conditions of both branches */
503 bc_t BC1 = GetBranchCond (E->OPC);
504 bc_t BC2 = GetBranchCond (N->OPC);
506 /* Check the branch conditions */
507 if (BC1 != GetInverseCond (BC2)) {
508 /* Condition not met */
512 /* We may jump behind this conditional branch. Get the
513 * pointer to the next instruction
515 if ((X = CS_GetNextEntry (S, CS_GetEntryIndex (S, N))) == 0) {
516 /* N is the last entry, bail out */
520 /* Get the label attached to X, create a new one if needed */
521 LX = CS_GenLabel (S, X);
523 /* Move the reference from E to the new label */
524 CS_MoveLabelRef (S, E, LX);
526 /* Remember, we had changes */
537 /* Return the number of changes made */
543 /*****************************************************************************/
544 /* Optimize jsr/rts */
545 /*****************************************************************************/
549 unsigned OptRTS (CodeSeg* S)
550 /* Optimize subroutine calls followed by an RTS. The subroutine call will get
551 * replaced by a jump. Don't bother to delete the RTS if it does not have a
552 * label, the dead code elimination should take care of it.
555 unsigned Changes = 0;
557 /* Walk over all entries minus the last one */
559 while (I < CS_GetEntryCount (S)) {
564 CodeEntry* E = CS_GetEntry (S, I);
566 /* Check if it's a subroutine call and if the following insn is RTS */
567 if (E->OPC == OP65_JSR &&
568 (N = CS_GetNextEntry (S, I)) != 0 &&
569 N->OPC == OP65_RTS) {
571 /* Change the jsr to a jmp and use the additional info for a jump */
573 CE_ReplaceOPC (E, OP65_JMP);
575 /* Remember, we had changes */
585 /* Return the number of changes made */
591 /*****************************************************************************/
592 /* Optimize jump targets */
593 /*****************************************************************************/
597 unsigned OptJumpTarget1 (CodeSeg* S)
598 /* If the instruction preceeding an unconditional branch is the same as the
599 * instruction preceeding the jump target, the jump target may be moved
600 * one entry back. This is a size optimization, since the instruction before
601 * the branch gets removed.
604 unsigned Changes = 0;
605 CodeEntry* E1; /* Entry 1 */
606 CodeEntry* E2; /* Entry 2 */
607 CodeEntry* T1; /* Jump target entry 1 */
608 CodeLabel* TL1; /* Target label 1 */
610 /* Walk over the entries */
612 while (I < CS_GetEntryCount (S)) {
615 E2 = CS_GetNextEntry (S, I);
617 /* Check if we have a jump or branch without a label attached, and
618 * a jump target, which is not attached to the jump itself
621 (E2->Info & OF_UBRA) != 0 &&
624 E2->JumpTo->Owner != E2) {
626 /* Get the entry preceeding the branch target */
627 T1 = CS_GetPrevEntry (S, CS_GetEntryIndex (S, E2->JumpTo->Owner));
629 /* There is no such entry */
633 /* The entry preceeding the branch target may not be the branch
640 /* Get the entry preceeding the jump */
641 E1 = CS_GetEntry (S, I);
643 /* Check if both preceeding instructions are identical */
644 if (!CodeEntriesAreEqual (E1, T1)) {
645 /* Not equal, try next */
649 /* Get the label for the instruction preceeding the jump target.
650 * This routine will create a new label if the instruction does
651 * not already have one.
653 TL1 = CS_GenLabel (S, T1);
655 /* Change the jump target to point to this new label */
656 CS_MoveLabelRef (S, E2, TL1);
658 /* If the instruction preceeding the jump has labels attached,
659 * move references to this label to the new label.
661 if (CE_HasLabel (E1)) {
662 CS_MoveLabels (S, E1, T1);
665 /* Remove the entry preceeding the jump */
668 /* Remember, we had changes */
678 /* Return the number of changes made */
684 unsigned OptJumpTarget2 (CodeSeg* S)
685 /* If a bcs jumps to a sec insn or a bcc jumps to clc, skip this insn, since
686 * it's job is already done.
689 unsigned Changes = 0;
691 /* Walk over the entries */
693 while (I < CS_GetEntryCount (S)) {
695 /* OP that may be skipped */
698 /* Jump target insn, old and new */
706 CodeEntry* E = CS_GetEntry (S, I);
708 /* Check if this is a bcc insn */
709 if (E->OPC == OP65_BCC || E->OPC == OP65_JCC) {
711 } else if (E->OPC == OP65_BCS || E->OPC == OP65_JCS) {
714 /* Not what we're looking for */
718 /* Must have a jump target */
719 if (E->JumpTo == 0) {
723 /* Get the owner insn of the jump target and check if it's the one, we
724 * will skip if present.
726 T = E->JumpTo->Owner;
731 /* Get the entry following the branch target */
732 N = CS_GetNextEntry (S, CS_GetEntryIndex (S, T));
734 /* There is no such entry */
738 /* Get the label for the instruction following the jump target.
739 * This routine will create a new label if the instruction does
740 * not already have one.
742 L = CS_GenLabel (S, N);
744 /* Change the jump target to point to this new label */
745 CS_MoveLabelRef (S, E, L);
747 /* Remember that we had changes */
755 /* Return the number of changes made */
761 unsigned OptJumpTarget3 (CodeSeg* S)
762 /* Jumps to load instructions of a register, that do already have the matching
763 * register contents may skip the load instruction, since it's job is already
767 unsigned Changes = 0;
770 /* Generate register info for this step */
773 /* Walk over the entries */
775 while (I < CS_GetEntryCount (S)) {
784 CodeEntry* E = CS_GetEntry (S, I);
786 /* Check if this is a load insn with a label and the next insn is not
787 * a conditional branch that needs the flags from the load.
789 if ((E->Info & OF_LOAD) != 0 &&
792 (N = CS_GetNextEntry (S, I)) != 0 &&
793 !CE_UseLoadFlags (N)) {
795 /* Walk over all insn that jump here */
796 for (J = 0; J < CE_GetLabelCount (E); ++J) {
799 CodeLabel* L = CE_GetLabel (E, J);
800 for (K = 0; K < CL_GetRefCount (L); ++K) {
802 /* Get the entry that jumps here */
803 CodeEntry* Jump = CL_GetRef (L, K);
805 /* Get the register info from this insn */
806 short Val = RegVal (E->Chg, &Jump->RI->Out2);
808 /* Check if the outgoing value is the one thatr's loaded */
809 if (Val == (unsigned char) E->Num) {
811 /* Ok, skip the insn. First, generate a label */
813 LN = CS_GenLabel (S, N);
816 /* Change the jump target to point to this new label */
817 CS_MoveLabelRef (S, Jump, LN);
819 /* Remember that we had changes */
831 /* Free register info */
834 /* Return the number of changes made */
840 /*****************************************************************************/
841 /* Optimize conditional branches */
842 /*****************************************************************************/
846 unsigned OptCondBranches1 (CodeSeg* S)
847 /* Performs several optimization steps:
849 * - If an immidiate load of a register is followed by a conditional jump that
850 * is never taken because the load of the register sets the flags in such a
851 * manner, remove the conditional branch.
852 * - If the conditional branch is always taken because of the register load,
853 * replace it by a jmp.
854 * - If a conditional branch jumps around an unconditional branch, remove the
855 * conditional branch and make the jump a conditional branch with the
856 * inverse condition of the first one.
859 unsigned Changes = 0;
861 /* Walk over the entries */
863 while (I < CS_GetEntryCount (S)) {
869 CodeEntry* E = CS_GetEntry (S, I);
871 /* Check if it's a register load */
872 if ((E->Info & OF_LOAD) != 0 && /* It's a load instruction */
873 E->AM == AM65_IMM && /* ..with immidiate addressing */
874 (E->Flags & CEF_NUMARG) != 0 && /* ..and a numeric argument. */
875 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
876 (N->Info & OF_CBRA) != 0 && /* ..which is a conditional branch */
877 !CE_HasLabel (N)) { /* ..and does not have a label */
879 /* Get the branch condition */
880 bc_t BC = GetBranchCond (N->OPC);
882 /* Check the argument against the branch condition */
883 if ((BC == BC_EQ && E->Num != 0) ||
884 (BC == BC_NE && E->Num == 0) ||
885 (BC == BC_PL && (E->Num & 0x80) != 0) ||
886 (BC == BC_MI && (E->Num & 0x80) == 0)) {
888 /* Remove the conditional branch */
889 CS_DelEntry (S, I+1);
891 /* Remember, we had changes */
894 } else if ((BC == BC_EQ && E->Num == 0) ||
895 (BC == BC_NE && E->Num != 0) ||
896 (BC == BC_PL && (E->Num & 0x80) == 0) ||
897 (BC == BC_MI && (E->Num & 0x80) != 0)) {
899 /* The branch is always taken, replace it by a jump */
900 CE_ReplaceOPC (N, OP65_JMP);
902 /* Remember, we had changes */
908 if ((E->Info & OF_CBRA) != 0 && /* It's a conditional branch */
909 (L = E->JumpTo) != 0 && /* ..referencing a local label */
910 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
911 (N->Info & OF_UBRA) != 0 && /* ..which is an uncond branch, */
912 !CE_HasLabel (N) && /* ..has no label attached */
913 L->Owner == CS_GetNextEntry (S, I+1)) {/* ..and jump target follows */
915 /* Replace the jump by a conditional branch with the inverse branch
916 * condition than the branch around it.
918 CE_ReplaceOPC (N, GetInverseBranch (E->OPC));
920 /* Remove the conditional branch */
923 /* Remember, we had changes */
933 /* Return the number of changes made */
939 unsigned OptCondBranches2 (CodeSeg* S)
940 /* If on entry to a "rol a" instruction the accu is zero, and a beq/bne follows,
941 * we can remove the rol and branch on the state of the carry flag.
944 unsigned Changes = 0;
947 /* Generate register info for this step */
950 /* Walk over the entries */
952 while (I < CS_GetEntryCount (S)) {
957 CodeEntry* E = CS_GetEntry (S, I);
959 /* Check if it's a rol insn with A in accu and a branch follows */
960 if (E->OPC == OP65_ROL &&
962 E->RI->In.RegA == 0 &&
964 (N = CS_GetNextEntry (S, I)) != 0 &&
965 (N->Info & OF_ZBRA) != 0 &&
966 !RegAUsed (S, I+1)) {
968 /* Replace the branch condition */
969 switch (GetBranchCond (N->OPC)) {
970 case BC_EQ: CE_ReplaceOPC (N, OP65_JCC); break;
971 case BC_NE: CE_ReplaceOPC (N, OP65_JCS); break;
972 default: Internal ("Unknown branch condition in OptCondBranches2");
975 /* Delete the rol insn */
978 /* Remember, we had changes */
986 /* Free register info */
989 /* Return the number of changes made */
995 /*****************************************************************************/
996 /* Remove unused loads and stores */
997 /*****************************************************************************/
1001 unsigned OptUnusedLoads (CodeSeg* S)
1002 /* Remove loads of registers where the value loaded is not used later. */
1004 unsigned Changes = 0;
1006 /* Walk over the entries */
1008 while (I < CS_GetEntryCount (S)) {
1012 /* Get next entry */
1013 CodeEntry* E = CS_GetEntry (S, I);
1015 /* Check if it's a register load or transfer insn */
1016 if ((E->Info & (OF_LOAD | OF_XFR | OF_REG_INCDEC)) != 0 &&
1017 (N = CS_GetNextEntry (S, I)) != 0 &&
1018 !CE_UseLoadFlags (N)) {
1020 /* Check which sort of load or transfer it is */
1027 case OP65_TYA: R = REG_A; break;
1031 case OP65_TAX: R = REG_X; break;
1035 case OP65_TAY: R = REG_Y; break;
1036 default: goto NextEntry; /* OOPS */
1039 /* Get register usage and check if the register value is used later */
1040 if ((GetRegInfo (S, I+1, R) & R) == 0) {
1042 /* Register value is not used, remove the load */
1045 /* Remember, we had changes. Account the deleted entry in I. */
1058 /* Return the number of changes made */
1064 unsigned OptUnusedStores (CodeSeg* S)
1065 /* Remove stores into zero page registers that aren't used later */
1067 unsigned Changes = 0;
1069 /* Walk over the entries */
1071 while (I < CS_GetEntryCount (S)) {
1073 /* Get next entry */
1074 CodeEntry* E = CS_GetEntry (S, I);
1076 /* Check if it's a register load or transfer insn */
1077 if ((E->Info & OF_STORE) != 0 &&
1079 (E->Chg & REG_ZP) != 0) {
1081 /* Check for the zero page location. We know that there cannot be
1082 * more than one zero page location involved in the store.
1084 unsigned R = E->Chg & REG_ZP;
1086 /* Get register usage and check if the register value is used later */
1087 if ((GetRegInfo (S, I+1, R) & R) == 0) {
1089 /* Register value is not used, remove the load */
1092 /* Remember, we had changes */
1095 /* Continue with next insn */
1105 /* Return the number of changes made */
1111 unsigned OptDupLoads (CodeSeg* S)
1112 /* Remove loads of registers where the value loaded is already in the register. */
1114 unsigned Changes = 0;
1117 /* Generate register info for this step */
1120 /* Walk over the entries */
1122 while (I < CS_GetEntryCount (S)) {
1126 /* Get next entry */
1127 CodeEntry* E = CS_GetEntry (S, I);
1129 /* Assume we won't delete the entry */
1132 /* Get a pointer to the input registers of the insn */
1133 const RegContents* In = &E->RI->In;
1135 /* Handle the different instructions */
1139 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1140 CE_IsKnownImm (E, In->RegA) && /* Value to be loaded is known */
1141 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1142 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1148 if (RegValIsKnown (In->RegX) && /* Value of X is known */
1149 CE_IsKnownImm (E, In->RegX) && /* Value to be loaded is known */
1150 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1151 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1157 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1158 CE_IsKnownImm (E, In->RegY) && /* Value to be loaded is known */
1159 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1160 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1166 /* If we store into a known zero page location, and this
1167 * location does already contain the value to be stored,
1170 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1171 E->AM == AM65_ZP && /* Store into zp */
1172 In->RegA == ZPRegVal (E->Chg, In)) { /* Value identical */
1179 /* If we store into a known zero page location, and this
1180 * location does already contain the value to be stored,
1183 if (RegValIsKnown (In->RegX) && /* Value of A is known */
1184 E->AM == AM65_ZP && /* Store into zp */
1185 In->RegX == ZPRegVal (E->Chg, In)) { /* Value identical */
1189 /* If the value in the X register is known and the same as
1190 * that in the A register, replace the store by a STA. The
1191 * optimizer will then remove the load instruction for X
1192 * later. STX does support the zeropage,y addressing mode,
1193 * so be sure to check for that.
1195 } else if (RegValIsKnown (In->RegX) &&
1196 In->RegX == In->RegA &&
1197 E->AM != AM65_ABSY &&
1198 E->AM != AM65_ZPY) {
1199 /* Use the A register instead */
1200 CE_ReplaceOPC (E, OP65_STA);
1205 /* If we store into a known zero page location, and this
1206 * location does already contain the value to be stored,
1209 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1210 E->AM == AM65_ZP && /* Store into zp */
1211 In->RegY == ZPRegVal (E->Chg, In)) { /* Value identical */
1215 /* If the value in the Y register is known and the same as
1216 * that in the A register, replace the store by a STA. The
1217 * optimizer will then remove the load instruction for Y
1218 * later. If replacement by A is not possible try a
1219 * replacement by X, but check for invalid addressing modes
1222 } else if (RegValIsKnown (In->RegY)) {
1223 if (In->RegY == In->RegA) {
1224 CE_ReplaceOPC (E, OP65_STA);
1225 } else if (In->RegY == In->RegX &&
1226 E->AM != AM65_ABSX &&
1227 E->AM != AM65_ZPX) {
1228 CE_ReplaceOPC (E, OP65_STX);
1234 /* If we store into a known zero page location, and this
1235 * location does already contain the value to be stored,
1238 if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && E->AM == AM65_ZP) {
1239 if (ZPRegVal (E->Chg, In) == 0) {
1246 if (RegValIsKnown (In->RegA) &&
1247 In->RegA == In->RegX &&
1248 (N = CS_GetNextEntry (S, I)) != 0 &&
1249 !CE_UseLoadFlags (N)) {
1250 /* Value is identical and not followed by a branch */
1256 if (RegValIsKnown (In->RegA) &&
1257 In->RegA == In->RegY &&
1258 (N = CS_GetNextEntry (S, I)) != 0 &&
1259 !CE_UseLoadFlags (N)) {
1260 /* Value is identical and not followed by a branch */
1266 if (RegValIsKnown (In->RegX) &&
1267 In->RegX == In->RegA &&
1268 (N = CS_GetNextEntry (S, I)) != 0 &&
1269 !CE_UseLoadFlags (N)) {
1270 /* Value is identical and not followed by a branch */
1276 if (RegValIsKnown (In->RegY) &&
1277 In->RegY == In->RegA &&
1278 (N = CS_GetNextEntry (S, I)) != 0 &&
1279 !CE_UseLoadFlags (N)) {
1280 /* Value is identical and not followed by a branch */
1290 /* Delete the entry if requested */
1293 /* Register value is not used, remove the load */
1296 /* Remember, we had changes */
1308 /* Free register info */
1311 /* Return the number of changes made */
1317 unsigned OptStoreLoad (CodeSeg* S)
1318 /* Remove a store followed by a load from the same location. */
1320 unsigned Changes = 0;
1322 /* Walk over the entries */
1324 while (I < CS_GetEntryCount (S)) {
1329 /* Get next entry */
1330 CodeEntry* E = CS_GetEntry (S, I);
1332 /* Check if it is a store instruction followed by a load from the
1333 * same address which is itself not followed by a conditional branch.
1335 if ((E->Info & OF_STORE) != 0 &&
1336 (N = CS_GetNextEntry (S, I)) != 0 &&
1339 ((E->OPC == OP65_STA && N->OPC == OP65_LDA) ||
1340 (E->OPC == OP65_STX && N->OPC == OP65_LDX) ||
1341 (E->OPC == OP65_STY && N->OPC == OP65_LDY)) &&
1342 strcmp (E->Arg, N->Arg) == 0 &&
1343 (X = CS_GetNextEntry (S, I+1)) != 0 &&
1344 !CE_UseLoadFlags (X)) {
1346 /* Register has already the correct value, remove the load */
1347 CS_DelEntry (S, I+1);
1349 /* Remember, we had changes */
1359 /* Return the number of changes made */
1365 unsigned OptTransfers1 (CodeSeg* S)
1366 /* Remove transfers from one register to another and back */
1368 unsigned Changes = 0;
1370 /* Walk over the entries */
1372 while (I < CS_GetEntryCount (S)) {
1378 /* Get next entry */
1379 CodeEntry* E = CS_GetEntry (S, I);
1381 /* Check if we have two transfer instructions */
1382 if ((E->Info & OF_XFR) != 0 &&
1383 (N = CS_GetNextEntry (S, I)) != 0 &&
1385 (N->Info & OF_XFR) != 0) {
1387 /* Check if it's a transfer and back */
1388 if ((E->OPC == OP65_TAX && N->OPC == OP65_TXA && !RegXUsed (S, I+2)) ||
1389 (E->OPC == OP65_TAY && N->OPC == OP65_TYA && !RegYUsed (S, I+2)) ||
1390 (E->OPC == OP65_TXA && N->OPC == OP65_TAX && !RegAUsed (S, I+2)) ||
1391 (E->OPC == OP65_TYA && N->OPC == OP65_TAY && !RegAUsed (S, I+2))) {
1393 /* If the next insn is a conditional branch, check if the insn
1394 * preceeding the first xfr will set the flags right, otherwise we
1395 * may not remove the sequence.
1397 if ((X = CS_GetNextEntry (S, I+1)) == 0) {
1400 if (CE_UseLoadFlags (X)) {
1402 /* No preceeding entry */
1405 P = CS_GetEntry (S, I-1);
1406 if ((P->Info & OF_SETF) == 0) {
1407 /* Does not set the flags */
1412 /* Remove both transfers */
1413 CS_DelEntry (S, I+1);
1416 /* Remember, we had changes */
1427 /* Return the number of changes made */
1433 unsigned OptTransfers2 (CodeSeg* S)
1434 /* Replace loads followed by a register transfer by a load with the second
1435 * register if possible.
1438 unsigned Changes = 0;
1440 /* Walk over the entries */
1442 while (I < CS_GetEntryCount (S)) {
1446 /* Get next entry */
1447 CodeEntry* E = CS_GetEntry (S, I);
1449 /* Check if we have a load followed by a transfer where the loaded
1450 * register is not used later.
1452 if ((E->Info & OF_LOAD) != 0 &&
1453 (N = CS_GetNextEntry (S, I)) != 0 &&
1455 (N->Info & OF_XFR) != 0 &&
1456 GetRegInfo (S, I+2, E->Chg) != E->Chg) {
1460 if (E->OPC == OP65_LDA && N->OPC == OP65_TAX) {
1461 /* LDA/TAX - check for the right addressing modes */
1462 if (E->AM == AM65_IMM ||
1464 E->AM == AM65_ABS ||
1465 E->AM == AM65_ABSY) {
1467 X = NewCodeEntry (OP65_LDX, E->AM, E->Arg, 0, N->LI);
1469 } else if (E->OPC == OP65_LDA && N->OPC == OP65_TAY) {
1470 /* LDA/TAY - check for the right addressing modes */
1471 if (E->AM == AM65_IMM ||
1473 E->AM == AM65_ZPX ||
1474 E->AM == AM65_ABS ||
1475 E->AM == AM65_ABSX) {
1477 X = NewCodeEntry (OP65_LDY, E->AM, E->Arg, 0, N->LI);
1479 } else if (E->OPC == OP65_LDY && N->OPC == OP65_TYA) {
1480 /* LDY/TYA. LDA supports all addressing modes LDY does */
1481 X = NewCodeEntry (OP65_LDA, E->AM, E->Arg, 0, N->LI);
1482 } else if (E->OPC == OP65_LDX && N->OPC == OP65_TXA) {
1483 /* LDX/TXA. LDA doesn't support zp,y, so we must map it to
1486 am_t AM = (E->AM == AM65_ZPY)? AM65_ABSY : E->AM;
1487 X = NewCodeEntry (OP65_LDA, AM, E->Arg, 0, N->LI);
1490 /* If we have a load entry, add it and remove the old stuff */
1492 CS_InsertEntry (S, X, I+2);
1493 CS_DelEntries (S, I, 2);
1495 --I; /* Correct for one entry less */
1503 /* Return the number of changes made */
1509 unsigned OptTransfers3 (CodeSeg* S)
1510 /* Replace a register transfer followed by a store of the second register by a
1511 * store of the first register if this is possible.
1514 unsigned Changes = 0;
1515 unsigned UsedRegs = REG_NONE; /* Track used registers */
1516 unsigned Xfer = 0; /* Index of transfer insn */
1517 unsigned Store = 0; /* Index of store insn */
1518 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1519 CodeEntry* StoreEntry = 0; /* Pointer to store insn */
1526 } State = Initialize;
1528 /* Walk over the entries. Look for a xfer instruction that is followed by
1529 * a store later, where the value of the register is not used later.
1532 while (I < CS_GetEntryCount (S)) {
1534 /* Get next entry */
1535 CodeEntry* E = CS_GetEntry (S, I);
1540 /* Clear the list of used registers */
1541 UsedRegs = REG_NONE;
1545 if (E->Info & OF_XFR) {
1546 /* Found start of sequence */
1554 /* If we find a conditional jump, abort the sequence, since
1555 * handling them makes things really complicated.
1557 if (E->Info & OF_CBRA) {
1559 /* Switch back to searching */
1563 /* Does this insn use the target register of the transfer? */
1564 } else if ((E->Use & XferEntry->Chg) != 0) {
1566 /* It it's a store instruction, and the block is a basic
1567 * block, proceed. Otherwise restart
1569 if ((E->Info & OF_STORE) != 0 &&
1570 CS_IsBasicBlock (S, Xfer, I)) {
1579 /* Does this insn change the target register of the transfer? */
1580 } else if (E->Chg & XferEntry->Chg) {
1582 /* We *may* add code here to remove the transfer, but I'm
1583 * currently not sure about the consequences, so I won't
1584 * do that and bail out instead.
1589 /* Does this insn have a label? */
1590 } else if (CE_HasLabel (E)) {
1592 /* Too complex to handle - bail out */
1597 /* Track used registers */
1603 /* We are at the instruction behind the store. If the register
1604 * isn't used later, and we have an address mode match, we can
1605 * replace the transfer by a store and remove the store here.
1607 if ((GetRegInfo (S, I, XferEntry->Chg) & XferEntry->Chg) == 0 &&
1608 (StoreEntry->AM == AM65_ABS ||
1609 StoreEntry->AM == AM65_ZP) &&
1610 (StoreEntry->AM != AM65_ZP ||
1611 (StoreEntry->Chg & UsedRegs) == 0) &&
1612 !MemAccess (S, Xfer+1, Store-1, StoreEntry)) {
1614 /* Generate the replacement store insn */
1616 switch (XferEntry->OPC) {
1619 X = NewCodeEntry (OP65_STX,
1627 X = NewCodeEntry (OP65_STA,
1635 X = NewCodeEntry (OP65_STY,
1643 X = NewCodeEntry (OP65_STA,
1654 /* If we have a replacement store, change the code */
1656 /* Insert after the xfer insn */
1657 CS_InsertEntry (S, X, Xfer+1);
1659 /* Remove the xfer instead */
1660 CS_DelEntry (S, Xfer);
1662 /* Remove the final store */
1663 CS_DelEntry (S, Store);
1665 /* Correct I so we continue with the next insn */
1668 /* Remember we had changes */
1671 /* Restart after last xfer insn */
1675 /* Restart after last xfer insn */
1687 /* Return the number of changes made */
1693 unsigned OptTransfers4 (CodeSeg* S)
1694 /* Replace a load of a register followed by a transfer insn of the same register
1695 * by a load of the second register if possible.
1698 unsigned Changes = 0;
1699 unsigned Load = 0; /* Index of load insn */
1700 unsigned Xfer = 0; /* Index of transfer insn */
1701 CodeEntry* LoadEntry = 0; /* Pointer to load insn */
1702 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1710 /* Walk over the entries. Look for a load instruction that is followed by
1714 while (I < CS_GetEntryCount (S)) {
1716 /* Get next entry */
1717 CodeEntry* E = CS_GetEntry (S, I);
1722 if (E->Info & OF_LOAD) {
1723 /* Found start of sequence */
1731 /* If we find a conditional jump, abort the sequence, since
1732 * handling them makes things really complicated.
1734 if (E->Info & OF_CBRA) {
1736 /* Switch back to searching */
1740 /* Does this insn use the target register of the load? */
1741 } else if ((E->Use & LoadEntry->Chg) != 0) {
1743 /* It it's a xfer instruction, and the block is a basic
1744 * block, proceed. Otherwise restart
1746 if ((E->Info & OF_XFR) != 0 &&
1747 CS_IsBasicBlock (S, Load, I)) {
1756 /* Does this insn change the target register of the load? */
1757 } else if (E->Chg & LoadEntry->Chg) {
1759 /* We *may* add code here to remove the load, but I'm
1760 * currently not sure about the consequences, so I won't
1761 * do that and bail out instead.
1769 /* We are at the instruction behind the xfer. If the register
1770 * isn't used later, and we have an address mode match, we can
1771 * replace the transfer by a load and remove the initial load.
1773 if ((GetRegInfo (S, I, LoadEntry->Chg) & LoadEntry->Chg) == 0 &&
1774 (LoadEntry->AM == AM65_ABS ||
1775 LoadEntry->AM == AM65_ZP ||
1776 LoadEntry->AM == AM65_IMM) &&
1777 !MemAccess (S, Load+1, Xfer-1, LoadEntry)) {
1779 /* Generate the replacement load insn */
1781 switch (XferEntry->OPC) {
1785 X = NewCodeEntry (OP65_LDA,
1793 X = NewCodeEntry (OP65_LDX,
1801 X = NewCodeEntry (OP65_LDY,
1812 /* If we have a replacement load, change the code */
1814 /* Insert after the xfer insn */
1815 CS_InsertEntry (S, X, Xfer+1);
1817 /* Remove the xfer instead */
1818 CS_DelEntry (S, Xfer);
1820 /* Remove the initial load */
1821 CS_DelEntry (S, Load);
1823 /* Correct I so we continue with the next insn */
1826 /* Remember we had changes */
1829 /* Restart after last xfer insn */
1833 /* Restart after last xfer insn */
1845 /* Return the number of changes made */
1851 unsigned OptPushPop (CodeSeg* S)
1852 /* Remove a PHA/PLA sequence were A is not used later */
1854 unsigned Changes = 0;
1855 unsigned Push = 0; /* Index of push insn */
1856 unsigned Pop = 0; /* Index of pop insn */
1857 unsigned ChgA = 0; /* Flag for A changed */
1862 } State = Searching;
1864 /* Walk over the entries. Look for a push instruction that is followed by
1865 * a pop later, where the pop is not followed by an conditional branch,
1866 * and where the value of the A register is not used later on.
1867 * Look out for the following problems:
1869 * - There may be another PHA/PLA inside the sequence: Restart it.
1870 * - If the PLA has a label, all jumps to this label must be inside
1871 * the sequence, otherwise we cannot remove the PHA/PLA.
1874 while (I < CS_GetEntryCount (S)) {
1878 /* Get next entry */
1879 CodeEntry* E = CS_GetEntry (S, I);
1884 if (E->OPC == OP65_PHA) {
1885 /* Found start of sequence */
1893 if (E->OPC == OP65_PHA) {
1894 /* Inner push/pop, restart */
1897 } else if (E->OPC == OP65_PLA) {
1898 /* Found a matching pop */
1900 /* Check that the block between Push and Pop is a basic
1901 * block (one entry, one exit). Otherwise ignore it.
1903 if (CS_IsBasicBlock (S, Push, Pop)) {
1906 /* Go into searching mode again */
1909 } else if (E->Chg & REG_A) {
1915 /* We're at the instruction after the PLA.
1916 * Check for the following conditions:
1917 * - If this instruction is a store of A, does not have a
1918 * label, and A is not used later, we may replace the PHA
1919 * by the store and remove pla if several other conditions
1921 * - If this instruction is not a conditional branch, and A
1922 * is either unused later, or not changed by the code
1923 * between push and pop, we may remove PHA and PLA.
1925 if (E->OPC == OP65_STA &&
1927 !RegAUsed (S, I+1) &&
1928 !MemAccess (S, Push+1, Pop-1, E)) {
1930 /* Insert a STA after the PHA */
1931 X = NewCodeEntry (E->OPC, E->AM, E->Arg, E->JumpTo, E->LI);
1932 CS_InsertEntry (S, X, Push+1);
1934 /* Remove the PHA instead */
1935 CS_DelEntry (S, Push);
1937 /* Remove the PLA/STA sequence */
1938 CS_DelEntries (S, Pop, 2);
1940 /* Correct I so we continue with the next insn */
1943 /* Remember we had changes */
1946 } else if ((E->Info & OF_CBRA) == 0 &&
1947 (!RegAUsed (S, I) || !ChgA)) {
1949 /* We can remove the PHA and PLA instructions */
1950 CS_DelEntry (S, Pop);
1951 CS_DelEntry (S, Push);
1953 /* Correct I so we continue with the next insn */
1956 /* Remember we had changes */
1960 /* Go into search mode again */
1970 /* Return the number of changes made */
1976 unsigned OptPrecalc (CodeSeg* S)
1977 /* Replace immediate operations with the accu where the current contents are
1978 * known by a load of the final value.
1981 unsigned Changes = 0;
1984 /* Generate register info for this step */
1987 /* Walk over the entries */
1989 while (I < CS_GetEntryCount (S)) {
1991 /* Get next entry */
1992 CodeEntry* E = CS_GetEntry (S, I);
1994 /* Get pointers to the input and output registers of the insn */
1995 const RegContents* Out = &E->RI->Out;
1996 const RegContents* In = &E->RI->In;
1998 /* Argument for LDn and flag */
1999 const char* Arg = 0;
2000 opc_t OPC = OP65_LDA;
2002 /* Handle the different instructions */
2006 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegA)) {
2007 /* Result of load is known */
2008 Arg = MakeHexArg (Out->RegA);
2013 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegX)) {
2014 /* Result of load is known but register is X */
2015 Arg = MakeHexArg (Out->RegX);
2021 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegY)) {
2022 /* Result of load is known but register is Y */
2023 Arg = MakeHexArg (Out->RegY);
2029 if (RegValIsKnown (Out->RegA)) {
2030 /* Accu op zp with known contents */
2031 Arg = MakeHexArg (Out->RegA);
2037 /* If this is an operation with an immediate operand of zero,
2038 * and the register is zero, the operation won't give us any
2039 * results we don't already have (including the flags), so
2040 * remove it. Something like this is generated as a result of
2041 * a compare where parts of the values are known to be zero.
2043 if (In->RegA == 0 && CE_IsKnownImm (E, 0x00)) {
2044 /* 0-0 or 0+0 -> remove */
2051 if (CE_IsKnownImm (E, 0xFF)) {
2052 /* AND with 0xFF, remove */
2055 } else if (CE_IsKnownImm (E, 0x00)) {
2056 /* AND with 0x00, replace by lda #$00 */
2057 Arg = MakeHexArg (0x00);
2058 } else if (RegValIsKnown (Out->RegA)) {
2059 /* Accu AND zp with known contents */
2060 Arg = MakeHexArg (Out->RegA);
2061 } else if (In->RegA == 0xFF) {
2062 /* AND but A contains 0xFF - replace by lda */
2063 CE_ReplaceOPC (E, OP65_LDA);
2069 if (CE_IsKnownImm (E, 0x00)) {
2070 /* ORA with zero, remove */
2073 } else if (CE_IsKnownImm (E, 0xFF)) {
2074 /* ORA with 0xFF, replace by lda #$ff */
2075 Arg = MakeHexArg (0xFF);
2076 } else if (RegValIsKnown (Out->RegA)) {
2077 /* Accu AND zp with known contents */
2078 Arg = MakeHexArg (Out->RegA);
2079 } else if (In->RegA == 0) {
2080 /* ORA but A contains 0x00 - replace by lda */
2081 CE_ReplaceOPC (E, OP65_LDA);
2091 /* Check if we have to replace the insn by LDA */
2093 CodeEntry* X = NewCodeEntry (OPC, AM65_IMM, Arg, 0, E->LI);
2094 CS_InsertEntry (S, X, I+1);
2103 /* Free register info */
2106 /* Return the number of changes made */
2112 /*****************************************************************************/
2113 /* Optimize branch types */
2114 /*****************************************************************************/
2118 unsigned OptBranchDist (CodeSeg* S)
2119 /* Change branches for the distance needed. */
2121 unsigned Changes = 0;
2123 /* Walk over the entries */
2125 while (I < CS_GetEntryCount (S)) {
2127 /* Get next entry */
2128 CodeEntry* E = CS_GetEntry (S, I);
2130 /* Check if it's a conditional branch to a local label. */
2131 if (E->Info & OF_CBRA) {
2133 /* Is this a branch to a local symbol? */
2134 if (E->JumpTo != 0) {
2136 /* Check if the branch distance is short */
2137 int IsShort = IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner));
2139 /* Make the branch short/long according to distance */
2140 if ((E->Info & OF_LBRA) == 0 && !IsShort) {
2141 /* Short branch but long distance */
2142 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2144 } else if ((E->Info & OF_LBRA) != 0 && IsShort) {
2145 /* Long branch but short distance */
2146 CE_ReplaceOPC (E, MakeShortBranch (E->OPC));
2150 } else if ((E->Info & OF_LBRA) == 0) {
2152 /* Short branch to external symbol - make it long */
2153 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2158 } else if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 &&
2159 (E->Info & OF_UBRA) != 0 &&
2161 IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner))) {
2163 /* The jump is short and may be replaced by a BRA on the 65C02 CPU */
2164 CE_ReplaceOPC (E, OP65_BRA);
2173 /* Return the number of changes made */
2179 /*****************************************************************************/
2180 /* Optimize indirect loads */
2181 /*****************************************************************************/
2185 unsigned OptIndLoads1 (CodeSeg* S)
2194 * provided that x and y are both zero.
2197 unsigned Changes = 0;
2200 /* Generate register info for this step */
2203 /* Walk over the entries */
2205 while (I < CS_GetEntryCount (S)) {
2207 /* Get next entry */
2208 CodeEntry* E = CS_GetEntry (S, I);
2210 /* Check if it's what we're looking for */
2211 if (E->OPC == OP65_LDA &&
2212 E->AM == AM65_ZP_INDY &&
2213 E->RI->In.RegY == 0 &&
2214 E->RI->In.RegX == 0) {
2216 /* Replace by the same insn with other addressing mode */
2217 CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZPX_IND, E->Arg, 0, E->LI);
2218 CS_InsertEntry (S, X, I+1);
2220 /* Remove the old insn */
2230 /* Free register info */
2233 /* Return the number of changes made */
2239 unsigned OptIndLoads2 (CodeSeg* S)
2248 * provided that x and y are both zero.
2251 unsigned Changes = 0;
2254 /* Generate register info for this step */
2257 /* Walk over the entries */
2259 while (I < CS_GetEntryCount (S)) {
2261 /* Get next entry */
2262 CodeEntry* E = CS_GetEntry (S, I);
2264 /* Check if it's what we're looking for */
2265 if (E->OPC == OP65_LDA &&
2266 E->AM == AM65_ZPX_IND &&
2267 E->RI->In.RegY == 0 &&
2268 E->RI->In.RegX == 0) {
2270 /* Replace by the same insn with other addressing mode */
2271 CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZP_INDY, E->Arg, 0, E->LI);
2272 CS_InsertEntry (S, X, I+1);
2274 /* Remove the old insn */
2284 /* Free register info */
2287 /* Return the number of changes made */