git.sur5r.net Git - openocd/blob - src/flash/at91sam7_old.c

   1 /***************************************************************************\r
   2  *   Copyright (C) 2006 by Magnus Lundin                                   *\r
   3  *   lundin@mlu.mine.nu                                                    *\r
   4  *                                                                         *\r
   5  *   This program is free software; you can redistribute it and/or modify  *\r
   6  *   it under the terms of the GNU General Public License as published by  *\r
   7  *   the Free Software Foundation; either version 2 of the License, or     *\r
   8  *   (at your option) any later version.                                   *\r
   9  *                                                                         *\r
  10  *   This program is distributed in the hope that it will be useful,       *\r
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *\r
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *\r
  13  *   GNU General Public License for more details.                          *\r
  14  *                                                                         *\r
  15  *   You should have received a copy of the GNU General Public License     *\r
  16  *   along with this program; if not, write to the                         *\r
  17  *   Free Software Foundation, Inc.,                                       *\r
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *\r
  19  ***************************************************************************/\r
  20 \r
  21 /***************************************************************************\r
  22 There are some things to notice\r
  23 \r
  24 * AT91SAM7S64 is tested\r
  25 * All AT91SAM7Sxx  and  AT91SAM7Xxx should work but is not tested\r
  26 * All parameters are identified from onchip configuartion registers \r
  27 *\r
  28 * The flash controller handles erases automatically on a page (128/265 byte) basis\r
  29 * Only an EraseAll command is supported by the controller\r
  30 * Partial erases can be implemented in software by writing one 0xFFFFFFFF word to \r
  31 * some location in every page in the region to be erased\r
  32 *  \r
  33 * Lock regions (sectors) are 32 or 64 pages\r
  34 *\r
  35  ***************************************************************************/\r
  36 #ifdef HAVE_CONFIG_H\r
  37 #include "config.h"\r
  38 #endif\r
  39 \r
  40 #include "replacements.h"\r
  41 \r
  42 #include "at91sam7_old.h"\r
  43 \r
  44 #include "flash.h"\r
  45 #include "target.h"\r
  46 #include "log.h"\r
  47 #include "binarybuffer.h"\r
  48 #include "types.h"\r
  49 \r
  50 #include <stdlib.h>\r
  51 #include <string.h>\r
  52 #include <unistd.h>\r
  53 \r
  54 int at91sam7_old_register_commands(struct command_context_s *cmd_ctx);\r
  55 int at91sam7_old_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);\r
  56 int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last);\r
  57 int at91sam7_old_protect(struct flash_bank_s *bank, int set, int first, int last);\r
  58 int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);\r
  59 int at91sam7_old_probe(struct flash_bank_s *bank);\r
  60 int at91sam7_old_auto_probe(struct flash_bank_s *bank);\r
  61 int at91sam7_old_erase_check(struct flash_bank_s *bank);\r
  62 int at91sam7_old_protect_check(struct flash_bank_s *bank);\r
  63 int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size);\r
  64 \r
  65 u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane);\r
  66 void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode);\r
  67 u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout);\r
  68 int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen); \r
  69 int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);\r
  70 \r
  71 flash_driver_t at91sam7_old_flash =\r
  72 {\r
  73         .name = "at91sam7",\r
  74         .register_commands = at91sam7_old_register_commands,\r
  75         .flash_bank_command = at91sam7_old_flash_bank_command,\r
  76         .erase = at91sam7_old_erase,\r
  77         .protect = at91sam7_old_protect,\r
  78         .write = at91sam7_old_write,\r
  79         .probe = at91sam7_old_probe,\r
  80         .auto_probe = at91sam7_old_probe,\r
  81         .erase_check = at91sam7_old_erase_check,\r
  82         .protect_check = at91sam7_old_protect_check,\r
  83         .info = at91sam7_old_info\r
  84 };\r
  85 \r
  86 u32 MC_FMR_old[4] =     { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };\r
  87 u32 MC_FCR_old[4] =     { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };\r
  88 u32 MC_FSR_old[4] =     { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };\r
  89 \r
  90 char * EPROC_old[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};\r
  91 long NVPSIZ_old[16] = {\r
  92    0,\r
  93    0x2000, /*  8K */\r
  94    0x4000, /* 16K */ \r
  95    0x8000, /* 32K */\r
  96    -1,\r
  97    0x10000, /* 64K */\r
  98    -1,\r
  99    0x20000, /* 128K */\r
 100    -1,\r
 101    0x40000, /* 256K */\r
 102    0x80000, /* 512K */\r
 103    -1,\r
 104    0x100000, /* 1024K */\r
 105    -1,\r
 106    0x200000, /* 2048K */\r
 107    -1\r
 108 };\r
 109 \r
 110 long SRAMSIZ_old[16] = {\r
 111    -1,\r
 112    0x0400, /*  1K */\r
 113    0x0800, /*  2K */ \r
 114    -1, \r
 115    0x1c000,  /* 112K */\r
 116    0x1000,  /*   4K */\r
 117    0x14000, /*  80K */\r
 118    0x28000, /* 160K */\r
 119    0x2000,  /*   8K */\r
 120    0x4000,  /*  16K */\r
 121    0x8000,  /*  32K */\r
 122    0x10000, /*  64K */\r
 123    0x20000, /* 128K */\r
 124    0x40000, /* 256K */\r
 125    0x18000, /* 96K */\r
 126    0x80000, /* 512K */\r
 127 };\r
 128 \r
 129 int at91sam7_old_register_commands(struct command_context_s *cmd_ctx)\r
 130 {\r
 131         command_t *at91sam7_old_cmd = register_command(cmd_ctx, NULL, "at91sam7", NULL, COMMAND_ANY, NULL);\r
 132         register_command(cmd_ctx, at91sam7_old_cmd, "gpnvm", at91sam7_old_handle_gpnvm_command, COMMAND_EXEC,\r
 133                         "at91sam7 gpnvm <num> <bit> set|clear, set or clear at91sam7 gpnvm bit");\r
 134 \r
 135         return ERROR_OK;\r
 136 }\r
 137 \r
 138 u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane)\r
 139 {\r
 140         target_t *target = bank->target;\r
 141         u32 fsr;\r
 142         \r
 143         target_read_u32(target, MC_FSR_old[flashplane], &fsr);\r
 144         \r
 145         return fsr;\r
 146 }\r
 147 \r
 148 /* Read clock configuration and set at91sam7_old_info->usec_clocks*/\r
 149 void at91sam7_old_read_clock_info(flash_bank_t *bank)\r
 150 {\r
 151         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 152         target_t *target = bank->target;\r
 153         u32 mckr, mcfr, pllr;\r
 154         unsigned long tmp = 0, mainfreq;\r
 155         int flashplane;\r
 156 \r
 157         /* Read main clock freqency register */\r
 158         target_read_u32(target, CKGR_MCFR_old, &mcfr);\r
 159         /* Read master clock register */\r
 160         target_read_u32(target, PMC_MCKR_old, &mckr);\r
 161         /* Read Clock Generator PLL Register  */\r
 162         target_read_u32(target, CKGR_PLLR_old, &pllr);\r
 163 \r
 164         at91sam7_old_info->mck_valid = 0;\r
 165         switch (mckr & PMC_MCKR_CSS_old) \r
 166         {\r
 167                 case 0:                 /* Slow Clock */\r
 168                         at91sam7_old_info->mck_valid = 1;\r
 169                         mainfreq = RC_FREQ_old / 16ul * (mcfr & 0xffff);\r
 170                         tmp = mainfreq;\r
 171                         break;\r
 172                 case 1:                 /* Main Clock */\r
 173                         if (mcfr & CKGR_MCFR_MAINRDY_old) \r
 174                         {\r
 175                                 at91sam7_old_info->mck_valid = 1;\r
 176                                 mainfreq = RC_FREQ_old / 16ul * (mcfr & 0xffff);\r
 177                                 tmp = mainfreq;\r
 178                         }\r
 179                         break;\r
 180 \r
 181                 case 2:                 /* Reserved */\r
 182                         break;\r
 183                 case 3:                 /* PLL Clock */\r
 184                         if (mcfr & CKGR_MCFR_MAINRDY_old) \r
 185                         {\r
 186                                 target_read_u32(target, CKGR_PLLR_old, &pllr);\r
 187                                 if (!(pllr & CKGR_PLLR_DIV_old))\r
 188                                         break; /* 0 Hz */\r
 189                                 at91sam7_old_info->mck_valid = 1;\r
 190                                 mainfreq = RC_FREQ_old / 16ul * (mcfr & 0xffff);\r
 191                                 /* Integer arithmetic should have sufficient precision\r
 192                                    as long as PLL is properly configured. */\r
 193                                 tmp = mainfreq / (pllr & CKGR_PLLR_DIV_old) *\r
 194                                   (((pllr & CKGR_PLLR_MUL_old) >> 16) + 1);\r
 195                         }\r
 196                         break;\r
 197         }\r
 198         \r
 199         /* Prescaler adjust */\r
 200         if (((mckr & PMC_MCKR_PRES_old) >> 2) == 7)\r
 201                 at91sam7_old_info->mck_valid = 0;\r
 202         else\r
 203                 at91sam7_old_info->mck_freq = tmp >> ((mckr & PMC_MCKR_PRES_old) >> 2);\r
 204 \r
 205         /* Forget old flash timing */\r
 206         for (flashplane = 0; flashplane<at91sam7_old_info->num_planes; flashplane++)\r
 207         {\r
 208                 at91sam7_old_set_flash_mode(bank, flashplane, FMR_TIMING_NONE_old);\r
 209         }\r
 210 }\r
 211 \r
 212 /* Setup the timimg registers for nvbits or normal flash */\r
 213 void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode)\r
 214 {\r
 215         u32 fmr, fmcn = 0, fws = 0;\r
 216         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 217         target_t *target = bank->target;\r
 218         \r
 219         if (mode && (mode != at91sam7_old_info->flashmode[flashplane]))\r
 220         {\r
 221                 /* Always round up (ceil) */\r
 222                 if (mode==FMR_TIMING_NVBITS_old)\r
 223                 {\r
 224                         if (at91sam7_old_info->cidr_arch == 0x60)\r
 225                         {\r
 226                                 /* AT91SAM7A3 uses master clocks in 100 ns */\r
 227                                 fmcn = (at91sam7_old_info->mck_freq/10000000ul)+1;\r
 228                         }\r
 229                         else\r
 230                         {\r
 231                                 /* master clocks in 1uS for ARCH 0x7 types */\r
 232                                 fmcn = (at91sam7_old_info->mck_freq/1000000ul)+1;\r
 233                         }\r
 234                 }\r
 235                 else if (mode==FMR_TIMING_FLASH_old)\r
 236                         /* main clocks in 1.5uS */\r
 237                         fmcn = (at91sam7_old_info->mck_freq/666666ul)+1;\r
 238 \r
 239                 /* Only allow fmcn=0 if clock period is > 30 us = 33kHz. */\r
 240                 if (at91sam7_old_info->mck_freq <= 33333ul)\r
 241                         fmcn = 0;\r
 242                 /* Only allow fws=0 if clock frequency is < 30 MHz. */\r
 243                 if (at91sam7_old_info->mck_freq > 30000000ul)\r
 244                         fws = 1;\r
 245 \r
 246                 LOG_DEBUG("fmcn[%i]: %i", flashplane, fmcn); \r
 247                 fmr = fmcn << 16 | fws << 8;\r
 248                 target_write_u32(target, MC_FMR_old[flashplane], fmr);\r
 249         }\r
 250         \r
 251         at91sam7_old_info->flashmode[flashplane] = mode;                \r
 252 }\r
 253 \r
 254 u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout)\r
 255 {\r
 256         u32 status;\r
 257         \r
 258         while ((!((status = at91sam7_old_get_flash_status(bank,flashplane)) & waitbits)) && (timeout-- > 0))\r
 259         {\r
 260                 LOG_DEBUG("status[%i]: 0x%x", flashplane, status);\r
 261                 alive_sleep(1);\r
 262         }\r
 263         \r
 264         LOG_DEBUG("status[%i]: 0x%x", flashplane, status);\r
 265 \r
 266         if (status & 0x0C)\r
 267         {\r
 268                 LOG_ERROR("status register: 0x%x", status);\r
 269                 if (status & 0x4)\r
 270                         LOG_ERROR("Lock Error Bit Detected, Operation Abort");\r
 271                 if (status & 0x8)\r
 272                         LOG_ERROR("Invalid command and/or bad keyword, Operation Abort");\r
 273                 if (status & 0x10)\r
 274                         LOG_ERROR("Security Bit Set, Operation Abort");\r
 275         }\r
 276         \r
 277         return status;\r
 278 }\r
 279 \r
 280 \r
 281 /* Send one command to the AT91SAM flash controller */\r
 282 int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen) \r
 283 {\r
 284         u32 fcr;\r
 285         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 286         target_t *target = bank->target;\r
 287 \r
 288         fcr = (0x5A<<24) | ((pagen&0x3FF)<<8) | cmd; \r
 289         target_write_u32(target, MC_FCR_old[flashplane], fcr);\r
 290         LOG_DEBUG("Flash command: 0x%x, flashplane: %i, pagenumber:%u", fcr, flashplane, pagen);\r
 291 \r
 292         if ((at91sam7_old_info->cidr_arch == 0x60)&&((cmd==SLB_old)|(cmd==CLB_old)))\r
 293         {\r
 294                 /* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */\r
 295                 if (at91sam7_old_wait_status_busy(bank, flashplane, MC_FSR_EOL_old, 10)&0x0C) \r
 296                 {\r
 297                         return ERROR_FLASH_OPERATION_FAILED;\r
 298                 }\r
 299                 return ERROR_OK;\r
 300         }\r
 301 \r
 302         if (at91sam7_old_wait_status_busy(bank, flashplane, MC_FSR_FRDY_old, 10)&0x0C) \r
 303         {\r
 304                 return ERROR_FLASH_OPERATION_FAILED;\r
 305         }\r
 306         return ERROR_OK;\r
 307 }\r
 308 \r
 309 /* Read device id register, main clock frequency register and fill in driver info structure */\r
 310 int at91sam7_old_read_part_info(struct flash_bank_s *bank)\r
 311 {\r
 312         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 313         target_t *target = bank->target;\r
 314         u32 cidr, status;\r
 315         int sectornum;\r
 316 \r
 317         if (at91sam7_old_info->cidr != 0)\r
 318                 return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */\r
 319         \r
 320         /* Read and parse chip identification register */\r
 321         target_read_u32(target, DBGU_CIDR_old, &cidr);\r
 322         \r
 323         if (cidr == 0)\r
 324         {\r
 325                 LOG_WARNING("Cannot identify target as an AT91SAM");\r
 326                 return ERROR_FLASH_OPERATION_FAILED;\r
 327         }\r
 328         \r
 329         at91sam7_old_info->cidr = cidr;\r
 330         at91sam7_old_info->cidr_ext = (cidr>>31)&0x0001;\r
 331         at91sam7_old_info->cidr_nvptyp = (cidr>>28)&0x0007;\r
 332         at91sam7_old_info->cidr_arch = (cidr>>20)&0x00FF;\r
 333         at91sam7_old_info->cidr_sramsiz = (cidr>>16)&0x000F;\r
 334         at91sam7_old_info->cidr_nvpsiz2 = (cidr>>12)&0x000F;\r
 335         at91sam7_old_info->cidr_nvpsiz = (cidr>>8)&0x000F;\r
 336         at91sam7_old_info->cidr_eproc = (cidr>>5)&0x0007;\r
 337         at91sam7_old_info->cidr_version = cidr&0x001F;\r
 338         bank->size = NVPSIZ_old[at91sam7_old_info->cidr_nvpsiz];\r
 339         at91sam7_old_info->target_name = "Unknown";\r
 340 \r
 341         /* Support just for bulk erase of a single flash plane, whole device if flash size <= 256k */\r
 342         if (NVPSIZ_old[at91sam7_old_info->cidr_nvpsiz]<0x80000)  /* Flash size less than 512K, one flash plane */\r
 343         {\r
 344                 bank->num_sectors = 1;\r
 345                 bank->sectors = malloc(sizeof(flash_sector_t));\r
 346                 bank->sectors[0].offset = 0;\r
 347                 bank->sectors[0].size = bank->size;\r
 348                 bank->sectors[0].is_erased = -1;\r
 349                 bank->sectors[0].is_protected = -1;\r
 350         }\r
 351         else    /* Flash size 512K or larger, several flash planes */\r
 352         {\r
 353                 bank->num_sectors = NVPSIZ_old[at91sam7_old_info->cidr_nvpsiz]/0x40000;\r
 354                 bank->sectors = malloc(bank->num_sectors*sizeof(flash_sector_t));\r
 355                 for (sectornum=0; sectornum<bank->num_sectors; sectornum++)\r
 356                 {\r
 357                         bank->sectors[sectornum].offset = sectornum*0x40000;\r
 358                         bank->sectors[sectornum].size = 0x40000;\r
 359                         bank->sectors[sectornum].is_erased = -1;\r
 360                         bank->sectors[sectornum].is_protected = -1;\r
 361                 }\r
 362         }\r
 363                 \r
 364         \r
 365 \r
 366         LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_old_info->cidr_nvptyp, at91sam7_old_info->cidr_arch );\r
 367 \r
 368         /* Read main and master clock freqency register */\r
 369         at91sam7_old_read_clock_info(bank);\r
 370         \r
 371         at91sam7_old_info->num_planes = 1;\r
 372         status = at91sam7_old_get_flash_status(bank, 0);\r
 373         at91sam7_old_info->securitybit = (status>>4)&0x01;\r
 374         at91sam7_old_protect_check(bank);   /* TODO Check the protect check */\r
 375         \r
 376         if (at91sam7_old_info->cidr_arch == 0x70 )\r
 377         {\r
 378                 at91sam7_old_info->num_nvmbits = 2;\r
 379                 at91sam7_old_info->nvmbits = (status>>8)&0x03;\r
 380                 bank->base = 0x100000;\r
 381                 bank->bus_width = 4;\r
 382                 if (bank->size==0x80000)  /* AT91SAM7S512 */\r
 383                 {\r
 384                         at91sam7_old_info->target_name = "AT91SAM7S512";\r
 385                         at91sam7_old_info->num_planes = 2;\r
 386                         if (at91sam7_old_info->num_planes != bank->num_sectors)\r
 387                                 LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;\r
 388                         at91sam7_old_info->num_lockbits = 2*16;\r
 389                         at91sam7_old_info->pagesize = 256;\r
 390                         at91sam7_old_info->pages_in_lockregion = 64;\r
 391                         at91sam7_old_info->num_pages = 2*16*64;\r
 392                 }\r
 393                 if (bank->size==0x40000)  /* AT91SAM7S256 */\r
 394                 {\r
 395                         at91sam7_old_info->target_name = "AT91SAM7S256";\r
 396                         at91sam7_old_info->num_lockbits = 16;\r
 397                         at91sam7_old_info->pagesize = 256;\r
 398                         at91sam7_old_info->pages_in_lockregion = 64;\r
 399                         at91sam7_old_info->num_pages = 16*64;\r
 400                 }\r
 401                 if (bank->size==0x20000)  /* AT91SAM7S128 */\r
 402                 {\r
 403                         at91sam7_old_info->target_name = "AT91SAM7S128";\r
 404                         at91sam7_old_info->num_lockbits = 8;\r
 405                         at91sam7_old_info->pagesize = 256;\r
 406                         at91sam7_old_info->pages_in_lockregion = 64;\r
 407                         at91sam7_old_info->num_pages = 8*64;\r
 408                 }\r
 409                 if (bank->size==0x10000)  /* AT91SAM7S64 */\r
 410                 {\r
 411                         at91sam7_old_info->target_name = "AT91SAM7S64";\r
 412                         at91sam7_old_info->num_lockbits = 16;\r
 413                         at91sam7_old_info->pagesize = 128;\r
 414                         at91sam7_old_info->pages_in_lockregion = 32;\r
 415                         at91sam7_old_info->num_pages = 16*32;\r
 416                 }\r
 417                 if (bank->size==0x08000)  /* AT91SAM7S321/32 */\r
 418                 {\r
 419                         at91sam7_old_info->target_name = "AT91SAM7S321/32";\r
 420                         at91sam7_old_info->num_lockbits = 8;\r
 421                         at91sam7_old_info->pagesize = 128;\r
 422                         at91sam7_old_info->pages_in_lockregion = 32;\r
 423                         at91sam7_old_info->num_pages = 8*32;\r
 424                 }\r
 425                 \r
 426                 return ERROR_OK;\r
 427         }\r
 428 \r
 429         if (at91sam7_old_info->cidr_arch == 0x71 )\r
 430         {\r
 431                 at91sam7_old_info->num_nvmbits = 3;\r
 432                 at91sam7_old_info->nvmbits = (status>>8)&0x07;\r
 433                 bank->base = 0x100000;\r
 434                 bank->bus_width = 4;\r
 435                 if (bank->size==0x80000)  /* AT91SAM7XC512 */\r
 436                 {\r
 437                         at91sam7_old_info->target_name = "AT91SAM7XC512";\r
 438                         at91sam7_old_info->num_planes = 2;\r
 439                         if (at91sam7_old_info->num_planes != bank->num_sectors)\r
 440                                 LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;\r
 441                         at91sam7_old_info->num_lockbits = 2*16;\r
 442                         at91sam7_old_info->pagesize = 256;\r
 443                         at91sam7_old_info->pages_in_lockregion = 64;\r
 444                         at91sam7_old_info->num_pages = 2*16*64;\r
 445                 }\r
 446                 if (bank->size==0x40000)  /* AT91SAM7XC256 */\r
 447                 {\r
 448                         at91sam7_old_info->target_name = "AT91SAM7XC256";\r
 449                         at91sam7_old_info->num_lockbits = 16;\r
 450                         at91sam7_old_info->pagesize = 256;\r
 451                         at91sam7_old_info->pages_in_lockregion = 64;\r
 452                         at91sam7_old_info->num_pages = 16*64;\r
 453                 }\r
 454                 if (bank->size==0x20000)  /* AT91SAM7XC128 */\r
 455                 {\r
 456                         at91sam7_old_info->target_name = "AT91SAM7XC128";\r
 457                         at91sam7_old_info->num_lockbits = 8;\r
 458                         at91sam7_old_info->pagesize = 256;\r
 459                         at91sam7_old_info->pages_in_lockregion = 64;\r
 460                         at91sam7_old_info->num_pages = 8*64;\r
 461                 }\r
 462                 \r
 463                 return ERROR_OK;\r
 464         }\r
 465         \r
 466         if (at91sam7_old_info->cidr_arch == 0x72 )\r
 467         {\r
 468                 at91sam7_old_info->num_nvmbits = 3;\r
 469                 at91sam7_old_info->nvmbits = (status>>8)&0x07;\r
 470                 bank->base = 0x100000;\r
 471                 bank->bus_width = 4;\r
 472                 if (bank->size==0x80000) /* AT91SAM7SE512 */\r
 473                 {\r
 474                         at91sam7_old_info->target_name = "AT91SAM7SE512";\r
 475                         at91sam7_old_info->num_planes = 2;\r
 476                         if (at91sam7_old_info->num_planes != bank->num_sectors)\r
 477                                 LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;\r
 478                         at91sam7_old_info->num_lockbits = 32;\r
 479                         at91sam7_old_info->pagesize = 256;\r
 480                         at91sam7_old_info->pages_in_lockregion = 64;\r
 481                         at91sam7_old_info->num_pages = 32*64;\r
 482                 }\r
 483                 if (bank->size==0x40000)\r
 484                 {\r
 485                         at91sam7_old_info->target_name = "AT91SAM7SE256";\r
 486                         at91sam7_old_info->num_lockbits = 16;\r
 487                         at91sam7_old_info->pagesize = 256;\r
 488                         at91sam7_old_info->pages_in_lockregion = 64;\r
 489                         at91sam7_old_info->num_pages = 16*64;\r
 490                 }\r
 491                 if (bank->size==0x08000)\r
 492                 {\r
 493                         at91sam7_old_info->target_name = "AT91SAM7SE32";\r
 494                         at91sam7_old_info->num_lockbits = 8;\r
 495                         at91sam7_old_info->pagesize = 128;\r
 496                         at91sam7_old_info->pages_in_lockregion = 32;\r
 497                         at91sam7_old_info->num_pages = 8*32;\r
 498                 }\r
 499                 \r
 500                 return ERROR_OK;\r
 501         }\r
 502         \r
 503         if (at91sam7_old_info->cidr_arch == 0x75 )\r
 504         {\r
 505                 at91sam7_old_info->num_nvmbits = 3;\r
 506                 at91sam7_old_info->nvmbits = (status>>8)&0x07;\r
 507                 bank->base = 0x100000;\r
 508                 bank->bus_width = 4;\r
 509                 if (bank->size==0x80000)  /* AT91SAM7X512 */\r
 510                 {\r
 511                         at91sam7_old_info->target_name = "AT91SAM7X512";\r
 512                         at91sam7_old_info->num_planes = 2;\r
 513                         if (at91sam7_old_info->num_planes != bank->num_sectors)\r
 514                                 LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");;\r
 515                         at91sam7_old_info->num_lockbits = 32;\r
 516                         at91sam7_old_info->pagesize = 256;\r
 517                         at91sam7_old_info->pages_in_lockregion = 64;\r
 518                         at91sam7_old_info->num_pages = 2*16*64;\r
 519                         LOG_DEBUG("Support for AT91SAM7X512 is experimental in this version!");\r
 520                 }\r
 521                 if (bank->size==0x40000)  /* AT91SAM7X256 */\r
 522                 {\r
 523                         at91sam7_old_info->target_name = "AT91SAM7X256";\r
 524                         at91sam7_old_info->num_lockbits = 16;\r
 525                         at91sam7_old_info->pagesize = 256;\r
 526                         at91sam7_old_info->pages_in_lockregion = 64;\r
 527                         at91sam7_old_info->num_pages = 16*64;\r
 528                 }\r
 529                 if (bank->size==0x20000)  /* AT91SAM7X128 */\r
 530                 {\r
 531                         at91sam7_old_info->target_name = "AT91SAM7X128";\r
 532                         at91sam7_old_info->num_lockbits = 8;\r
 533                         at91sam7_old_info->pagesize = 256;\r
 534                         at91sam7_old_info->pages_in_lockregion = 64;\r
 535                         at91sam7_old_info->num_pages = 8*64;\r
 536                 }\r
 537         \r
 538                 return ERROR_OK;\r
 539         }\r
 540         \r
 541         if (at91sam7_old_info->cidr_arch == 0x60 )\r
 542         {\r
 543                 at91sam7_old_info->num_nvmbits = 3;\r
 544                 at91sam7_old_info->nvmbits = (status>>8)&0x07;\r
 545                 bank->base = 0x100000;\r
 546                 bank->bus_width = 4;\r
 547                 \r
 548                 if (bank->size == 0x40000)  /* AT91SAM7A3 */\r
 549                 {\r
 550                         at91sam7_old_info->target_name = "AT91SAM7A3";\r
 551                         at91sam7_old_info->num_lockbits = 16;\r
 552                         at91sam7_old_info->pagesize = 256;\r
 553                         at91sam7_old_info->pages_in_lockregion = 16;\r
 554                         at91sam7_old_info->num_pages = 16*64;\r
 555                 }\r
 556                 return ERROR_OK;\r
 557         }\r
 558         \r
 559         LOG_WARNING("at91sam7_old flash only tested for AT91SAM7Sxx series");\r
 560         return ERROR_OK;\r
 561 }\r
 562 \r
 563 int at91sam7_old_erase_check(struct flash_bank_s *bank)\r
 564 {\r
 565         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 566         \r
 567         if (!at91sam7_old_info->working_area_size)\r
 568         {\r
 569         }\r
 570         else\r
 571         {       \r
 572         }\r
 573         \r
 574         return ERROR_OK;\r
 575 }\r
 576 \r
 577 int at91sam7_old_protect_check(struct flash_bank_s *bank)\r
 578 {\r
 579         u32 status;\r
 580         int flashplane;\r
 581         \r
 582         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 583 \r
 584         if (at91sam7_old_info->cidr == 0)\r
 585         {\r
 586                 return ERROR_FLASH_BANK_NOT_PROBED;\r
 587         }\r
 588 \r
 589         if (bank->target->state != TARGET_HALTED)\r
 590         {\r
 591                 LOG_ERROR("Target not halted");\r
 592                 return ERROR_TARGET_NOT_HALTED;\r
 593         }\r
 594 \r
 595         for (flashplane=0;flashplane<at91sam7_old_info->num_planes;flashplane++)\r
 596         {\r
 597                 status = at91sam7_old_get_flash_status(bank, flashplane);\r
 598                 at91sam7_old_info->lockbits[flashplane] = (status >> 16);\r
 599         }\r
 600         \r
 601         return ERROR_OK;\r
 602 }\r
 603 \r
 604 /* flash_bank at91sam7_old 0 0 0 0 <target#>\r
 605  */\r
 606 int at91sam7_old_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)\r
 607 {\r
 608         at91sam7_old_flash_bank_t *at91sam7_old_info;\r
 609         int i;\r
 610         \r
 611         if (argc < 6)\r
 612         {\r
 613                 LOG_WARNING("incomplete flash_bank at91sam7_old configuration");\r
 614                 return ERROR_FLASH_BANK_INVALID;\r
 615         }\r
 616         \r
 617         at91sam7_old_info = malloc(sizeof(at91sam7_old_flash_bank_t));\r
 618         bank->driver_priv = at91sam7_old_info;\r
 619         \r
 620         /* part wasn't probed for info yet */\r
 621         at91sam7_old_info->cidr = 0;\r
 622         for (i=0;i<4;i++)\r
 623                 at91sam7_old_info->flashmode[i]=0;\r
 624         \r
 625         return ERROR_OK;\r
 626 }\r
 627 \r
 628 int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last)\r
 629 {\r
 630         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 631         u8 flashplane;\r
 632 \r
 633         if (at91sam7_old_info->cidr == 0)\r
 634         {\r
 635                 return ERROR_FLASH_BANK_NOT_PROBED;\r
 636         }\r
 637 \r
 638         if (bank->target->state != TARGET_HALTED)\r
 639         {\r
 640                 LOG_ERROR("Target not halted");\r
 641                 return ERROR_TARGET_NOT_HALTED;\r
 642         }\r
 643         \r
 644         if ((first < 0) || (last < first) || (last >= bank->num_sectors))\r
 645         {\r
 646                 if ((first == 0) && (last == (at91sam7_old_info->num_lockbits-1)))\r
 647                 {\r
 648                         LOG_WARNING("Sector numbers based on lockbit count, probably a deprecated script");\r
 649                         last = bank->num_sectors-1;\r
 650                 }\r
 651                 else return ERROR_FLASH_SECTOR_INVALID;\r
 652         }\r
 653 \r
 654         /* Configure the flash controller timing */\r
 655         at91sam7_old_read_clock_info(bank);     \r
 656         for (flashplane = first; flashplane<=last; flashplane++)\r
 657         {\r
 658                 /* Configure the flash controller timing */\r
 659                 at91sam7_old_set_flash_mode(bank, flashplane, FMR_TIMING_FLASH_old);\r
 660                 if (at91sam7_old_flash_command(bank, flashplane, EA_old, 0) != ERROR_OK) \r
 661                 {\r
 662                         return ERROR_FLASH_OPERATION_FAILED;\r
 663                 }       \r
 664         }\r
 665         return ERROR_OK;\r
 666 \r
 667 }\r
 668 \r
 669 int at91sam7_old_protect(struct flash_bank_s *bank, int set, int first, int last)\r
 670 {\r
 671         u32 cmd, pagen;\r
 672         u8 flashplane;\r
 673         int lockregion;\r
 674         \r
 675         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 676         \r
 677         if (at91sam7_old_info->cidr == 0)\r
 678         {\r
 679                 return ERROR_FLASH_BANK_NOT_PROBED;\r
 680         }\r
 681 \r
 682         if (bank->target->state != TARGET_HALTED)\r
 683         {\r
 684                 LOG_ERROR("Target not halted");\r
 685                 return ERROR_TARGET_NOT_HALTED;\r
 686         }\r
 687         \r
 688         if ((first < 0) || (last < first) || (last >= at91sam7_old_info->num_lockbits))\r
 689         {\r
 690                 return ERROR_FLASH_SECTOR_INVALID;\r
 691         }\r
 692         \r
 693         at91sam7_old_read_clock_info(bank);     \r
 694         \r
 695         for (lockregion=first;lockregion<=last;lockregion++) \r
 696         {\r
 697                 pagen = lockregion*at91sam7_old_info->pages_in_lockregion;\r
 698                 flashplane = (pagen>>10)&0x03;\r
 699                 /* Configure the flash controller timing */\r
 700                 at91sam7_old_set_flash_mode(bank, flashplane, FMR_TIMING_NVBITS_old);\r
 701                 \r
 702                 if (set)\r
 703                          cmd = SLB_old; \r
 704                 else\r
 705                          cmd = CLB_old;                 \r
 706 \r
 707                 if (at91sam7_old_flash_command(bank, flashplane, cmd, pagen) != ERROR_OK) \r
 708                 {\r
 709                         return ERROR_FLASH_OPERATION_FAILED;\r
 710                 }       \r
 711         }\r
 712         \r
 713         at91sam7_old_protect_check(bank);\r
 714                 \r
 715         return ERROR_OK;\r
 716 }\r
 717 \r
 718 \r
 719 int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)\r
 720 {\r
 721         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 722         target_t *target = bank->target;\r
 723         u32 dst_min_alignment, wcount, bytes_remaining = count;\r
 724         u32 first_page, last_page, pagen, buffer_pos;\r
 725         u8 flashplane;\r
 726         \r
 727         if (at91sam7_old_info->cidr == 0)\r
 728         {\r
 729                 return ERROR_FLASH_BANK_NOT_PROBED;\r
 730         }\r
 731 \r
 732         if (bank->target->state != TARGET_HALTED)\r
 733         {\r
 734                 LOG_ERROR("Target not halted");\r
 735                 return ERROR_TARGET_NOT_HALTED;\r
 736         }\r
 737 \r
 738         if (offset + count > bank->size)\r
 739                 return ERROR_FLASH_DST_OUT_OF_BANK;\r
 740         \r
 741         dst_min_alignment = at91sam7_old_info->pagesize;\r
 742 \r
 743         if (offset % dst_min_alignment)\r
 744         {\r
 745                 LOG_WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment);\r
 746                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;\r
 747         }\r
 748         \r
 749         if (at91sam7_old_info->cidr_arch == 0)\r
 750                 return ERROR_FLASH_BANK_NOT_PROBED;\r
 751 \r
 752         first_page = offset/dst_min_alignment;\r
 753         last_page = CEIL(offset + count, dst_min_alignment);\r
 754         \r
 755         LOG_DEBUG("first_page: %i, last_page: %i, count %i", first_page, last_page, count);\r
 756         \r
 757         at91sam7_old_read_clock_info(bank);     \r
 758 \r
 759         for (pagen=first_page; pagen<last_page; pagen++) \r
 760         {\r
 761                 if (bytes_remaining<dst_min_alignment)\r
 762                         count = bytes_remaining;\r
 763                 else\r
 764                         count = dst_min_alignment;\r
 765                 bytes_remaining -= count;\r
 766                 \r
 767                 /* Write one block to the PageWriteBuffer */\r
 768                 buffer_pos = (pagen-first_page)*dst_min_alignment;\r
 769                 wcount = CEIL(count,4);\r
 770                 target->type->write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos);\r
 771                 flashplane = (pagen>>10)&0x3;\r
 772                 \r
 773                 /* Configure the flash controller timing */     \r
 774                 at91sam7_old_set_flash_mode(bank, flashplane, FMR_TIMING_FLASH_old);\r
 775                 /* Send Write Page command to Flash Controller */\r
 776                 if (at91sam7_old_flash_command(bank, flashplane, WP_old, pagen) != ERROR_OK) \r
 777                 {\r
 778                                 return ERROR_FLASH_OPERATION_FAILED;\r
 779                 }\r
 780                 LOG_DEBUG("Write flash plane:%i page number:%i", flashplane, pagen);\r
 781         }\r
 782         \r
 783         return ERROR_OK;\r
 784 }\r
 785 \r
 786 \r
 787 int at91sam7_old_probe(struct flash_bank_s *bank)\r
 788 {\r
 789         /* we can't probe on an at91sam7_old\r
 790          * if this is an at91sam7_old, it has the configured flash\r
 791          */\r
 792         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 793         int retval;\r
 794         \r
 795         if (at91sam7_old_info->cidr != 0)\r
 796         {\r
 797                 return ERROR_OK; /* already probed */\r
 798         }\r
 799 \r
 800         if (bank->target->state != TARGET_HALTED)\r
 801         {\r
 802                 LOG_ERROR("Target not halted");\r
 803                 return ERROR_TARGET_NOT_HALTED;\r
 804         }\r
 805 \r
 806         retval = at91sam7_old_read_part_info(bank);\r
 807         if (retval != ERROR_OK)\r
 808                 return retval;\r
 809         \r
 810         return ERROR_OK;\r
 811 }\r
 812 \r
 813 \r
 814 int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size)\r
 815 {\r
 816         int printed, flashplane;\r
 817         at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;\r
 818         \r
 819         if (at91sam7_old_info->cidr == 0)\r
 820         {\r
 821                 return ERROR_FLASH_BANK_NOT_PROBED;\r
 822         }\r
 823         \r
 824         printed = snprintf(buf, buf_size, "\nat91sam7_old information: Chip is %s\n",at91sam7_old_info->target_name);\r
 825         buf += printed;\r
 826         buf_size -= printed;\r
 827         \r
 828         printed = snprintf(buf, buf_size, "cidr: 0x%8.8x, arch: 0x%4.4x, eproc: %s, version:0x%3.3x,  flashsize: 0x%8.8x\n",\r
 829                   at91sam7_old_info->cidr, at91sam7_old_info->cidr_arch, EPROC_old[at91sam7_old_info->cidr_eproc], at91sam7_old_info->cidr_version, bank->size);\r
 830         buf += printed;\r
 831         buf_size -= printed;\r
 832                         \r
 833         printed = snprintf(buf, buf_size, "master clock(estimated): %ikHz \n", at91sam7_old_info->mck_freq / 1000);\r
 834         buf += printed;\r
 835         buf_size -= printed;\r
 836         \r
 837         if (at91sam7_old_info->num_planes>1) {          \r
 838                 printed = snprintf(buf, buf_size, "flashplanes: %i, pagesize: %i, lock regions: %i, pages in lock region: %i \n", \r
 839                            at91sam7_old_info->num_planes, at91sam7_old_info->pagesize, at91sam7_old_info->num_lockbits, at91sam7_old_info->num_pages/at91sam7_old_info->num_lockbits);\r
 840                 buf += printed;\r
 841                 buf_size -= printed;\r
 842                 for (flashplane=0; flashplane<at91sam7_old_info->num_planes; flashplane++)\r
 843                 {\r
 844                         printed = snprintf(buf, buf_size, "lockbits[%i]: 0x%4.4x,  ", flashplane, at91sam7_old_info->lockbits[flashplane]);\r
 845                         buf += printed;\r
 846                         buf_size -= printed;\r
 847                 }\r
 848         }\r
 849         else\r
 850         if (at91sam7_old_info->num_lockbits>0) {                \r
 851                 printed = snprintf(buf, buf_size, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", \r
 852                            at91sam7_old_info->pagesize, at91sam7_old_info->num_lockbits, at91sam7_old_info->lockbits[0], at91sam7_old_info->num_pages/at91sam7_old_info->num_lockbits);\r
 853                 buf += printed;\r
 854                 buf_size -= printed;\r
 855         }\r
 856                         \r
 857         printed = snprintf(buf, buf_size, "securitybit: %i,  nvmbits(%i): 0x%1.1x\n", at91sam7_old_info->securitybit, at91sam7_old_info->num_nvmbits, at91sam7_old_info->nvmbits);\r
 858         buf += printed;\r
 859         buf_size -= printed;\r
 860 \r
 861         return ERROR_OK;\r
 862 }\r
 863 \r
 864 /* \r
 865 * On AT91SAM7S: When the gpnvm bits are set with \r
 866 * > at91sam7_old gpnvm 0 bitnr set\r
 867 * the changes are not visible in the flash controller status register MC_FSR_old \r
 868 * until the processor has been reset.\r
 869 * On the Olimex board this requires a power cycle.\r
 870 * Note that the AT91SAM7S has the following errata (doc6175.pdf sec 14.1.3):\r
 871 *       The maximum number of write/erase cycles for Non Volatile Memory bits is 100. This includes\r
 872 *       Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit.\r
 873 */\r
 874 int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)\r
 875 {\r
 876         flash_bank_t *bank;\r
 877         int bit;\r
 878         u8  flashcmd;\r
 879         u32 status;\r
 880         char *value;\r
 881         at91sam7_old_flash_bank_t *at91sam7_old_info;\r
 882         int retval;\r
 883 \r
 884         if (argc < 3)\r
 885         {\r
 886                 command_print(cmd_ctx, "at91sam7_old gpnvm <num> <bit> <set|clear>");\r
 887                 return ERROR_OK;\r
 888         }\r
 889         \r
 890         bank = get_flash_bank_by_num_noprobe(strtoul(args[0], NULL, 0));\r
 891         bit = atoi(args[1]);\r
 892         value = args[2];\r
 893 \r
 894         if (bank ==  NULL)\r
 895         {\r
 896                 return ERROR_FLASH_BANK_INVALID;\r
 897         }\r
 898 \r
 899         if (bank->driver != &at91sam7_old_flash)\r
 900         {\r
 901                 command_print(cmd_ctx, "not an at91sam7_old flash bank '%s'", args[0]);\r
 902                 return ERROR_FLASH_BANK_INVALID;\r
 903         }\r
 904 \r
 905         if (strcmp(value, "set") == 0)\r
 906         {\r
 907                 flashcmd = SGPB_old;\r
 908         }\r
 909         else if (strcmp(value, "clear") == 0)\r
 910         {\r
 911                 flashcmd = CGPB_old;\r
 912         }\r
 913         else\r
 914         {\r
 915                 return ERROR_COMMAND_SYNTAX_ERROR;\r
 916         }\r
 917 \r
 918         at91sam7_old_info = bank->driver_priv;\r
 919 \r
 920         if (bank->target->state != TARGET_HALTED)\r
 921         {\r
 922                 LOG_ERROR("target has to be halted to perform flash operation");\r
 923                 return ERROR_TARGET_NOT_HALTED;\r
 924         }\r
 925         \r
 926         if (at91sam7_old_info->cidr == 0)\r
 927         {\r
 928                 retval = at91sam7_old_read_part_info(bank);\r
 929                 if (retval != ERROR_OK) {\r
 930                         return retval;\r
 931                 }\r
 932         }\r
 933 \r
 934         if ((bit<0) || (at91sam7_old_info->num_nvmbits <= bit))\r
 935         { \r
 936                 command_print(cmd_ctx, "gpnvm bit '#%s' is out of bounds for target %s", args[1],at91sam7_old_info->target_name);\r
 937                 return ERROR_OK;\r
 938         }\r
 939 \r
 940         /* Configure the flash controller timing */\r
 941         at91sam7_old_read_clock_info(bank);     \r
 942         at91sam7_old_set_flash_mode(bank, 0, FMR_TIMING_NVBITS_old);\r
 943         \r
 944         if (at91sam7_old_flash_command(bank, 0, flashcmd, (u16)(bit)) != ERROR_OK) \r
 945         {\r
 946                 return ERROR_FLASH_OPERATION_FAILED;\r
 947         }       \r
 948 \r
 949         status = at91sam7_old_get_flash_status(bank, 0);\r
 950         LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value 0x%x, status 0x%x \n",flashcmd,bit,status);\r
 951         at91sam7_old_info->nvmbits = (status>>8)&((1<<at91sam7_old_info->num_nvmbits)-1);\r
 952 \r
 953         return ERROR_OK;\r
 954 }\r