1 /***************************************************************************
2 * Copyright (C) 2008 by *
3 * Karl RobinSod <karl.robinsod@gmail.com> *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 /***************************************************************************
22 * There are some things to notice
24 * You need to unprotect flash sectors each time you connect the OpenOCD
25 * Dumping 1MB takes about 60 Seconds
26 * Full erase (sectors 0-22 inclusive) takes 2-4 seconds
27 * Writing 1MB takes 88 seconds
29 ***************************************************************************/
34 #include "replacements.h"
41 #include "binarybuffer.h"
48 #define LOAD_TIMER_ERASE 0
49 #define LOAD_TIMER_WRITE 1
51 #define FLASH_PAGE_SIZE 512
53 /* LPC288X control registers */
54 #define DBGU_CIDR 0x8000507C
55 /* LPC288X flash registers */
56 #define F_CTRL 0x80102000 /* Flash control register R/W 0x5 */
57 #define F_STAT 0x80102004 /* Flash status register RO 0x45 */
58 #define F_PROG_TIME 0x80102008 /* Flash program time register R/W 0 */
59 #define F_WAIT 0x80102010 /* Flash read wait state register R/W 0xC004 */
60 #define F_CLK_TIME 0x8010201C /* Flash clock divider for 66 kHz generation R/W 0 */
61 #define F_INTEN_CLR 0x80102FD8 /* Clear interrupt enable bits WO - */
62 #define F_INTEN_SET 0x80102FDC /* Set interrupt enable bits WO - */
63 #define F_INT_STAT 0x80102FE0 /* Interrupt status bits RO 0 */
64 #define F_INTEN 0x80102FE4 /* Interrupt enable bits RO 0 */
65 #define F_INT_CLR 0x80102FE8 /* Clear interrupt status bits WO */
66 #define F_INT_SET 0x80102FEC /* Set interrupt status bits WO - */
67 #define FLASH_PD 0x80005030 /* Allows turning off the Flash memory for power savings. R/W 1*/
68 #define FLASH_INIT 0x80005034 /* Monitors Flash readiness, such as recovery from Power Down mode. R/W -*/
72 #define FC_FUNC 0x0002
74 #define FC_RD_LATCH 0x0020
75 #define FC_PROTECT 0x0080
76 #define FC_SET_DATA 0x0400
77 #define FC_RSSL 0x0800
78 #define FC_PROG_REQ 0x1000
79 #define FC_CLR_BUF 0x4000
80 #define FC_LOAD_REQ 0x8000
82 #define FS_DONE 0x0001
83 #define FS_PROGGNT 0x0002
87 #define FPT_TIME_MASK 0x7FFF
89 #define FPT_ENABLE 0x8000
91 #define FW_WAIT_STATES_MASK 0x00FF
92 #define FW_SET_MASK 0xC000
95 #define FCT_CLK_DIV_MASK 0x0FFF
97 static int lpc288x_register_commands(struct command_context_s *cmd_ctx);
98 static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
99 static int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
100 static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last);
101 static int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
102 static int lpc288x_probe(struct flash_bank_s *bank);
103 static int lpc288x_erase_check(struct flash_bank_s *bank);
104 static int lpc288x_protect_check(struct flash_bank_s *bank);
105 static int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size);
106 static u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
107 static void lpc288x_load_timer(int erase, struct target_s *target);
108 static void lpc288x_set_flash_clk(struct flash_bank_s *bank);
109 static u32 lpc288x_system_ready(struct flash_bank_s *bank);
111 flash_driver_t lpc288x_flash =
114 .register_commands = lpc288x_register_commands,
115 .flash_bank_command = lpc288x_flash_bank_command,
116 .erase = lpc288x_erase,
117 .protect = lpc288x_protect,
118 .write = lpc288x_write,
119 .probe = lpc288x_probe,
120 .auto_probe = lpc288x_probe,
121 .erase_check = lpc288x_erase_check,
122 .protect_check = lpc288x_protect_check,
126 static int lpc288x_register_commands(struct command_context_s *cmd_ctx)
131 static u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
134 target_t *target = bank->target;
139 target_read_u32(target, F_STAT, &status);
140 }while (((status & FS_DONE) == 0) && timeout);
144 LOG_DEBUG("Timedout!");
145 return ERROR_FLASH_OPERATION_FAILED;
150 /* Read device id register and fill in driver info structure */
151 static int lpc288x_read_part_info(struct flash_bank_s *bank)
153 lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
154 target_t *target = bank->target;
160 if (lpc288x_info->cidr == 0x0102100A)
161 return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */
163 /* Read and parse chip identification register */
164 target_read_u32(target, DBGU_CIDR, &cidr);
166 if (cidr != 0x0102100A)
168 LOG_WARNING("Cannot identify target as an LPC288X (%08X)",cidr);
169 return ERROR_FLASH_OPERATION_FAILED;
172 lpc288x_info->cidr = cidr;
173 lpc288x_info->sector_size_break = 0x000F0000;
174 lpc288x_info->target_name = "LPC288x";
176 /* setup the sector info... */
178 bank->num_sectors = 23;
179 bank->sectors = malloc(sizeof(flash_sector_t) * 23);
181 for (i = 0; i < 15; i++)
183 bank->sectors[i].offset = offset;
184 bank->sectors[i].size = 64 * 1024;
185 offset += bank->sectors[i].size;
186 bank->sectors[i].is_erased = -1;
187 bank->sectors[i].is_protected = 1;
189 for (i = 15; i < 23; i++)
191 bank->sectors[i].offset = offset;
192 bank->sectors[i].size = 8 * 1024;
193 offset += bank->sectors[i].size;
194 bank->sectors[i].is_erased = -1;
195 bank->sectors[i].is_protected = 1;
201 static int lpc288x_protect_check(struct flash_bank_s *bank)
206 /* flash_bank LPC288x 0 0 0 0 <target#> <cclk> */
207 static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
209 lpc288x_flash_bank_t *lpc288x_info;
213 LOG_WARNING("incomplete flash_bank LPC288x configuration");
214 return ERROR_FLASH_BANK_INVALID;
217 lpc288x_info = malloc(sizeof(lpc288x_flash_bank_t));
218 bank->driver_priv = lpc288x_info;
220 /* part wasn't probed for info yet */
221 lpc288x_info->cidr = 0;
222 lpc288x_info->cclk = strtoul(args[6], NULL, 0);
227 /* The frequency is the AHB clock frequency divided by (CLK_DIV ×3) + 1.
228 * This must be programmed such that the Flash Programming clock frequency is 66 kHz ± 20%.
230 * 12000000/66000 = 182
232 static void lpc288x_set_flash_clk(struct flash_bank_s *bank)
235 lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
236 clk_time = (lpc288x_info->cclk / 66000) / 3;
237 target_write_u32(bank->target, F_CTRL, FC_CS | FC_WEN);
238 target_write_u32(bank->target, F_CLK_TIME, clk_time);
241 /* AHB tcyc (in ns) 83 ns
242 * LOAD_TIMER_ERASE FPT_TIME = ((400,000,000 / AHB tcyc (in ns)) - 2) / 512
243 * = 9412 (9500) (AN10548 9375)
244 * LOAD_TIMER_WRITE FPT_TIME = ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
245 * = 23 (75) (AN10548 72 - is this wrong?)
246 * TODO: Sort out timing calcs ;) */
247 static void lpc288x_load_timer(int erase, struct target_s *target)
249 if (erase == LOAD_TIMER_ERASE)
251 target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 9500);
255 target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 75);
259 static u32 lpc288x_system_ready(struct flash_bank_s *bank)
261 lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
262 if (lpc288x_info->cidr == 0)
264 return ERROR_FLASH_BANK_NOT_PROBED;
267 if (bank->target->state != TARGET_HALTED)
269 LOG_ERROR("Target not halted");
270 return ERROR_TARGET_NOT_HALTED;
275 static int lpc288x_erase_check(struct flash_bank_s *bank)
277 u32 status = lpc288x_system_ready(bank); /* probed? halted? */
278 if (status != ERROR_OK)
280 LOG_INFO("Processor not halted/not probed");
287 static int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
291 target_t *target = bank->target;
293 status = lpc288x_system_ready(bank); /* probed? halted? */
294 if (status != ERROR_OK)
299 if ((first < 0) || (last < first) || (last >= bank->num_sectors))
301 LOG_INFO("Bad sector range");
302 return ERROR_FLASH_SECTOR_INVALID;
305 /* Configure the flash controller timing */
306 lpc288x_set_flash_clk(bank);
308 for (sector = first; sector <= last; sector++)
310 if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
312 return ERROR_FLASH_OPERATION_FAILED;
315 lpc288x_load_timer(LOAD_TIMER_ERASE,target);
317 target_write_u32(target, bank->sectors[sector].offset, 0x00);
319 target_write_u32(target, F_CTRL, FC_PROG_REQ | FC_PROTECT | FC_CS);
321 if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
323 return ERROR_FLASH_OPERATION_FAILED;
328 static int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
330 u8 page_buffer[FLASH_PAGE_SIZE];
331 u32 status, source_offset,dest_offset;
332 target_t *target = bank->target;
333 u32 bytes_remaining = count;
334 u32 first_sector, last_sector, sector, page;
337 /* probed? halted? */
338 status = lpc288x_system_ready(bank);
339 if (status != ERROR_OK)
344 /* Initialise search indices */
345 first_sector = last_sector = 0xffffffff;
347 /* validate the write range... */
348 for (i = 0; i < bank->num_sectors; i++)
350 if ((offset >= bank->sectors[i].offset) &&
351 (offset < (bank->sectors[i].offset + bank->sectors[i].size)) &&
352 (first_sector == 0xffffffff))
355 /* all writes must start on a sector boundary... */
356 if (offset % bank->sectors[i].size)
358 LOG_INFO("offset 0x%x breaks required alignment 0x%x", offset, bank->sectors[i].size);
359 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
362 if (((offset + count) > bank->sectors[i].offset) &&
363 ((offset + count) <= (bank->sectors[i].offset + bank->sectors[i].size)) &&
364 (last_sector == 0xffffffff))
371 if (first_sector == 0xffffffff || last_sector == 0xffffffff)
373 LOG_INFO("Range check failed %x %x", offset, count);
374 return ERROR_FLASH_DST_OUT_OF_BANK;
377 /* Configure the flash controller timing */
378 lpc288x_set_flash_clk(bank);
380 /* initialise the offsets */
384 for (sector = first_sector; sector <= last_sector; sector++)
386 for (page = 0; page < bank->sectors[sector].size / FLASH_PAGE_SIZE; page++)
388 if (bytes_remaining == 0)
391 memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
393 else if (bytes_remaining < FLASH_PAGE_SIZE)
395 count = bytes_remaining;
396 memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
397 memcpy(page_buffer, &buffer[source_offset], count);
401 count = FLASH_PAGE_SIZE;
402 memcpy(page_buffer, &buffer[source_offset], count);
405 /* Wait for flash to become ready */
406 if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
408 return ERROR_FLASH_OPERATION_FAILED;
411 /* fill flash data latches with 1's */
412 target_write_u32(target, F_CTRL, FC_CS | FC_SET_DATA | FC_WEN | FC_FUNC);
414 target_write_u32(target, F_CTRL, FC_CS | FC_WEN | FC_FUNC);
415 /*would be better to use the clean target_write_buffer() interface but
416 * it seems not to be a LOT slower....
417 * bulk_write_memory() is no quicker :(*/
419 if (target->type->write_memory(target, offset + dest_offset, 4, 128, page_buffer) != ERROR_OK)
421 LOG_ERROR("Write failed s %x p %x", sector, page);
422 return ERROR_FLASH_OPERATION_FAILED;
425 if (target_write_buffer(target, offset + dest_offset, FLASH_PAGE_SIZE, page_buffer) != ERROR_OK)
427 LOG_INFO("Write to flash buffer failed");
428 return ERROR_FLASH_OPERATION_FAILED;
431 dest_offset += FLASH_PAGE_SIZE;
432 source_offset += count;
433 bytes_remaining -= count;
435 lpc288x_load_timer(LOAD_TIMER_WRITE, target);
437 target_write_u32(target, F_CTRL, FC_PROG_REQ | FC_PROTECT | FC_FUNC | FC_CS);
444 static int lpc288x_probe(struct flash_bank_s *bank)
446 /* we only deal with LPC2888 so flash config is fixed */
447 lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
450 if (lpc288x_info->cidr != 0)
452 return ERROR_OK; /* already probed */
455 if (bank->target->state != TARGET_HALTED)
457 LOG_ERROR("Target not halted");
458 return ERROR_TARGET_NOT_HALTED;
461 retval = lpc288x_read_part_info(bank);
462 if (retval != ERROR_OK)
467 static int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size)
469 snprintf(buf, buf_size, "lpc288x flash driver");
473 static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last)
475 int lockregion, status;
477 target_t *target = bank->target;
479 /* probed? halted? */
480 status = lpc288x_system_ready(bank);
481 if (status != ERROR_OK)
486 if ((first < 0) || (last < first) || (last >= bank->num_sectors))
488 return ERROR_FLASH_SECTOR_INVALID;
491 /* Configure the flash controller timing */
492 lpc288x_set_flash_clk(bank);
494 for (lockregion = first; lockregion <= last; lockregion++)
498 /* write an odd value to base addy to protect... */
503 /* write an even value to base addy to unprotect... */
506 target_write_u32(target, bank->sectors[lockregion].offset, value);
507 target_write_u32(target, F_CTRL, FC_LOAD_REQ | FC_PROTECT | FC_WEN | FC_FUNC | FC_CS);